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Debug output from certain files causes crashes with new context switching logic

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2181 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-10-27 19:51:19 +00:00
parent b8824028b1
commit 4453cf8152
2 changed files with 42 additions and 36 deletions
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31
arch/arm/src/cortexm3/up_hardfault.c
View File

@ -55,8 +55,16 @@
* Pre-processor Definitions
****************************************************************************/
/* Debug output from this file may interfere with context switching! */
#undef DEBUG_HARDFAULTS /* Define to debug hard faults */
#ifdef DEBUG_HARDFAULTS
# define hfdbg(format, arg...) lldbg(format, ##arg)
#else
# define hfdbg(x...)
#endif
#define INSN_SVC0 0xdf00 /* insn: svc 0 */
/****************************************************************************
@ -98,10 +106,7 @@ int up_hardfault(int irq, FAR void *context)
/* Fetch the instruction that caused the Hard fault */
insn = *pc;
#ifdef DEBUG_HARDFAULTS
lldbg(" PC: %p INSN: %04x\n", pc, insn);
#endif
hfdbg(" PC: %p INSN: %04x\n", pc, insn);
/* If this was the instruction 'svc 0', then forward processing
* to the SVCall handler
@ -109,30 +114,28 @@ int up_hardfault(int irq, FAR void *context)
if (insn == INSN_SVC0)
{
sllvdbg("Forward SVCall\n");
hfdbg("Forward SVCall\n");
return up_svcall(irq, context);
}
}
/* Dump some hard fault info */
#ifdef DEBUG_HARDFAULTS
lldbg("\nHard Fault:\n");
lldbg(" IRQ: %d regs: %p\n", irq, regs);
lldbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x\n",
hfdbg("\nHard Fault:\n");
hfdbg(" IRQ: %d regs: %p\n", irq, regs);
hfdbg(" BASEPRI: %08x PRIMASK: %08x IPSR: %08x\n",
getbasepri(), getprimask(), getipsr());
lldbg(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
hfdbg(" CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
getreg32(NVIC_AFAULTS));
lldbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hfdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
lldbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
hfdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
lldbg(" PSR=%08x\n", regs[REG_XPSR]);
#endif
hfdbg(" PSR=%08x\n", regs[REG_XPSR]);
(void)irqsave();
lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));

47
arch/arm/src/cortexm3/up_svcall.c
View File

@ -53,7 +53,14 @@
* Pre-processor Definitions
****************************************************************************/
/* Debug output from this file may interfere with context switching! */
#undef DEBUG_SVCALL /* Define to debug SVCall */
#ifdef DEBUG_HARDFAULTS
# define svcdbg(format, arg...) lldbg(format, ##arg)
#else
# define svcdbg(x...)
#endif
/****************************************************************************
* Private Data
@ -90,19 +97,17 @@ int up_svcall(int irq, FAR void *context)
* the TCB register save area.
*/
sllvdbg("Command: %d regs: %p R1: %08x R2: %08x\n",
regs[REG_R0], regs, regs[REG_R1], regs[REG_R2]);
svcdbg("Command: %d regs: %p R1: %08x R2: %08x\n",
regs[REG_R0], regs, regs[REG_R1], regs[REG_R2]);
#ifdef DEBUG_SVCALL
lldbg("SVCall Entry:\n");
lldbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
lldbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
lldbg(" PSR=%08x\n", regs[REG_XPSR]);
#endif
svcdbg("SVCall Entry:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R0], regs[REG_R1], regs[REG_R2], regs[REG_R3],
regs[REG_R4], regs[REG_R5], regs[REG_R6], regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
regs[REG_R8], regs[REG_R9], regs[REG_R10], regs[REG_R11],
regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
svcdbg(" PSR=%08x\n", regs[REG_XPSR]);
/* Handle the SVCall according to the command in R0 */
@ -178,16 +183,14 @@ int up_svcall(int irq, FAR void *context)
break;
}
#ifdef DEBUG_SVCALL
lldbg("SVCall Return:\n");
lldbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R0], current_regs[REG_R1], current_regs[REG_R2], current_regs[REG_R3],
current_regs[REG_R4], current_regs[REG_R5], current_regs[REG_R6], current_regs[REG_R7]);
lldbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R8], current_regs[REG_R9], current_regs[REG_R10], current_regs[REG_R11],
current_regs[REG_R12], current_regs[REG_R13], current_regs[REG_R14], current_regs[REG_R15]);
lldbg(" PSR=%08x\n", current_regs[REG_XPSR]);
#endif
svcdbg("SVCall Return:\n");
svcdbg(" R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R0], current_regs[REG_R1], current_regs[REG_R2], current_regs[REG_R3],
current_regs[REG_R4], current_regs[REG_R5], current_regs[REG_R6], current_regs[REG_R7]);
svcdbg(" R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
current_regs[REG_R8], current_regs[REG_R9], current_regs[REG_R10], current_regs[REG_R11],
current_regs[REG_R12], current_regs[REG_R13], current_regs[REG_R14], current_regs[REG_R15]);
svcdbg(" PSR=%08x\n", current_regs[REG_XPSR]);
return OK;
}