Add SPI-based MMC/SD support for lm3s
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1820 42af7a65-404d-4744-a932-0658087f49c3
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@ -729,4 +729,5 @@
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Micromint Eagle100 board.
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* Documentation/NuttxPortingGuide.html: Added a section on NuttX device drivers.
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* arch/arm/src/lm3s: Added an SSI driver for the LM3S6918
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* examples/nsh: Added MMC/SD support for the LM3S6918
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@ -1419,6 +1419,7 @@ nuttx-0.4.7 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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Micromint Eagle100 board.
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* Documentation/NuttxPortingGuide.html: Added a section on NuttX device drivers.
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* arch/arm/src/lm3s: Added an SSI driver for the LM3S6918
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* examples/nsh: Added MMC/SD support for the LM3S6918
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pascal-0.1.3 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
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4
TODO
4
TODO
@ -543,9 +543,9 @@ o ARM/LM3S6918 (arch/arm/src/lm3s/)
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Status: Open
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Priority: Low
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Description: Still need to implement I2C, SSI, MMC/SD, and Ethernet
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Description: Still need to implement I2C
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Status: Open
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Priority: High
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Priority: Low
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o pjrc-8052 / MCS51 (arch/pjrc-8051/)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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@ -542,25 +542,34 @@ static int ssi_performtx(struct lm32_ssidev_s *priv)
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/* Update the count of words to to transferred */
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priv->ntxwords -= ntxd;
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}
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/* Make sure that the Tx FIFO half-empty interrupt is enabled */
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/* Check again... Now have all of the Tx words been sent? */
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#ifndef CONFIG_SSI_POLLWAIT
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regval = ssi_getreg(priv, LM3S_SSI_IM_OFFSET);
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regval = ssi_getreg(priv, LM3S_SSI_IM_OFFSET);
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if (priv->ntxwords > 0)
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{
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/* No.. Enable the Tx FIFO interrupt. This interrupt occurs
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* when the Tx FIFO is 1/2 full or less.
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*/
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#ifdef CONFIG_DEBUG
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regval |= (SSI_IM_TX|SSI_RIS_ROR)
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#else
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regval |= SSI_IM_TX;
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ssi_putreg(priv, LM3S_SSI_IM_OFFSET, regval);
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#endif
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}
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#ifndef CONFIG_SSI_POLLWAIT
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else
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{
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/* Yes.. The transfer is complete, disable Tx FIFO half-empty interrupt */
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/* Yes.. Disable the Tx FIFO interrupt. The final stages of
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* the transfer will be driven by Rx FIFO interrupts.
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*/
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regval = ssi_getreg(priv, LM3S_SSI_IM_OFFSET);
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regval &= ~SSI_IM_TX;
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ssi_putreg(priv, LM3S_SSI_IM_OFFSET, regval);
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regval &= ~(SSI_IM_TX|SSI_RIS_ROR);
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}
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#endif
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ssi_putreg(priv, LM3S_SSI_IM_OFFSET, regval);
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#endif /* CONFIG_SSI_POLLWAIT */
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}
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return ntxd;
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}
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@ -582,6 +591,10 @@ static int ssi_performtx(struct lm32_ssidev_s *priv)
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static inline void ssi_performrx(struct lm32_ssidev_s *priv)
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{
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#ifndef CONFIG_SSI_POLLWAIT
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uint32 regval;
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#endif
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/* Loop while data is available in the Rx FIFO */
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while (ssi_rxfifonotempty(priv))
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@ -596,6 +609,38 @@ static inline void ssi_performrx(struct lm32_ssidev_s *priv)
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priv->nrxwords++;
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}
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}
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/* The Rx FIFO is now empty. While there is Tx data to be sent, the
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* transfer will be driven by Tx FIFO interrupts. The final part
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* of the transfer is driven by Rx FIFO interrupts only.
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*/
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#ifndef CONFIG_SSI_POLLWAIT
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regval = ssi_getreg(priv, LM3S_SSI_IM_OFFSET);
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if (priv->ntxwords == 0 && priv->nrxwords < priv->nwords)
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{
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/* There are no more outgoing words to send, but there are
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* additional incoming words expected (I would think that this
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* a real corner case, be we will handle it with an extra
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* interrupt, probably an Rx timeout).
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*/
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#ifdef CONFIG_DEBUG
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regval |= (SSI_IM_RX|SSI_IM_RT|SSI_IM_ROR);
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#else
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regval |= (SSI_IM_RX|SSI_IM_RT);
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#endif
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}
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else
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{
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/* No.. there are either more Tx words to send or all Rx words
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* have received. Disable Rx FIFO interrupts.
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*/
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regval &= ~(SSI_IM_RX|SSI_IM_RT);
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}
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ssi_putreg(priv, LM3S_SSI_IM_OFFSET, regval);
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#endif /* CONFIG_SSI_POLLWAIT */
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}
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/****************************************************************************
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@ -659,7 +704,11 @@ static int ssi_transfer(struct lm32_ssidev_s *priv, const void *txbuffer,
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priv->rxword = ssi_rxnull;
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}
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/* Prime the Tx FIFO to start the sequence (saves one interrupt) */
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/* Prime the Tx FIFO to start the sequence (saves one interrupt).
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* At this point, all SSI interrupts should be disabled, but the
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* operation of ssi_performtx() will set up the interrupts
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* approapriately.
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*/
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#ifndef CONFIG_SSI_POLLWAIT
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flags = irqsave();
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@ -671,7 +720,11 @@ static int ssi_transfer(struct lm32_ssidev_s *priv, const void *txbuffer,
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*/
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irqrestore(flags);
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ssi_semtake(&priv->xfrsem);
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do
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{
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ssi_semtake(&priv->xfrsem);
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}
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while (priv->nrxwords < priv->nwords);
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#else
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/* Perform the transfer using polling logic. This will totally
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@ -770,6 +823,15 @@ static int ssi_interrupt(int irq, void *context)
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regval = ssi_getreg(priv, LM3S_SSI_RIS_OFFSET);
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ssi_putreg(priv, LM3S_SSI_ICR_OFFSET, regval);
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/* Check for Rx FIFO overruns */
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#ifdef CONFIG_DEBUG
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if ((regval & SSI_RIS_ROR) != 0)
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{
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lldbg("Rx FIFO Overrun!\n");
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}
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#endif
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/* Handle outgoing Tx FIFO transfers */
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ntxd = ssi_performtx(priv);
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@ -782,7 +844,11 @@ static int ssi_interrupt(int irq, void *context)
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if (priv->nrxwords >= priv->nwords)
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{
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/* Yes, wake up the waiting thread */
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/* Yes.. Disable all SSI interrupt sources */
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ssi_putreg(priv, LM3S_SSI_IM_OFFSET, 0);
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/* Wake up the waiting thread */
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ssi_semgive(&priv->xfrsem);
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}
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@ -1235,16 +1301,13 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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ssi_setfrequencyinternal(priv, 400000);
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/* Enable interrupts on data ready in the RX FIFL (and certain error conditions) */
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/* Disable all SSI interrupt sources */
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#ifndef CONFIG_SSI_POLLWAIT
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ssi_putreg(priv, LM3S_SSI_IM_OFFSET,
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SSI_IM_ROR | /* SSI Rx FIFO Overrun */
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SSI_IM_RT | /* SSI Rx FIFO Time-Out */
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SSI_IM_RX); /* SSI Rx FIFO half full or more */
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ssi_putreg(priv, LM3S_SSI_IM_OFFSET, 0);
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/* Attach the interrupt */
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#ifndef CONFIG_SSI_POLLWAIT
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#if NSSI_ENABLED > 1
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irq_attach(priv->irq, (xcpt_t)ssi_interrupt);
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#else
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@ -1256,7 +1319,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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ssi_enable(priv, SSI_CR1_SSE);
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/* Enable SSI interrupts */
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/* Enable SSI interrupts (They are still disabled at the source). */
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#ifndef CONFIG_SSI_POLLWAIT
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#if NSSI_ENABLED > 1
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@ -1265,6 +1328,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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up_enable_irq(SSI_IRQ);
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#endif
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#endif /* CONFIG_SSI_POLLWAIT */
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irqrestore(flags);
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return (FAR struct spi_dev_s *)priv;
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}
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@ -134,10 +134,10 @@ void __start(void)
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#endif
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showprogress('D');
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/* Initialize onboard LEDs */
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/* Initialize onboard resources */
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#ifdef CONFIG_ARCH_LEDS
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up_ledinit();
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lm3s_boardinitialize();
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#endif
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showprogress('E');
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@ -514,6 +514,13 @@ CONFIG_EXAMPLES_NSH_FATSECTSIZE=512
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CONFIG_EXAMPLES_NSH_FATNSECTORS=1024
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CONFIG_EXAMPLES_NSH_FATMOUNTPT=/tmp
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#
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# Architecture-specific NSH options
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#
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CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDSLOTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDMINOR=0
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#
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# Settings for examples/dhcpd
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#
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@ -44,6 +44,7 @@
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#ifndef __ASSEMBLY__
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# include <sys/types.h>
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#endif
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#include "lm3s_internal.h"
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/************************************************************************************
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* Definitions
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@ -109,6 +110,12 @@
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#define LED_ASSERTION 6 /* ON OFF */
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#define LED_PANIC 7 /* ON OFF */
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/* Eagle-100 GPIOs ******************************************************************/
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/* GPIO for microSD card chip select */
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#define SDC_CS (GPIO_PORTG | 2)
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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@ -505,6 +505,13 @@ CONFIG_EXAMPLES_NSH_FATSECTSIZE=512
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CONFIG_EXAMPLES_NSH_FATNSECTORS=1024
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CONFIG_EXAMPLES_NSH_FATMOUNTPT=/tmp
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#
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# Architecture-specific NSH options
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#
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CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDSLOTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDMINOR=0
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#
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# Stack and heap information
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#
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CONFIG_EXAMPLES_NSH_FATNSECTORS=1024
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CONFIG_EXAMPLES_NSH_FATMOUNTPT=/tmp
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#
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# Architecture-specific NSH options
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#
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CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDSLOTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDMINOR=0
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#
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# Stack and heap information
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#
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CONFIG_EXAMPLES_NSH_FATNSECTORS=1024
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CONFIG_EXAMPLES_NSH_FATMOUNTPT=/tmp
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#
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# Architecture-specific NSH options
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#
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CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDSLOTNO=0
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CONFIG_EXAMPLES_NSH_MMCSDMINOR=0
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#
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# Stack and heap information
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#
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@ -39,7 +39,7 @@ CFLAGS += -I$(TOPDIR)/sched
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ASRCS =
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AOBJS = $(ASRCS:.S=$(OBJEXT))
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CSRCS = up_boot.c up_leds.c up_ethernet.c
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CSRCS = up_boot.c up_leds.c up_ethernet.c up_ssi.c
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COBJS = $(CSRCS:.c=$(OBJEXT))
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SRCS = $(ASRCS) $(CSRCS)
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@ -68,4 +68,13 @@
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void lm3s_boardinitialize(void)
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{
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/* Configure the SPI-based microSD CS GPIO */
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lm3s_configgpio(SDC_CS | GPIO_PADTYPE_STDWPU | GPIO_STRENGTH_4MA | GPIO_VALUE_ONE);
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/* Configure on-board LEDs */
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#ifdef CONFIG_ARCH_LEDS
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up_ledinit();
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#endif
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}
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96
configs/eagle100/src/up_ssi.c
Normal file
96
configs/eagle100/src/up_ssi.c
Normal file
@ -0,0 +1,96 @@
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/************************************************************************************
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* configs/eagle100/src/up_ssi.c
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* arch/arm/src/board/up_ssi.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <nuttx/spi.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "lm3s_internal.h"
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* The external functions, lm3s_spiselect and lm3s_spistatus must be provided
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* by board-specific logic. The are implementations of the select and status
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* methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi.h).
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* All othermethods (including up_spiinitialize()) are provided by common
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* logic. To use this common SPI logic on your board:
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*
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* 1. Provide lm3s_spiselect() and lm3s_spistatus() functions in your
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* board-specific logic. This function will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* 2. Add a call to up_spiinitialize() in your low level initialization
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* logic
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* 3. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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void lm3s_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected)
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{
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if (devid == SPIDEV_MMCSD)
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{
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/* Assert the CS pin to the card */
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lm3s_gpiowrite(SDC_CS, selected ? 0 : 1);
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}
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}
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ubyte lm3s_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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#warning "Need to check schematic"
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return SPI_STATUS_PRESENT;
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}
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@ -64,6 +64,11 @@ CSRCS += nsh_lpc214x.c
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CFLAGS += -DCONFIG_EXAMPLES_NSH_ARCHINIT=1
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endif
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ifeq ($(CONFIG_ARCH_CHIP),lm3s)
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CSRCS += nsh_lm3s.c
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CFLAGS += -DCONFIG_EXAMPLES_NSH_ARCHINIT=1
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endif
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AOBJS = $(ASRCS:.S=$(OBJEXT))
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COBJS = $(CSRCS:.c=$(OBJEXT))
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|
158
examples/nsh/nsh_lm3s.c
Normal file
158
examples/nsh/nsh_lm3s.c
Normal file
@ -0,0 +1,158 @@
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/****************************************************************************
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* examples/nsh/nsh_lm3s.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <debug.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/spi.h>
|
||||
#include <nuttx/mmcsd.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-Processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration ************************************************************/
|
||||
|
||||
/* PORT and SLOT number probably depend on the board configuration */
|
||||
|
||||
#ifdef CONFIG_ARCH_BOARD_EAGLE100
|
||||
# undef CONFIG_EXAMPLES_NSH_HAVEUSBDEV
|
||||
# define CONFIG_EXAMPLES_NSH_HAVEMMCSD 1
|
||||
# if !defined(CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO) || CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO != 0
|
||||
# error "The Eagle100 MMC/SD is on SSI0"
|
||||
# undef CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO
|
||||
# define CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO 0
|
||||
# endif
|
||||
# if !defined(CONFIG_EXAMPLES_NSH_MMCSDSLOTNO) || CONFIG_EXAMPLES_NSH_MMCSDSLOTNO != 0
|
||||
# error "The Eagle100 MMC/SD is on SSI0 slot 0"
|
||||
# undef CONFIG_EXAMPLES_NSH_MMCSDSLOTNO
|
||||
# define CONFIG_EXAMPLES_NSH_MMCSDSLOTNO 0
|
||||
# endif
|
||||
#else
|
||||
/* Add configuration for new LPC214x boards here */
|
||||
# error "Unrecognized lm3s board"
|
||||
# undef CONFIG_EXAMPLES_NSH_HAVEUSBDEV
|
||||
# undef CONFIG_EXAMPLES_NSH_HAVEMMCSD
|
||||
#endif
|
||||
|
||||
/* Can't support USB features if USB is not enabled */
|
||||
|
||||
#ifndef CONFIG_USBDEV
|
||||
# undef CONFIG_EXAMPLES_NSH_HAVEUSBDEV
|
||||
#endif
|
||||
|
||||
/* Can't support MMC/SD features if mountpoints are disabled */
|
||||
|
||||
#if defined(CONFIG_DISABLE_MOUNTPOINT)
|
||||
# undef CONFIG_EXAMPLES_NSH_HAVEMMCSD
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_EXAMPLES_NSH_MMCSDMINOR
|
||||
# define CONFIG_EXAMPLES_NSH_MMCSDMINOR 0
|
||||
#endif
|
||||
|
||||
/* Debug ********************************************************************/
|
||||
|
||||
#ifdef CONFIG_CPP_HAVE_VARARGS
|
||||
# ifdef CONFIG_DEBUG
|
||||
# define message(...) lib_lowprintf(__VA_ARGS__)
|
||||
# else
|
||||
# define message(...) printf(__VA_ARGS__)
|
||||
# endif
|
||||
#else
|
||||
# ifdef CONFIG_DEBUG
|
||||
# define message lib_lowprintf
|
||||
# else
|
||||
# define message printf
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nsh_archinitialize
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture specific initialization
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int nsh_archinitialize(void)
|
||||
{
|
||||
FAR struct spi_dev_s *spi;
|
||||
int ret;
|
||||
|
||||
/* Get the SPI port */
|
||||
|
||||
message("nsh_archinitialize: Initializing SPI port %d\n",
|
||||
CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO);
|
||||
|
||||
spi = up_spiinitialize(CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO);
|
||||
if (!spi)
|
||||
{
|
||||
message("nsh_archinitialize: Failed to initialize SPI port %d\n",
|
||||
CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
message("nsh_archinitialize: Successfully initialized SPI port %d\n",
|
||||
CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO);
|
||||
|
||||
/* Bind the SPI port to the slot */
|
||||
|
||||
message("nsh_archinitialize: Binding SPI port %d to MMC/SD slot %d\n",
|
||||
CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO, CONFIG_EXAMPLES_NSH_MMCSDSLOTNO);
|
||||
|
||||
ret = mmcsd_spislotinitialize(CONFIG_EXAMPLES_NSH_MMCSDMINOR, CONFIG_EXAMPLES_NSH_MMCSDSLOTNO, spi);
|
||||
if (ret < 0)
|
||||
{
|
||||
message("nsh_archinitialize: Failed to bind SPI port %d to MMC/SD slot %d: %d\n",
|
||||
CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO, CONFIG_EXAMPLES_NSH_MMCSDSLOTNO, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
message("nsh_archinitialize: Successfuly bound SPI port %d to MMC/SD slot %d\n",
|
||||
CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO, CONFIG_EXAMPLES_NSH_MMCSDSLOTNO);
|
||||
return OK;
|
||||
}
|
@ -128,7 +128,7 @@ int nsh_archinitialize(void)
|
||||
message("nsh_archinitialize: Initializing SPI port %d\n",
|
||||
CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO);
|
||||
|
||||
spi = up_spiinitialize(1);
|
||||
spi = up_spiinitialize(CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO);
|
||||
if (!spi)
|
||||
{
|
||||
message("nsh_archinitialize: Failed to initialize SPI port %d\n",
|
||||
|
Loading…
Reference in New Issue
Block a user