arch/arm/src/lpc54xx: More WDT-related changes.
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3119629ff0
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458f9f4e67
@ -412,6 +412,11 @@ config LPC54_SDMMC
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select ARCH_HAVE_SDIO
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depends on EXPERIMENTAL
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config LPC54_WWDT
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bool "Windowing Watchdog Timer (WWDT)"
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default n
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depends on EXPERIMENTAL
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endmenu # LPC54xx Peripheral Selection
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menu "GPIO Interrupt Configuration"
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@ -105,6 +105,10 @@ ifeq ($(CONFIG_LPC54_GPIOIRQ),y)
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CHIP_CSRCS += lpc54_gpioirq.c
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endif
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ifeq ($(CONFIG_LPC54_WWDT),y)
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CHIP_CSRCS += lpc54_wwdt.c
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endif
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ifeq ($(CONFIG_LPC54_HAVE_USART),y)
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CHIP_CSRCS += lpc54_serial.c
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endif
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@ -102,7 +102,7 @@ static void lpc54_setwarning(uint32_t warning);
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/* Interrupt hanlding *******************************************************/
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static int lpc54_interrupt(int irq, FAR void *context);
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static int lpc54_wwdt_interrupt(int irq, FAR void *context);
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/* "Lower half" driver methods **********************************************/
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@ -199,7 +199,7 @@ static void lpc54_setwarning(uint32_t warning)
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}
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/****************************************************************************
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* Name: lpc54_interrupt
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* Name: lpc54_wwdt_interrupt
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*
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* Description:
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* WWDT warning interrupt
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@ -212,7 +212,7 @@ static void lpc54_setwarning(uint32_t warning)
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*
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****************************************************************************/
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static int lpc54_interrupt(int irq, FAR void *context)
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static int lpc54_wwdt_interrupt(int irq, FAR void *context)
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{
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FAR struct lpc54_lowerhalf_wwdt_s *priv = &g_wdgdev;
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uint32_t regval;
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@ -533,7 +533,7 @@ static xcpt_t lpc54_capture(FAR struct watchdog_lowerhalf_s *lower,
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regval |= WWDT_MOD_WDINT;
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putreg32(regval, LPC54_WWDT_MOD);
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up_enable_irq(LPC54M4_IRQ_WWDT);
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up_enable_irq(LPC54_IRQ_WDT);
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}
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else
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{
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@ -542,7 +542,7 @@ static xcpt_t lpc54_capture(FAR struct watchdog_lowerhalf_s *lower,
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regval &= ~WWDT_MOD_WDINT;
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putreg32(regval, LPC54_WWDT_MOD);
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up_disable_irq(LPC54M4_IRQ_WWDT);
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up_disable_irq(LPC54_IRQ_WDT);
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}
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leave_critical_section(flags);
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@ -639,15 +639,15 @@ void lpc54_wwdt_initialize(FAR const char *devpath)
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priv->ops = &g_wdgops;
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/* Turn on and configure the Watchdog oscillator. See the PDEN_WDT_OSC bit
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* in the PDRUNCG0 register, and the Watchdog oscillator control register,
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* WDTOSCCTRL.
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/* Turn on and configure the Watchdog oscillator. Set the PDEN_WDT_OSC bit
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* in the PDRUNCG0 register and setup the Watchdog oscillator control
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* register, WDTOSCCTRL.
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*/
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lpc54_wdtosc_powerup();
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#warning "Mising logic"
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#warning "Mising WDTOSCCTRL setup"
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/* Enable the register interface (WWDT bus clock): set the WWDT bit in the
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/* Enable the register interface (WWDT bus clock): Set the WWDT bit in the
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* AHBCLKCTRL0 register.
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*/
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@ -657,13 +657,13 @@ void lpc54_wwdt_initialize(FAR const char *devpath)
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* wake-up in the STARTER0 register.
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*/
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/* Set watchdog mode register o zero */
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/* Set watchdog mode register to zero */
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putreg32(0, LPC54_WWDT_MOD);
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/* Attach our watchdog interrupt handler (But don't enable it yet) */
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(void)irq_attach(LPC54M4_IRQ_WWDT, lpc54_interrupt);
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(void)irq_attach(LPC54_IRQ_WDT, lpc54_wwdt_interrupt);
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/* Select an arbitrary initial timeout value. But don't start the watchdog
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* yet. NOTE: If the "Hardware watchdog" feature is enabled through the
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