SAMA5D3x-EK NAND: Integrate SAMA5 NAND support into SAMA5D3x-EK board support
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@ -6104,3 +6104,5 @@
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Ken Pettit (2013-11-23)
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* tools/mkctags.sh: A script for creating ctags from Ken Pettit
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(2013-11-23)
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* configs/sama5d3x-ek/src/sam_nand.c: Add support for auto-mounting
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NAND MTD block or NXFFS devices (2013-11-25).
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@ -3046,7 +3046,7 @@ endchoice # CS0 Memory Type
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choice
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prompt "NAND ECC type"
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default SAMA5_EBICS0_ECCNONE
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depends on SAMA5_EBICS0_NAND
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depends on SAMA5_EBICS0_NAND
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config SAMA5_EBICS0_ECCNONE
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bool "No ECC"
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@ -3129,7 +3129,7 @@ endchoice # CS1 Memory Type
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choice
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prompt "NAND ECC type"
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default SAMA5_EBICS1_ECCNONE
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depends on SAMA5_EBICS1_NAND
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depends on SAMA5_EBICS1_NAND
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config SAMA5_EBICS1_ECCNONE
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bool "No ECC"
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@ -3212,7 +3212,7 @@ endchoice # CS2 Memory Type
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choice
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prompt "NAND ECC type"
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default SAMA5_EBICS2_ECCNONE
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depends on SAMA5_EBICS2_NAND
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depends on SAMA5_EBICS2_NAND
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config SAMA5_EBICS2_ECCNONE
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bool "No ECC"
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@ -3295,7 +3295,7 @@ endchoice # CS3 Memory Type
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choice
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prompt "NAND ECC type"
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default SAMA5_EBICS3_ECCNONE
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depends on SAMA5_EBICS3_NAND
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depends on SAMA5_EBICS3_NAND
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config SAMA5_EBICS3_ECCNONE
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bool "No ECC"
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@ -263,25 +263,46 @@
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#define SAM_AXIMX_MMUFLAGS MMU_IOFLAGS
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#define SAM_DAP_MMUFLAGS MMU_IOFLAGS
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/* SDRAM is a special case because it requires non-cached access of its
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* initial configuration, then caached access thereafter.
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*/
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#define SAM_DDRCS_MMUFLAGS MMU_MEMFLAGS
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#if defined(CONFIG_SAMA5_EBICS0_SRAM) || defined(CONFIG_SAMA5_EBICS0_PSRAM)
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/* The external memory regions may support all access if they host SRAM,
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* PSRAM, or SDRAM. NAND memory requires write access for NAND control and
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* so should be uncached.
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*/
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#if defined(CONFIG_SAMA5_EBICS0_SRAM) || defined(CONFIG_SAMA5_EBICS0_PSRAM) || \
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defined(CONFIG_SAMA5_EBICS0_NAND)
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# define SAM_EBICS0_MMUFLAGS MMU_MEMFLAGS
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#elif defined(CONFIG_SAMA5_EBICS0_NAND)
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# define SAM_EBICS0_MMUFLAGS MMU_IOFLAGS
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#else
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# define SAM_EBICS0_MMUFLAGS MMU_ROMFLAGS
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#endif
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#if defined(CONFIG_SAMA5_EBICS1_SRAM) || defined(CONFIG_SAMA5_EBICS1_PSRAM)
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# define SAM_EBICS1_MMUFLAGS MMU_MEMFLAGS
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#elif defined(CONFIG_SAMA5_EBICS1_NAND)
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# define SAM_EBICS2_MMUFLAGS MMU_IOFLAGS
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#else
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# define SAM_EBICS1_MMUFLAGS MMU_ROMFLAGS
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#endif
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#if defined(CONFIG_SAMA5_EBICS2_SRAM) || defined(CONFIG_SAMA5_EBICS2_PSRAM)
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# define SAM_EBICS2_MMUFLAGS MMU_MEMFLAGS
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#elif defined(CONFIG_SAMA5_EBICS2_NAND)
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# define SAM_EBICS2_MMUFLAGS MMU_IOFLAGS
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#else
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# define SAM_EBICS2_MMUFLAGS MMU_ROMFLAGS
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#endif
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#if defined(CONFIG_SAMA5_EBICS3_SRAM) || defined(CONFIG_SAMA5_EBICS3_PSRAM)
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# define SAM_EBICS3_MMUFLAGS MMU_MEMFLAGS
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#elif defined(CONFIG_SAMA5_EBICS3_NAND)
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# define SAM_EBICS3_MMUFLAGS MMU_IOFLAGS
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#else
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# define SAM_EBICS3_MMUFLAGS MMU_ROMFLAGS
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#endif
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@ -235,7 +235,7 @@ static const struct section_mapping_s section_mapping[] =
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SAM_EBICS3_MMUFLAGS, SAM_EBICS3_NSECTIONS
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},
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#endif
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#ifdef CONFIG_SAMA5_NFCCR
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#ifdef CONFIG_SAMA5_HAVE_NAND
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{ SAM_NFCCR_PSECTION, SAM_NFCCR_VSECTION,
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SAM_NFCCR_MMUFLAGS, SAM_NFCCR_NSECTIONS
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},
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@ -359,7 +359,7 @@ static void nand_cmdsend(struct sam_nandcs_s *priv, uint32_t cmd,
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/* Wait until host controller is not busy. */
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while ((nand_getreg(NFCCMD_BASE + NFCADDR_CMD_NFCCMD) & 0x8000000) != 0);
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while ((nand_getreg(NFCCMD_BASE + NFCADDR_CMD_NFCCMD) & 0x08000000) != 0);
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nand_setup_cmddone(priv);
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/* Send the command plus the ADDR_CYCLE */
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@ -604,11 +604,9 @@ static void nand_nfc_configure(struct sam_nandcs_s *priv, uint8_t mode,
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regval = NFCADDR_CMD_DATADIS;
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}
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if (((mode & HSMC_ALE_COL_EN) == HSMC_ALE_COL_EN) ||
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((mode & HSMC_ALE_ROW_EN) == HSMC_ALE_ROW_EN))
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if (((mode & HSMC_ALE_COL_EN) != 0) || ((mode & HSMC_ALE_ROW_EN) != 0))
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{
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bool rowonly = (((mode & HSMC_ALE_COL_EN) == 0) &&
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((mode & HSMC_ALE_ROW_EN) == HSMC_ALE_ROW_EN));
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bool rowonly = ((mode & HSMC_ALE_COL_EN) == 0);
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nand_translate_address(priv, coladdr, rowaddr, &acycle0, &acycle1234, rowonly);
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acycle = nand_get_acycle(ncycles);
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}
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@ -643,7 +641,7 @@ static void nand_wait_cmddone(struct sam_nandcs_s *priv)
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irqstate_t flags;
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int ret;
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/* Wait for the XFRDONE interrupt to occur */
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/* Wait for the CMDDONE interrupt to occur */
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flags = irqsave();
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while (!g_nand.cmddone)
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@ -655,6 +653,8 @@ static void nand_wait_cmddone(struct sam_nandcs_s *priv)
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}
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}
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/* Disable further CMDDONE interrupts */
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g_nand.cmddone = false;
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nand_putreg(SAM_HSMC_IDR, HSMC_NFCINT_CMDDONE);
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irqrestore(flags);
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@ -689,7 +689,7 @@ static void nand_setup_cmddone(struct sam_nandcs_s *priv)
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/* Enable the CMDDONE interrupt */
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nand_putreg(SAM_HSMC_IDR, HSMC_NFCINT_CMDDONE);
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nand_putreg(SAM_HSMC_IER, HSMC_NFCINT_CMDDONE);
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irqrestore(flags);
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}
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@ -724,6 +724,8 @@ static void nand_wait_xfrdone(struct sam_nandcs_s *priv)
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}
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}
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/* Disable further XFRDONE interrupts */
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g_nand.xfrdone = false;
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nand_putreg(SAM_HSMC_IDR, HSMC_NFCINT_XFRDONE);
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irqrestore(flags);
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@ -758,7 +760,7 @@ static void nand_setup_xfrdone(struct sam_nandcs_s *priv)
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/* Enable the XFRDONE interrupt */
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nand_putreg(SAM_HSMC_IDR, HSMC_NFCINT_XFRDONE);
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nand_putreg(SAM_HSMC_IER, HSMC_NFCINT_XFRDONE);
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irqrestore(flags);
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}
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@ -793,6 +795,8 @@ static void nand_wait_rbedge(struct sam_nandcs_s *priv)
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}
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}
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/* Disable further RBEDGE interrupts */
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g_nand.rbedge = false;
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nand_putreg(SAM_HSMC_IDR, HSMC_NFCINT_RBEDGE0);
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irqrestore(flags);
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@ -827,7 +831,7 @@ static void nand_setup_rbedge(struct sam_nandcs_s *priv)
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/* Enable the EBEDGE0 interrupt */
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nand_putreg(SAM_HSMC_IDR, HSMC_NFCINT_RBEDGE0);
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nand_putreg(SAM_HSMC_IER, HSMC_NFCINT_RBEDGE0);
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irqrestore(flags);
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}
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@ -1714,6 +1718,8 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
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off_t rowaddr;
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int ret = OK;
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fvdbg("Block %d Page %d\n", block, page);
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/* Get page and spare sizes */
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pagesize = nandmodel_getpagesize(&priv->raw.model);
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@ -1765,7 +1771,6 @@ static int nand_writepage_noecc(struct sam_nandcs_s *priv, off_t block,
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/* Calculate physical address of the page */
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rowaddr = block * nandmodel_pagesperblock(&priv->raw.model) + page;
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fvdbg("Block %d Page %d\n", block, page);
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/* Handle the case where we use NFC SRAM */
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@ -2448,51 +2453,7 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
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sem_init(&priv->waitsem, 0, 0);
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/* Initialize the NAND hardware */
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/* Perform board-specific SMC intialization for this CS */
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ret = board_nandflash_config(cs);
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if (ret < 0)
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{
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fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n",
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cs, ret);
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return NULL;
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}
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/* Reset the NAND FLASH part */
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nand_reset(priv);
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/* Probe the NAND part. On success, an MTD interface that wraps
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* our raw NAND interface is returned.
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*/
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mtd = nand_initialize(&priv->raw);
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if (!mtd)
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{
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fdbg("ERROR: CS%d nand_initialize failed %d\n", cs);
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return NULL;
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}
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/* Allocate a DMA channel for NAND transfers
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* REVISIT: Need DMA channel setup.
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*/
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if (nandmodel_getbuswidth(&priv->raw.model) == 16)
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{
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priv->dma = sam_dmachannel(1, DMA_FLAGS16);
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}
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else
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{
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priv->dma = sam_dmachannel(1, DMA_FLAGS8);
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}
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if (!priv->dma)
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{
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fdbg("ERROR: Failed to allocate the DMA channel for CS%d\n", cs);
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}
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/* Enable the NAND FLASH controller */
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/* Perform one-time, global NFC/PMECC initialization */
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if (!g_nand.initialized)
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{
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@ -2537,6 +2498,48 @@ struct mtd_dev_s *sam_nand_initialize(int cs)
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g_nand.initialized = true;
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}
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/* Initialize the NAND hardware for this CS */
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/* Perform board-specific SMC intialization for this CS */
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ret = board_nandflash_config(cs);
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if (ret < 0)
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{
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fdbg("ERROR: board_nandflash_config failed for CS%d: %d\n",
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cs, ret);
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return NULL;
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}
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/* Reset the NAND FLASH part */
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nand_reset(priv);
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/* Probe the NAND part. On success, an MTD interface that wraps
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* our raw NAND interface is returned.
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*/
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mtd = nand_initialize(&priv->raw);
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if (!mtd)
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{
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fdbg("ERROR: CS%d nand_initialize failed %d\n", cs);
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return NULL;
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}
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/* Allocate a DMA channel for NAND transfers */
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if (nandmodel_getbuswidth(&priv->raw.model) == 16)
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{
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priv->dma = sam_dmachannel(1, DMA_FLAGS16);
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}
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else
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{
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priv->dma = sam_dmachannel(1, DMA_FLAGS8);
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}
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if (!priv->dma)
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{
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fdbg("ERROR: Failed to allocate the DMA channel for CS%d\n", cs);
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}
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/* Return the MTD wrapper interface as the MTD device */
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return mtd;
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@ -702,7 +702,7 @@ static uint32_t pmecc_correctionalgo(uint32_t isr, uint32_t data)
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}
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#define HSMC_PAGESIZE \
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((1 << ((nand_getreg(SAM_HSMC_PMECCFG) & HSMC_PMECCFG_PAGESIZE_MASK) >> \
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(1 << ((nand_getreg(SAM_HSMC_PMECCFG) & HSMC_PMECCFG_PAGESIZE_MASK) >> \
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HSMC_PMECCFG_PAGESIZE_SHIFT))
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while (sector < (uint32_t)HSMC_PAGESIZE && isr != 0)
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@ -42,13 +42,43 @@ config SAMA5_NOR_START
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option: If SAMA5_NOR_START is defined, then it will not wait but
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will, instead, immediately start the program in NOR FLASH.
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config SAMA5_TSD_DEVMINOR
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int "Touchscreen device minor"
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default 0
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depends on SAMA5_TSD
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config SAMA5_NAND_AUTOMOUNT
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bool "NAND FLASH auto-mount"
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default n
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depends on NSH_ARCHINIT && SAMA5_EBICS3_NAND
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---help---
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This touchscreen will be register as /dev/inputN where the value of
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N is provided by this configuration setting.
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Automatically initialize the NAND FLASH driver when NSH starts.
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choice
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prompt "NAND FLASH configuration"
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default SAMA5_NAND_NXFFS
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depends on SAMA5_NAND_AUTOMOUNT
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config SAMA5_NAND_FTL
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bool "Create NAND FLASH block driver"
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---help---
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Create the MTD driver for the NAND and "wrap" the NAND as a standard
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block driver that could then, for example, be mounted using FAT or
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any other file system. Any file system may be used, but there will
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be no wear-leveling.
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NOTE: This options is not currently recommended. There is not now
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NuttX file system that can handle the NAND back blocks or performs
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wear-leveling other than NXFFS and NXFFS does not use a block driver
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but, rather, operates directly upon the NAND MTD device.
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config SAMA5_NAND_NXFFS
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bool "Create NAND FLASH NXFFS file system"
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depends on FS_NXFFS
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---help---
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Create the MTD driver for the NAND and mount the NAND device as
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a wear-leveling, NuttX FLASH file system (NXFFS). The downside of
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NXFFS is that it can be very slow.
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NOTE: NXFFS is recommended because (1) it can handle the NAND back
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blocks and (1) performs wear-leveling.
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endchoice # NAND FLASH configuration
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config SAMA5_AT25_AUTOMOUNT
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bool "AT25 serial FLASH auto-mount"
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@ -65,7 +95,7 @@ choice
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config SAMA5_AT25_FTL
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bool "Create AT25 Serial FLASH block driver"
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---help---
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Create the MTD driver for the AT25 and "wrap" the AT25 is a standard
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Create the MTD driver for the AT25 and "wrap" the AT25 as a standard
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block driver that could then, for example, be mounted using FAT or
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any other file system. Any file system may be used, but there will
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be no wear-leveling.
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@ -74,7 +104,7 @@ config SAMA5_AT25_NXFFS
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bool "Create AT25 serial FLASH NXFFS file system"
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depends on FS_NXFFS
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---help---
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Create the MTD driver for the AT25 and and mount the AT25 device as
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Create the MTD driver for the AT25 and mount the AT25 device as
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a wear-leveling, NuttX FLASH file system (NXFFS). The downside of
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NXFFS is that it can be very slow.
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@ -106,7 +136,7 @@ choice
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config SAMA5_AT24_FTL
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bool "Create AT24 block driver"
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---help---
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Create the MTD driver for the AT24 and "wrap" the AT24 is a standard
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Create the MTD driver for the AT24 and "wrap" the AT24 as a standard
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block driver that could then, for example, be mounted using FAT or
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any other file system. Any file system may be used, but there will
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be no wear-leveling.
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@ -115,12 +145,20 @@ config SAMA5_AT24_NXFFS
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bool "Create AT24 NXFFS file system"
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depends on FS_NXFFS
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---help---
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Create the MTD driver for the AT24 and and mount the AT24 device as
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Create the MTD driver for the AT24 and mount the AT24 device as
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a wear-leveling, NuttX FLASH file system (NXFFS). The downside of
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NXFFS is that it can be very slow.
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endchoice # AT24 serial EPPROM configuration
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config SAMA5_TSD_DEVMINOR
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int "Touchscreen device minor"
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default 0
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depends on SAMA5_TSD
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---help---
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This touchscreen will be register as /dev/inputN where the value of
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N is provided by this configuration setting.
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config SAMA5D3X_EK_CHANNEL
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int "PWM channel number"
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default 0 if SAMA5_PWM_CHAN0
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@ -133,8 +171,6 @@ config SAMA5D3X_EK_CHANNEL
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Selects the PWM channel number that will be used to perform the PWM
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test. See apps/examples/pwm.
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endif
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if AUDIO_I2SCHAR && (SAMA5_SSC0 || SAMA5_SSC1)
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if SAMA5_SSC0 && SAMA5_SSC1
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@ -172,4 +208,6 @@ config SAMA5D3X_EK_I2SCHAR_MINOR
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device. The driver will be registered at /dev/is2charN where N is
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the value provided by this setting.
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endif # AUDIO_I2SCHAR && (SAMA5_SSC0 || SAMA5_SSC1)
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endif # ARCH_BOARD_SAMA5D3X_EK
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@ -640,6 +640,48 @@ USB Ports
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||||
---- ----------- -------------------------------------------------------
|
||||
PD28 OVCUR_USB Combined overrcurrent indication from port A and B
|
||||
|
||||
NAND Support
|
||||
============
|
||||
NAND Support can be added to the the NSH configuration by modifying the
|
||||
NuttX configuration file as follows:
|
||||
|
||||
System Type -> SAMA5 Peripheal support
|
||||
CONFIG_SAMA5_DMAC1=y : Use DMA1 for memory-to-memory DMA
|
||||
CONFIG_SAMA5_HSMC=y : Make sure that the SMC is enabled
|
||||
|
||||
Drivers -> Memory Technology Device (MTD) Support
|
||||
CONFIG_MTD=y : Enable MTD support
|
||||
CONFIG_MTD_NAND=y : Enable NAND support
|
||||
CONFIG_MTD_NAND_BLOCKCHECK=y : Enable bad block checking support
|
||||
CONFIG_MTD_NAND_HWECC=y : Use H/W ECC calculation
|
||||
|
||||
Defaults for all other NAND settings should be okay
|
||||
|
||||
System Type -> External Memory Configuration
|
||||
CONFIG_SAMA5_EBICS3=y : Enable External CS3 memory
|
||||
CONFIG_SAMA5_EBICS3_NAND=y : Select NAND memory type
|
||||
CONFIG_SAMA5_EBICS3_SIZE=8388608 : Use this size
|
||||
CONFIG_SAMA5_EBICS3_PMECC=y : Use H/W ECC calculation
|
||||
CONFIG_SAMA5_PMECC_EMBEDDEDALGO=n : Use the software PMECC algorithm
|
||||
CONFIG_SAMA5_PMECC_GALOIS_ROMTABLES=y : use the ROM Galois tables
|
||||
|
||||
Defaults for ROM page table addresses should be okay
|
||||
|
||||
File Systems:
|
||||
CONFIG_FS_NXFFS=y : Enable the NXFFS file system
|
||||
|
||||
Defaults for all other NXFFS settings should be okay
|
||||
|
||||
Board Selection
|
||||
CONFIG_SAMA5_NAND_AUTOMOUNT=y : Enable FS support on NAND
|
||||
CONFIG_SAMA5_NAND_NXFFS=y : Use the NXFFS file system
|
||||
|
||||
Other file systems are not recommended because only NXFFS can handle
|
||||
bad blocks and only NXFFS performs wear-leveling.
|
||||
|
||||
Application Configuration -> NSH Library
|
||||
CONFIG_NSH_ARCHINIT=y : Use architecture-specific initialization
|
||||
|
||||
AT24 Serial EEPROM
|
||||
==================
|
||||
|
||||
@ -2881,9 +2923,5 @@ To-Do List
|
||||
do with the camera. NuttX needs something liek V4L to provide the
|
||||
definition for what a camera driver is supposed to do.
|
||||
|
||||
11) NAND. There is no NAND support. A NAND driver is a complex thing
|
||||
because it must support not only basic NAND access but also bad block
|
||||
detection, sparing and ECC. Lots of work!
|
||||
|
||||
12) GMAC has only been tested on a 10/100Base-T network. I don't have a
|
||||
11) GMAC has only been tested on a 10/100Base-T network. I don't have a
|
||||
1000Base-T network to support additional testing.
|
||||
|
@ -81,14 +81,14 @@
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_at24_initialize
|
||||
* Name: sam_at24_automount
|
||||
*
|
||||
* Description:
|
||||
* Initialize and configure the AT24 serial EEPROM
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int sam_at24_initialize(int minor)
|
||||
int sam_at24_automount(int minor)
|
||||
{
|
||||
FAR struct i2c_dev_s *i2c;
|
||||
FAR struct mtd_dev_s *mtd;
|
||||
@ -127,7 +127,7 @@ int sam_at24_initialize(int minor)
|
||||
ret = ftl_initialize(AT24_MINOR, mtd);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: Initialize the FTL layer\n");
|
||||
fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -138,7 +138,7 @@ int sam_at24_initialize(int minor)
|
||||
ret = nxffs_initialize(mtd);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
|
||||
fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -64,14 +64,14 @@
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_at25_initialize
|
||||
* Name: sam_at25_automount
|
||||
*
|
||||
* Description:
|
||||
* Initialize and configure the AT25 serial FLASH
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int sam_at25_initialize(int minor)
|
||||
int sam_at25_automount(int minor)
|
||||
{
|
||||
FAR struct spi_dev_s *spi;
|
||||
FAR struct mtd_dev_s *mtd;
|
||||
@ -106,7 +106,7 @@ int sam_at25_initialize(int minor)
|
||||
ret = ftl_initialize(AT25_MINOR, mtd);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: Initialize the FTL layer\n");
|
||||
fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -116,7 +116,7 @@ int sam_at25_initialize(int minor)
|
||||
ret = nxffs_initialize(mtd);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: NXFFS initialization failed: %d\n", -ret);
|
||||
fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -46,8 +46,15 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/mount.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/mtd/mtd.h>
|
||||
#include <nuttx/fs/nxffs.h>
|
||||
|
||||
#include "up_arch.h"
|
||||
#include "sam_periphclks.h"
|
||||
#include "sam_nand.h"
|
||||
@ -55,7 +62,7 @@
|
||||
|
||||
#include "sama5d3x-ek.h"
|
||||
|
||||
#ifdef CONFIG_SAMA5_BOOT_CS3FLASH
|
||||
#ifdef CONFIG_SAMA5_EBICS3_NAND
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
@ -73,7 +80,7 @@
|
||||
* Name: board_nandflash_config
|
||||
*
|
||||
* Description:
|
||||
* If CONFIG_SAMA5_BOOT_CS3FLASH is defined, then NAND FLASH support is
|
||||
* If CONFIG_SAMA5_EBICS3_NAND is defined, then NAND FLASH support is
|
||||
* enabled. This function provides the board-specific implementation of
|
||||
* the logic to reprogram the SMC to support NAND FLASH on the specified
|
||||
* CS.
|
||||
@ -137,4 +144,70 @@ int board_nandflash_config(int cs)
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SAMA5_BOOT_CS3FLASH */
|
||||
/****************************************************************************
|
||||
* Name: sam_nand_automount
|
||||
*
|
||||
* Description:
|
||||
* Initialize and configure the NAND on CS3
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef HAVE_NAND
|
||||
int sam_nand_automount(int minor)
|
||||
{
|
||||
FAR struct mtd_dev_s *mtd;
|
||||
static bool initialized = false;
|
||||
int ret;
|
||||
|
||||
/* Have we already initialized? */
|
||||
|
||||
if (!initialized)
|
||||
{
|
||||
/* Create and initialize an NAND MATD device */
|
||||
|
||||
mtd = sam_nand_initialize(HSMC_CS3);
|
||||
if (!mtd)
|
||||
{
|
||||
fdbg("ERROR: Failed to create the NAND driver on CS%d\n", HSMC_CS3);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_SAMA5_NAND_FTL)
|
||||
/* Use the FTL layer to wrap the MTD driver as a block driver */
|
||||
|
||||
ret = ftl_initialize(NAND_MINOR, mtd);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: Failed to initialize the FTL layer: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_SAMA5_NAND_NXFFS)
|
||||
/* Initialize to provide NXFFS on the MTD interface */
|
||||
|
||||
ret = nxffs_initialize(mtd);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: NXFFS initialization failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Mount the file system at /mnt/nand */
|
||||
|
||||
ret = mount(NULL, "/mnt/nand", "nxffs", 0, NULL);
|
||||
if (ret < 0)
|
||||
{
|
||||
fdbg("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
/* Now we are intialized */
|
||||
|
||||
initialized = true;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_SAMA5_EBICS3_NAND */
|
||||
|
@ -86,18 +86,29 @@
|
||||
|
||||
int nsh_archinitialize(void)
|
||||
{
|
||||
#if defined(HAVE_AT25) || defined(HAVE_AT24) || defined(HAVE_HSMCI) || \
|
||||
defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR)
|
||||
#if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_AT24) || \
|
||||
defined(HAVE_HSMCI) || defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR)
|
||||
int ret;
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_NAND
|
||||
/* Initialize the NAND driver */
|
||||
|
||||
ret = sam_nand_automount(NAND_MINOR);
|
||||
if (ret < 0)
|
||||
{
|
||||
message("ERROR: sam_nand_automount failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_AT25
|
||||
/* Initialize the AT25 driver */
|
||||
|
||||
ret = sam_at25_initialize(AT25_MINOR);
|
||||
ret = sam_at25_automount(AT25_MINOR);
|
||||
if (ret < 0)
|
||||
{
|
||||
message("ERROR: sam_at25_initialize failed: %d\n", ret);
|
||||
message("ERROR: sam_at25_automount failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
@ -105,10 +116,10 @@ int nsh_archinitialize(void)
|
||||
#ifdef HAVE_AT24
|
||||
/* Initialize the AT24 driver */
|
||||
|
||||
ret = sam_at24_initialize(AT24_MINOR);
|
||||
ret = sam_at24_automount(AT24_MINOR);
|
||||
if (ret < 0)
|
||||
{
|
||||
message("ERROR: sam_at24_initialize failed: %d\n", ret);
|
||||
message("ERROR: sam_at24_automount failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
@ -110,10 +110,10 @@ int usbmsc_archinitialize(void)
|
||||
/* Initialize the AT25 MTD driver */
|
||||
|
||||
#ifdef HAVE_AT25
|
||||
int ret = sam_at25_initialize(AT25_MINOR);
|
||||
int ret = sam_at25_automount(AT25_MINOR);
|
||||
if (ret < 0)
|
||||
{
|
||||
message("ERROR: sam_at25_initialize failed: %d\n", ret);
|
||||
message("ERROR: sam_at25_automount failed: %d\n", ret);
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
@ -58,6 +58,7 @@
|
||||
#define HAVE_HSMCI 1
|
||||
#define HAVE_AT24 1
|
||||
#define HAVE_AT25 1
|
||||
#define HAVE_NAND 1
|
||||
#define HAVE_USBHOST 1
|
||||
#define HAVE_USBDEV 1
|
||||
#define HAVE_USBMONITOR 1
|
||||
@ -84,6 +85,39 @@
|
||||
# undef HAVE_HSMCI
|
||||
#endif
|
||||
|
||||
/* NAND FLASH */
|
||||
/* Can't support the NAND device if NAND flash is not configured on EBI CS3 */
|
||||
|
||||
#ifndef CONFIG_SAMA5_EBICS3_NAND
|
||||
# undef HAVE_NAND
|
||||
#endif
|
||||
|
||||
/* Can't support NAND features if mountpoints are disabled or if we were not
|
||||
* asked to mount the NAND part
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5_NAND_AUTOMOUNT)
|
||||
# undef HAVE_NAND
|
||||
#endif
|
||||
|
||||
/* If we are going to mount the NAND, then they user must also have told
|
||||
* us what to do with it by setting one of these.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_FS_NXFFS
|
||||
# undef CONFIG_SAMA5_NAND_NXFFS
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_SAMA5_NAND_FTL) && !defined(CONFIG_SAMA5_NAND_NXFFS)
|
||||
# undef HAVE_NAND
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SAMA5_NAND_FTL) && defined(CONFIG_SAMA5_NAND_NXFFS)
|
||||
# warning Both CONFIG_SAMA5_NAND_FTL and CONFIG_SAMA5_NAND_NXFFS are set
|
||||
# warning Ignoring CONFIG_SAMA5_NAND_NXFFS
|
||||
# undef CONFIG_SAMA5_NAND_NXFFS
|
||||
#endif
|
||||
|
||||
/* AT25 Serial FLASH */
|
||||
/* Can't support the AT25 device if it SPI0 or AT25 support are not enabled */
|
||||
|
||||
@ -167,15 +201,28 @@
|
||||
# undef CONFIG_SAMA5_AT24_NXFFS
|
||||
#endif
|
||||
|
||||
/* Assign minor device numbers. We will also use MINOR number 0 for the AT25.
|
||||
* It should appear as /dev/mtdblock0
|
||||
/* Assign minor device numbers. For example, if we also use MINOR number 0
|
||||
* for the AT25, it should appear as /dev/mtdblock0
|
||||
*/
|
||||
|
||||
#ifdef HAVE_AT25
|
||||
# define AT25_MINOR 0
|
||||
# define AT24_MINOR 1
|
||||
#define _NAND_MINOR 0
|
||||
|
||||
#ifdef HAVE_NAND
|
||||
# define NAND_MINOR _NAND_MINOR
|
||||
# define _AT25_MINOR (_NAND_MINOR+1)
|
||||
#else
|
||||
# define AT24_MINOR 0
|
||||
# define _AT25_MINOR _NAND_MINOR
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_AT25
|
||||
# define AT25_MINOR _AT25_MINOR
|
||||
# define _AT24_MINOR (_AT25_MINOR+1)
|
||||
#else
|
||||
# define _AT24_MINOR _AT25_MINOR
|
||||
#endif
|
||||
|
||||
#ifdef HAVE_AT24
|
||||
# define AT24_MINOR _AT24_MINOR
|
||||
#endif
|
||||
|
||||
/* MMC/SD minor numbers: The NSH device minor extended is extened to support
|
||||
@ -549,7 +596,19 @@ void sam_sdram_config(void);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_at25_initialize
|
||||
* Name: sam_nand_automount
|
||||
*
|
||||
* Description:
|
||||
* Initialize and configure the NAND on CS3
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef HAVE_NAND
|
||||
int sam_nand_automount(int minor);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_at25_automount
|
||||
*
|
||||
* Description:
|
||||
* Initialize and configure the AT25 serial FLASH
|
||||
@ -557,11 +616,11 @@ void sam_sdram_config(void);
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef HAVE_AT25
|
||||
int sam_at25_initialize(int minor);
|
||||
int sam_at25_automount(int minor);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_at24_initialize
|
||||
* Name: sam_at24_automount
|
||||
*
|
||||
* Description:
|
||||
* Initialize and configure the AT24 serial EEPROM
|
||||
@ -569,7 +628,7 @@ int sam_at25_initialize(int minor);
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef HAVE_AT24
|
||||
int sam_at24_initialize(int minor);
|
||||
int sam_at24_automount(int minor);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -64,10 +64,10 @@ extern "C" {
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
EXTERN int mount(const char *source, const char *target,
|
||||
const char *filesystemtype, unsigned long mountflags,
|
||||
const void *data);
|
||||
EXTERN int umount(const char *target);
|
||||
int mount(const char *source, const char *target,
|
||||
const char *filesystemtype, unsigned long mountflags,
|
||||
const void *data);
|
||||
int umount(const char *target);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
|
Loading…
Reference in New Issue
Block a user