SAMA5 Ethernet: Add support for PHY interrupts
This commit is contained in:
Gregory Nutt
parent
7c13790901
commit
45e4425687
@ -61,7 +61,7 @@
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#include "chip.h"
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#include "sam_pio.h"
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#include "sam_emac.h"
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#include "sam_ethernet.h"
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#include <arch/board/board.h>
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@ -2331,16 +2331,23 @@ static inline void sam_selectrmii(void)
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static inline void sam_ethgpioconfig(FAR struct sam_emac_s *priv)
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{
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/* Configure GPIO pins to support Ethernet */
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/* Configure PIO pins to support EMAC */
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/* Configure EMAC PIO pins common to both MII and RMII */
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#if defined(CONFIG_SAMA5_MII) || defined(CONFIG_SAMA5_RMII)
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sam_configpio(PIO_EMAC_TX0);
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sam_configpio(PIO_EMAC_TX1);
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sam_configpio(PIO_EMAC_RX0);
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sam_configpio(PIO_EMAC_RX1);
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sam_configpio(PIO_EMAC_TXEN);
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sam_configpio(PIO_EMAC_CRSDV);
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sam_configpio(PIO_EMAC_RXER);
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sam_configpio(PIO_EMAC_REFCK);
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/* MDC and MDIO are common to both modes */
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sam_configgpio(GPIO_EMAC_MDC);
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sam_configgpio(GPIO_EMAC_MDIO);
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/* Set up the MII interface */
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sam_configpio(PIO_EMAC_MDC);
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sam_configpio(PIO_EMAC_MDIO);
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#if defined(CONFIG_SAMA5_MII)
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@ -2348,60 +2355,11 @@ static inline void sam_ethgpioconfig(FAR struct sam_emac_s *priv)
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sam_selectmii();
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/* Provide clocking via MCO, MCO1 or MCO2:
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*
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* "MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
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* clock (through a configurable prescaler) on PA8 pin."
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*
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* "MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or
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* PLLI2S clock (through a configurable prescaler) on PC9 pin."
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*/
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/* Provide clocking */
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#warning Missing logic
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# if defined(CONFIG_SAMA5_MII_MCO1)
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/* Configure MC01 to drive the PHY. Board logic must provide MC01 clocking
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* info.
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*/
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sam_configgpio(GPIO_MCO1);
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sam_mco1config(BOARD_CFGR_MC01_SOURCE, BOARD_CFGR_MC01_DIVIDER);
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# elif defined(CONFIG_SAMA5_MII_MCO2)
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/* Configure MC02 to drive the PHY. Board logic must provide MC02 clocking
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* info.
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*/
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sam_configgpio(GPIO_MCO2);
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sam_mco2config(BOARD_CFGR_MC02_SOURCE, BOARD_CFGR_MC02_DIVIDER);
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# elif defined(CONFIG_SAMA5_MII_MCO)
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/* Setup MCO pin for alternative usage */
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sam_configgpio(GPIO_MCO);
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sam_mcoconfig(BOARD_CFGR_MCO_SOURCE);
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# endif
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/* MII interface pins (17):
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*
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* MII_TX_CLK, MII_TXD[3:0], MII_TX_EN, MII_RX_CLK, MII_RXD[3:0], MII_RX_ER,
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* MII_RX_DV, MII_CRS, MII_COL, MDC, MDIO
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*/
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sam_configgpio(GPIO_EMAC_MII_COL);
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sam_configgpio(GPIO_EMAC_MII_CRS);
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sam_configgpio(GPIO_EMAC_MII_RXD0);
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sam_configgpio(GPIO_EMAC_MII_RXD1);
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sam_configgpio(GPIO_EMAC_MII_RXD2);
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sam_configgpio(GPIO_EMAC_MII_RXD3);
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sam_configgpio(GPIO_EMAC_MII_RX_CLK);
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sam_configgpio(GPIO_EMAC_MII_RX_DV);
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sam_configgpio(GPIO_EMAC_MII_RX_ER);
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sam_configgpio(GPIO_EMAC_MII_TXD0);
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sam_configgpio(GPIO_EMAC_MII_TXD1);
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sam_configgpio(GPIO_EMAC_MII_TXD2);
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sam_configgpio(GPIO_EMAC_MII_TXD3);
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sam_configgpio(GPIO_EMAC_MII_TX_CLK);
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sam_configgpio(GPIO_EMAC_MII_TX_EN);
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/* Set up the RMII interface. */
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#elif defined(CONFIG_SAMA5_RMII)
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@ -2410,59 +2368,10 @@ static inline void sam_ethgpioconfig(FAR struct sam_emac_s *priv)
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sam_selectrmii();
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/* Provide clocking via MCO, MCO1 or MCO2:
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*
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* "MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL
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* clock (through a configurable prescaler) on PA8 pin."
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*
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* "MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or
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* PLLI2S clock (through a configurable prescaler) on PC9 pin."
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*/
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# if defined(CONFIG_SAMA5_RMII_MCO1)
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/* Configure MC01 to drive the PHY. Board logic must provide MC01 clocking
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* info.
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*/
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sam_configgpio(GPIO_MCO1);
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sam_mco1config(BOARD_CFGR_MC01_SOURCE, BOARD_CFGR_MC01_DIVIDER);
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# elif defined(CONFIG_SAMA5_RMII_MCO2)
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/* Configure MC02 to drive the PHY. Board logic must provide MC02 clocking
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* info.
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*/
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sam_configgpio(GPIO_MCO2);
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sam_mco2config(BOARD_CFGR_MC02_SOURCE, BOARD_CFGR_MC02_DIVIDER);
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# elif defined(CONFIG_SAMA5_RMII_MCO)
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/* Setup MCO pin for alternative usage */
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sam_configgpio(GPIO_MCO);
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sam_mcoconfig(BOARD_CFGR_MCO_SOURCE);
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# endif
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/* RMII interface pins (7):
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*
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* RMII_TXD[1:0], RMII_TX_EN, RMII_RXD[1:0], RMII_CRS_DV, MDC, MDIO,
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* RMII_REF_CLK
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*/
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sam_configgpio(GPIO_EMAC_RMII_CRS_DV);
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sam_configgpio(GPIO_EMAC_RMII_REF_CLK);
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sam_configgpio(GPIO_EMAC_RMII_RXD0);
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sam_configgpio(GPIO_EMAC_RMII_RXD1);
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sam_configgpio(GPIO_EMAC_RMII_TXD0);
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sam_configgpio(GPIO_EMAC_RMII_TXD1);
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/* sam_configgpio(GPIO_EMAC_RMII_TX_CLK); not needed? */
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sam_configgpio(GPIO_EMAC_RMII_TX_EN);
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/* Provide clocking */
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#warning Missing logic
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#endif
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#endif
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/* Enable pulse-per-second (PPS) output signal */
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sam_configgpio(GPIO_EMAC_PPS_OUT);
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}
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/****************************************************************************
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@ -2560,7 +2469,16 @@ static void sam_macaddress(FAR struct sam_emac_s *priv)
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dev->d_mac.ether_addr_octet[4], dev->d_mac.ether_addr_octet[5]);
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/* Set the MAC address */
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#warning Missing logic
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regval = (uint32_t)dev->d_mac.ether_addr_octet[0] |,
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(uint32_t)dev->d_mac.ether_addr_octet[1] << 8 |,
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(uint32_t)dev->d_mac.ether_addr_octet[2] << 16 |,
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(uint32_t)dev->d_mac.ether_addr_octet[3] << 24 |,
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sam_putreg(priv, SAM_GMAC_SAB1, regval);
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regval = (uint32_t)dev->d_mac.ether_addr_octet[4] |,
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(uint32_t)dev->d_mac.ether_addr_octet[5] << 8 |,
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sam_putreg(priv, SAM_GMAC_SAT1, regval);
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}
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/****************************************************************************
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@ -2719,7 +2637,7 @@ int sam_emac_initialize(void)
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priv->txpoll = wd_create(); /* Create periodic poll timer */
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priv->txtimeout = wd_create(); /* Create TX timeout timer */
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/* Configure GPIO pins to support Ethernet */
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/* Configure PIO pins to support EMAC */
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sam_ethgpioconfig(priv);
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@ -1,5 +1,5 @@
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/****************************************************************************
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* arch/arm/src/sama5/sam_eth.c
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* arch/arm/src/sama5/sam_ethernet.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -39,7 +39,7 @@
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#include <nuttx/config.h>
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#include <debug.h>
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#include "sam_emac.h"
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#include "sam_ethernet.h"
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#ifdef CONFIG_NET
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@ -1,5 +1,5 @@
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/************************************************************************************
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* arch/arm/src/sama5/sam_eth.h
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* arch/arm/src/sama5/sam_ethernet.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -33,8 +33,8 @@
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H
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#define __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H
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#ifndef __ARCH_ARM_SRC_SAMA5_SAM_ETHERNET_H
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#define __ARCH_ARM_SRC_SAMA5_SAM_ETHERNET_H
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/************************************************************************************
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* Included Files
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@ -44,6 +44,7 @@
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#include "chip.h"
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#include "chip/sam_emac.h"
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#include "chip/sam_gmac.h"
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/************************************************************************************
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* Pre-processor Definitions
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@ -139,5 +140,5 @@ int sam_phy_boardinitialize(int intf);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_SAMA5_SAM_EMAC_H */
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#endif /* __ARCH_ARM_SRC_SAMA5_SAM_ETHERNET_H */
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