Fix virtual address of page table
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2907 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -33,6 +33,11 @@
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*
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****************************************************************************/
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/* Do not change this macro definition without making corresponding name
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* changes in other files. This macro name is used in various places to
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* assure that some file inclusion ordering dependencies are enforced.
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*/
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#ifndef __ARCH_ARM_SRC_ARM_PG_MACROS_H
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#define __ARCH_ARM_SRC_ARM_PG_MACROS_H
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@ -127,6 +132,30 @@
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#define PT_SIZE (4*PTE_NPAGES)
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/* Sizes of Memory Regions **************************************************/
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#define PG_L2_LOCKED_SIZE (4*CONFIG_PAGING_NLOCKED)
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#define PG_L2_PAGED_PSIZE (4*CONFIG_PAGING_NPPAGED)
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#define PG_L2_PAGED_VSIZE (4*CONFIG_PAGING_NVPAGED)
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#define PG_L2_TEXT_PSIZE (PG_L2_LOCKED_SIZE + PG_L2_PAGED_PSIZE)
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#define PG_L2_TEXT_VSIZE (PG_L2_LOCKED_SIZE + PG_L2_PAGED_VSIZE)
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#define PG_L2_DATA_SIZE (4*PG_DATA_NPAGES)
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/* Virtual Page Table Location **********************************************/
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/* Check if the virtual address of the page table has been defined. It should
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* not be defined: architecture specific logic should suppress defining
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* PGTABLE_BASE_VADDR unless: (1) it is defined in the NuttX configuration
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* file, or (2) the page table is position in low memory (because the vectors
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* are in high memory).
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*/
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#ifndef PGTABLE_BASE_VADDR
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# define PGTABLE_BASE_VADDR (CONFIG_DRAM_VSTART + PG_L2_TEXT_VSIZE + PG_L2_DATA_SIZE)
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#endif
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/* Addresses of Memory Regions **********************************************/
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/* We position the locked region PTEs at an offset into the first
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* L2 page table. The L1 entry points to an 1Mb aligned virtual
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* address. The actual L2 entry will be offset into the aligned
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@ -144,7 +173,6 @@
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#define PG_L2_LOCKED_OFFSET (((PG_LOCKED_VBASE & 0x000fffff) >> PAGESHIFT) << 2)
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#define PG_L2_LOCKED_PADDR (PGTABLE_L2_BASE_PADDR + PG_L2_LOCKED_OFFSET)
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#define PG_L2_LOCKED_VADDR (PGTABLE_L2_BASE_VADDR + PG_L2_LOCKED_OFFSET)
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#define PG_L2_LOCKED_SIZE (4*CONFIG_PAGING_NLOCKED)
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/* We position the paged region PTEs immediately after the locked
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* region PTEs. NOTE that the size of the paged regions is much
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@ -157,7 +185,6 @@
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#define PG_L2_PAGED_PADDR (PG_L2_LOCKED_PADDR + PG_L2_LOCKED_SIZE)
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#define PG_L2_PAGED_VADDR (PG_L2_LOCKED_VADDR + PG_L2_LOCKED_SIZE)
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#define PG_L2_PAGED_SIZE (4*CONFIG_PAGING_NVPAGED)
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/* This describes the overall text region */
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@ -166,20 +193,19 @@
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#define PG_L2_TEXT_PADDR PG_L2_LOCKED_PADDR
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#define PG_L2_TEXT_VADDR PG_L2_LOCKED_VADDR
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#define PG_L2_TEXT_SIZE (PG_L2_LOCKED_SIZE + PG_L2_PAGED_SIZE)
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/* We position the data section PTEs just after the text region PTE's */
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#define PG_L1_DATA_PADDR (PGTABLE_BASE_PADDR + ((PG_DATA_VBASE >> 20) << 2))
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#define PG_L1_DATA_VADDR (PGTABLE_BASE_VADDR + ((PG_DATA_VBASE >> 20) << 2))
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#define PG_L2_DATA_PADDR (PG_L2_LOCKED_PADDR + PG_L2_TEXT_SIZE)
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#define PG_L2_DATA_VADDR (PG_L2_LOCKED_VADDR + PG_L2_TEXT_SIZE)
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#define PG_L2_DATA_SIZE (4*PG_DATA_NPAGES)
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#define PG_L2_DATA_PADDR (PG_L2_LOCKED_PADDR + PG_L2_TEXT_PSIZE)
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#define PG_L2_DATA_VADDR (PG_L2_LOCKED_VADDR + PG_L2_TEXT_VSIZE)
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/* Page Table Info: The number of pages in the in the page table
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* (PG_PGTABLE_NPAGES). We position the pagetable PTEs just after
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* the data section PTEs.
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/* Page Table Info **********************************************************/
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/* The number of pages in the in the page table (PG_PGTABLE_NPAGES). We
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* position the pagetable PTEs just after the data section PTEs.
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*/
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#define PG_PGTABLE_NPAGES (PGTABLE_SIZE >> PAGESHIFT)
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@ -190,11 +216,12 @@
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#define PG_L2_PGTABLE_VADDR (PG_L2_DATA_VADDR + PG_L2_DATA_SIZE)
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#define PG_L2_PGTABLE_SIZE (4*PG_DATA_NPAGES)
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/* Vector mapping. One page is required to map the vector table. The
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* vector table could lie in at virtual address zero (or at the start
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* of RAM which is aliased to address zero on the ea3131) or at virtual
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* address 0xfff00000. We only have logic here to support the former
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* case.
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/* Vector Mapping ***********************************************************/
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/* One page is required to map the vector table. The vector table could lie
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* at virtual address zero (or at the start of RAM which is aliased to address
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* zero on the ea3131) or at virtual address 0xfff00000. We only have logic
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* here to support the former case.
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*
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* NOTE: If the vectors are at address zero, the page table will be
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* forced to the highest RAM addresses. If the vectors are at 0xfff0000,
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@ -239,6 +266,8 @@
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# error "Logic missing for high vectors in this case"
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#endif
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/* Page Usage ***************************************************************/
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/* This is the total number of pages used in the text/data mapping: */
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#define PG_TOTAL_NPPAGES (PG_TEXT_NPPAGES + PG_DATA_PAGES + PG_PGTABLE_NPAGES)
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@ -247,6 +276,8 @@
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# error "Total pages required exceeds RAM size"
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#endif
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/* Page Management **********************************************************/
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/* For page managment purposes, the following summarize the "heap" of
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* free pages, operations on free pages and the L2 page table.
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*
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@ -283,6 +283,22 @@
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# error "CONFIG_ARCH_ROMPGTABLE defined; PGTABLE_BASE_P/VADDR not defined"
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# else
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/* If CONFIG_PAGING is selected, then parts of the 1-to-1 virtual memory
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* map probably do not apply because paging logic will probably partition
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* the SRAM section differently. In particular, if the page table is located
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* at the end of SRAM, then the virtual page table address defined below
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* will probably be in error.
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*
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* We work around this header file interdependency by (1) insisting that
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* pg_macros.h be included AFTER this header file, then (2) allowing the
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* pg_macros.h header file to redefine PGTABLE_BASE_VADDR.
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*/
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# if defined(CONFIG_PAGING) && defined(__ARCH_ARM_SRC_ARM_PG_MACROS_H)
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# error "pg_macros.h must be included AFTER this header file"
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# endif
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/* We must declare the page table in ISRAM0 or 1. We decide depending upon
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* where the vector table was place.
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*/
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@ -301,6 +317,14 @@
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# define PGTABLE_BASE_VADDR (LPC313X_INTSRAM0_VADDR+LPC313X_INTSRAM0_SIZE-PGTABLE_SIZE)
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# endif
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# define PGTABLE_IN_HIGHSRAM 1
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/* If CONFIG_PAGING is defined, insisted that pg_macros.h assign the virtual
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* address of the page table.
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*/
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# ifdef CONFIG_PAGING
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# undef PGTABLE_BASE_VADDR
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# endif
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# else
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/* Otherwise, ISRAM1 (or ISRAM0 for the LPC3130) will be mapped so that
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