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arch/arm/src/sama5/sam_gmac.c: Fix a syslog format

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YAMAMOTO Takashi 2020-12-03 15:36:06 +09:00 committed by Xiang Xiao
parent 9450e02f3a
commit 471e94c57b
1 changed files with 20 additions and 15 deletions
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35
arch/arm/src/sama5/sam_gmac.c
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@ -48,6 +48,7 @@
#include <nuttx/config.h>
#include <inttypes.h>
#include <stdint.h>
#include <stdbool.h>
#include <time.h>
@ -969,7 +970,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
up_invalidate_dcache((uintptr_t)rxdesc,
(uintptr_t)rxdesc + sizeof(struct gmac_rxdesc_s));
ninfo("rxndx: %d\n", rxndx);
ninfo("rxndx: %" PRId32 "\n", rxndx);
while ((rxdesc->addr & GMACRXD_ADDR_OWNER) != 0)
{
@ -1080,7 +1081,8 @@ static int sam_recvframe(struct sam_gmac_s *priv)
/* Frame size from the GMAC */
dev->d_len = (rxdesc->status & GMACRXD_STA_FRLEN_MASK);
ninfo("packet %d-%d (%d)\n", priv->rxndx, rxndx, dev->d_len);
ninfo("packet %d-%" PRId32 " (%d)\n",
priv->rxndx, rxndx, dev->d_len);
/* All data have been copied in the application frame buffer,
* release the RX descriptor
@ -1115,7 +1117,7 @@ static int sam_recvframe(struct sam_gmac_s *priv)
if (pktlen < dev->d_len)
{
nerr("ERROR: Buffer size %d; frame size %d\n",
nerr("ERROR: Buffer size %d; frame size %" PRId32 "\n",
dev->d_len, pktlen);
return -E2BIG;
}
@ -1469,7 +1471,7 @@ static void sam_interrupt_work(FAR void *arg)
imr = sam_getreg(priv, SAM_GMAC_IMR);
pending = isr & ~(imr | GMAC_INT_UNUSED);
ninfo("isr: %08x pending: %08x\n", isr, pending);
ninfo("isr: %08" PRIx32 " pending: %08" PRIx32 "\n", isr, pending);
/* Check for the completion of a transmission. This should be done before
* checking for received data (because receiving can cause another
@ -1495,7 +1497,7 @@ static void sam_interrupt_work(FAR void *arg)
clrbits = GMAC_TSR_RLE | sam_txinuse(priv);
sam_txreset(priv);
nerr("ERROR: Retry Limit Exceeded TSR: %08x\n", tsr);
nerr("ERROR: Retry Limit Exceeded TSR: %08" PRIx32 "\n", tsr);
regval = sam_getreg(priv, SAM_GMAC_NCR);
regval |= GMAC_NCR_TXEN;
@ -1506,7 +1508,7 @@ static void sam_interrupt_work(FAR void *arg)
if ((tsr & GMAC_TSR_COL) != 0)
{
nerr("ERROR: Collision occurred TSR: %08x\n", tsr);
nerr("ERROR: Collision occurred TSR: %08" PRIx32 "\n", tsr);
clrbits |= GMAC_TSR_COL;
}
@ -1514,7 +1516,8 @@ static void sam_interrupt_work(FAR void *arg)
if ((tsr & GMAC_TSR_TFC) != 0)
{
nerr("ERROR: Buffers exhausted mid-frame TSR: %08x\n", tsr);
nerr("ERROR: Buffers exhausted mid-frame TSR: %08" PRIx32 "\n",
tsr);
clrbits |= GMAC_TSR_TFC;
}
@ -1529,7 +1532,7 @@ static void sam_interrupt_work(FAR void *arg)
if ((tsr & GMAC_TSR_UND) != 0)
{
nerr("ERROR: Transmit Underrun TSR: %08x\n", tsr);
nerr("ERROR: Transmit Underrun TSR: %08" PRIx32 "\n", tsr);
clrbits |= GMAC_TSR_UND;
}
@ -1537,7 +1540,7 @@ static void sam_interrupt_work(FAR void *arg)
if ((tsr & GMAC_TSR_HRESP) != 0)
{
nerr("ERROR: HRESP not OK: %08x\n", tsr);
nerr("ERROR: HRESP not OK: %08" PRIx32 "\n", tsr);
clrbits |= GMAC_TSR_HRESP;
}
@ -1545,7 +1548,7 @@ static void sam_interrupt_work(FAR void *arg)
if ((tsr & GMAC_TSR_LCO) != 0)
{
nerr("ERROR: Late collision: %08x\n", tsr);
nerr("ERROR: Late collision: %08" PRIx32 "\n", tsr);
clrbits |= GMAC_TSR_LCO;
}
@ -1582,7 +1585,7 @@ static void sam_interrupt_work(FAR void *arg)
if ((rsr & GMAC_RSR_RXOVR) != 0)
{
nerr("ERROR: Receiver overrun RSR: %08x\n", rsr);
nerr("ERROR: Receiver overrun RSR: %08" PRIx32 "\n", rsr);
clrbits |= GMAC_RSR_RXOVR;
}
@ -1599,7 +1602,7 @@ static void sam_interrupt_work(FAR void *arg)
if ((rsr & GMAC_RSR_BNA) != 0)
{
nerr("ERROR: Buffer not available RSR: %08x\n", rsr);
nerr("ERROR: Buffer not available RSR: %08" PRIx32 "\n", rsr);
clrbits |= GMAC_RSR_BNA;
}
@ -1607,7 +1610,7 @@ static void sam_interrupt_work(FAR void *arg)
if ((rsr & GMAC_RSR_HNO) != 0)
{
nerr("ERROR: HRESP not OK: %08x\n", rsr);
nerr("ERROR: HRESP not OK: %08" PRIx32 "\n", rsr);
clrbits |= GMAC_RSR_HNO;
}
@ -1862,8 +1865,10 @@ static int sam_ifup(struct net_driver_s *dev)
int ret;
ninfo("Bringing up: %d.%d.%d.%d\n",
dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff,
(dev->d_ipaddr >> 16) & 0xff, dev->d_ipaddr >> 24);
(int)(dev->d_ipaddr & 0xff),
(int)((dev->d_ipaddr >> 8) & 0xff),
(int)((dev->d_ipaddr >> 16) & 0xff),
(int)(dev->d_ipaddr >> 24));
/* Configure the GMAC interface for normal operation. */