Add GPIO interrupt capability for the KL architecture. The patch is almost the same as kinetis_pinirq.c, just minor modifications and rename kl_pinirq to kl_gpioirq to make it more generic to developers. From Alan Carvalho de Assis
This commit is contained in:
Gregory Nutt
parent
2deadebc00
commit
47919eb274
@ -348,25 +348,9 @@ config KL_PORTAINTS
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---help---
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Enable support for 32 interrupts from GPIO port A pins
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config KL_PORTBINTS
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bool "GPIOB interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port B pins
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config KL_PORTCINTS
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bool "GPIOC interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port C pins
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config KL_PORTDINTS
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bool "GPIOD interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port D pins
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config KL_PORTEINTS
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bool "GPIOE interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port E pins
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endif
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@ -79,6 +79,10 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += kl_userspace.c
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endif
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ifeq ($(CONFIG_GPIO_IRQ),y)
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CHIP_CSRCS += kl_gpioirq.c
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endif
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ifeq ($(CONFIG_ARCH_IRQPRIO),y)
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CHIP_CSRCS += kl_irqprio.c
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endif
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388
arch/arm/src/kl/kl_gpioirq.c
Normal file
388
arch/arm/src/kl/kl_gpioirq.c
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@ -0,0 +1,388 @@
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/****************************************************************************
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* arch/arm/src/kl/kl_gpioirq.c
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <arch/board/board.h>
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#include <nuttx/config.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include "up_arch.h"
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#include "chip/kl_port.h"
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#include "kl_gpio.h"
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#ifdef CONFIG_GPIO_IRQ
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* The Kinetis port interrupt logic is very flexible and will program
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* interrupts on most all pin events. In order to keep the memory usage to
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* a minimum, the NuttX port supports enabling interrupts on a per-port
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* basis.
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*/
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#if defined(CONFIG_KL_PORTAINTS) || defined(CONFIG_KL_PORTDINTS)
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# define HAVE_PORTINTS 1
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#endif
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#if defined(CONFIG_KL_PORTBINTS) || defined(CONFIG_KL_PORTCINTS) || \
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defined(CONFIG_KL_PORTEINTS)
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# error Kinetis KL25 only supports interrupt on PORTA or PORTD
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* Per pin port interrupt vectors. NOTE: Not all pins in each port
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* correspond to externally available GPIOs. However, I believe that the
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* Kinetis will support interrupts even if the pin is not available as
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* a GPIO. Hence, we need to support all 32 pins for each port. To keep the
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* memory usage at a minimum, the logic may be configure per port.
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*/
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#ifdef CONFIG_KL_PORTAINTS
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static xcpt_t g_portaisrs[32];
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#endif
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#ifdef CONFIG_KL_PORTDINTS
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static xcpt_t g_portdisrs[32];
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: kl_portinterrupt
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*
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* Description:
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* Common port interrupt handling.
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*
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****************************************************************************/
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#ifdef HAVE_PORTINTS
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static int kl_portinterrupt(int irq, FAR void *context,
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uintptr_t addr, xcpt_t *isrtab)
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{
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uint32_t isfr = getreg32(addr);
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int i;
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/* Examine each pin in the port */
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for (i = 0; i < 32 && isfr != 0; i++)
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{
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/* A bit set in the ISR means that an interrupt is pending for this
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* pin. If the pin is programmed for level sensitive inputs, then
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* the interrupt handling logic MUST disable the interrupt (or cause
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* the level to change) to prevent infinite interrupts.
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*/
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uint32_t bit = (1 << i);
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if ((isfr & bit ) != 0)
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{
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/* I think that bits may be set in the ISFR for DMA activities
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* well. So, no error is declared if there is no registered
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* interrupt handler for the pin.
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*/
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if (isrtab[i])
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{
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/* There is a registered interrupt handler... invoke it */
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(void)isrtab[i](irq, context);
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}
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/* Writing a one to the ISFR register will clear the pending
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* interrupt. If pin is configured to generate a DMA request
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* then the ISFR bit will be cleared automatically at the
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* completion of the requested DMA transfer. If configured for
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* a level sensitive interrupt and the pin remains asserted and
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* the bit will set again immediately after it is cleared.
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*/
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isfr &= ~bit;
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putreg32(bit, addr);
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}
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}
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return OK;
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}
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#endif
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/****************************************************************************
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* Name: kl_portXinterrupt
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*
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* Description:
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* Handle interrupts arriving on individual ports
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*
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****************************************************************************/
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#ifdef CONFIG_KL_PORTAINTS
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static int kl_portainterrupt(int irq, FAR void *context)
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{
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return kl_portinterrupt(irq, context, KL_PORTA_ISFR, g_portaisrs);
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}
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#endif
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#ifdef CONFIG_KL_PORTDINTS
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static int kl_portdinterrupt(int irq, FAR void *context)
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{
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return kl_portinterrupt(irq, context, KL_PORTD_ISFR, g_portdisrs);
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}
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: kl_gpioirqinitialize
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*
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* Description:
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* Initialize logic to support a second level of interrupt decoding for
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* GPIO pins.
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*
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****************************************************************************/
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void kl_gpioirqinitialize(void)
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{
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#ifdef CONFIG_KL_PORTAINTS
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(void)irq_attach(KL_IRQ_PORTA, kl_portainterrupt);
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putreg32(0xffffffff, KL_PORTA_ISFR);
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up_enable_irq(KL_IRQ_PORTA);
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#endif
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#ifdef CONFIG_KL_PORTDINTS
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(void)irq_attach(KL_IRQ_PORTD, kl_portdinterrupt);
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putreg32(0xffffffff, KL_PORTD_ISFR);
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up_enable_irq(KL_IRQ_PORTD);
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#endif
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}
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/****************************************************************************
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* Name: kl_gpioirqattach
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*
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* Description:
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* Attach a pin interrupt handler. The normal initialization sequence is:
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*
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* 1. Call kl_gpioconfig() to configure the interrupting pin (pin interrupts
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* will be disabled.
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* 2. Call kl_gpioirqattach() to attach the pin interrupt handling function.
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* 3. Call kl_gpioirqenable() to enable interrupts on the pin.
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*
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* Parameters:
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* - pinset: Pin configuration
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* - pinisr: Pin interrupt service routine
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*
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* Returns:
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* The previous value of the interrupt handler function pointer. This
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* value may, for example, be used to restore the previous handler when
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* multiple handlers are used.
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*
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****************************************************************************/
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xcpt_t kl_gpioirqattach(uint32_t pinset, xcpt_t pinisr)
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{
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#ifdef HAVE_PORTINTS
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xcpt_t *isrtab;
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xcpt_t oldisr;
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irqstate_t flags;
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unsigned int port;
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unsigned int pin;
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/* It only makes sense to call this function for input pins that are
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* configured as interrupts.
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*/
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DEBUGASSERT((pinset & _PIN_INTDMA_MASK) == _PIN_INTERRUPT);
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DEBUGASSERT((pinset & _PIN_IO_MASK) == _PIN_INPUT);
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/* Get the port number and pin number */
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
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/* Get the table associated with this port */
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DEBUGASSERT(port < KL_NPORTS);
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flags = irqsave();
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switch (port)
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{
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#ifdef CONFIG_KL_PORTAINTS
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case KL_PORTA :
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isrtab = g_portaisrs;
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break;
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#endif
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#ifdef CONFIG_KL_PORTDINTS
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case KL_PORTD :
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isrtab = g_portdisrs;
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break;
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#endif
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default:
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return NULL;
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}
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/* Get the old PIN ISR and set the new PIN ISR */
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oldisr = isrtab[pin];
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isrtab[pin] = pinisr;
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/* And return the old PIN isr address */
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return oldisr;
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#else
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return NULL;
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#endif /* HAVE_PORTINTS */
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}
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/************************************************************************************
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* Name: kl_gpioirqenable
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*
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* Description:
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* Enable the interrupt for specified pin IRQ
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*
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************************************************************************************/
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void kl_gpioirqenable(uint32_t pinset)
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{
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#ifdef HAVE_PORTINTS
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uintptr_t base;
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uint32_t regval;
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unsigned int port;
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unsigned int pin;
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/* Get the port number and pin number */
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
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DEBUGASSERT(port < KL_NPORTS);
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if (port < KL_NPORTS)
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{
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/* Get the base address of PORT block for this port */
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base = KL_PORT_BASE(port);
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/* Modify the IRQC field of the port PCR register in order to enable
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* the interrupt.
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*/
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regval = getreg32(base + KL_PORT_PCR_OFFSET(pin));
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regval &= ~PORT_PCR_IRQC_MASK;
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switch (pinset & _PIN_INT_MASK)
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{
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case PIN_INT_ZERO : /* Interrupt when logic zero */
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regval |= PORT_PCR_IRQC_ZERO;
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break;
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case PIN_INT_RISING : /* Interrupt on rising edge*/
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regval |= PORT_PCR_IRQC_RISING;
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break;
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case PIN_INT_BOTH : /* Interrupt on falling edge */
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regval |= PORT_PCR_IRQC_FALLING;
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break;
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case PIN_DMA_FALLING : /* nterrupt on either edge */
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regval |= PORT_PCR_IRQC_BOTH;
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break;
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case PIN_INT_ONE : /* IInterrupt when logic one */
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regval |= PORT_PCR_IRQC_ONE;
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break;
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default:
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return;
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}
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putreg32(regval, base + KL_PORT_PCR_OFFSET(pin));
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}
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#endif /* HAVE_PORTINTS */
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}
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/************************************************************************************
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* Name: kl_gpioirqdisable
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*
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* Description:
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* Disable the interrupt for specified pin
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*
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************************************************************************************/
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void kl_gpioirqdisable(uint32_t pinset)
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{
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#ifdef HAVE_PORTINTS
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uintptr_t base;
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uint32_t regval;
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unsigned int port;
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unsigned int pin;
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/* Get the port number and pin number */
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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pin = (pinset & _PIN_MASK) >> _PIN_SHIFT;
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DEBUGASSERT(port < KL_NPORTS);
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if (port < KL_NPORTS)
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{
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/* Get the base address of PORT block for this port */
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base = KL_PORT_BASE(port);
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/* Clear the IRQC field of the port PCR register in order to disable
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* the interrupt.
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*/
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regval = getreg32(base + KL_PORT_PCR_OFFSET(pin));
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regval &= ~PORT_PCR_IRQC_MASK;
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putreg32(regval, base + KL_PORT_PCR_OFFSET(pin));
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}
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#endif /* HAVE_PORTINTS */
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}
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#endif /* CONFIG_GPIO_IRQ */
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