STM32 I2C: Cosmetic changes in preparation to merge a change
This commit is contained in:
Gregory Nutt
parent
c50fc79798
commit
47dad8d7cf
@ -8,7 +8,7 @@
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* With extensions, modifications by:
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*
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* Copyright (C) 2011-2014 Gregory Nutt. All rights reserved.
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* Author: Gregroy Nutt <gnutt@nuttx.org>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -57,7 +57,7 @@
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* - SMBus support (hardware layer timings are already supported) and add SMBA gpio pin
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* - Slave support with multiple addresses (on multiple instances):
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* - 2 x 7-bit address or
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* - 1 x 10 bit adresses + 1 x 7 bit address (?)
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* - 1 x 10 bit addresses + 1 x 7 bit address (?)
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* - plus the broadcast address (general call)
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* - Multi-master support
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* - DMA (to get rid of too many CPU wake-ups and interventions)
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@ -97,6 +97,7 @@
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#if defined(CONFIG_STM32_I2C1) || defined(CONFIG_STM32_I2C2) || \
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defined(CONFIG_STM32_I2C3)
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/* This implementation is for the STM32 F1, F2, and F4 only */
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/* Experimentally enabled for STM32L15XX */
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@ -297,32 +298,39 @@ static inline void stm32_i2c_modifyreg(FAR struct stm32_i2c_priv_s *priv,
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uint8_t offset, uint16_t clearbits,
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uint16_t setbits);
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static inline void stm32_i2c_sem_wait(FAR struct i2c_dev_s *dev);
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#ifdef CONFIG_STM32_I2C_DYNTIMEO
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static useconds_t stm32_i2c_tousecs(int msgc, FAR struct i2c_msg_s *msgs);
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#endif /* CONFIG_STM32_I2C_DYNTIMEO */
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static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_sem_post(FAR struct i2c_dev_s *dev);
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static inline void stm32_i2c_sem_init(FAR struct i2c_dev_s *dev);
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static inline void stm32_i2c_sem_destroy(FAR struct i2c_dev_s *dev);
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#ifdef CONFIG_I2C_TRACE
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static void stm32_i2c_tracereset(FAR struct stm32_i2c_priv_s *priv);
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static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t status);
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static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
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enum stm32_trace_e event, uint32_t parm);
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enum stm32_trace_e event, uint32_t parm);
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static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv);
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#endif /* CONFIG_I2C_TRACE */
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static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv,
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uint32_t frequency);
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static inline void stm32_i2c_sendstart(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_clrstart(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_sendstop(FAR struct stm32_i2c_priv_s *priv);
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static inline uint32_t stm32_i2c_getstatus(FAR struct stm32_i2c_priv_s *priv);
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#ifdef I2C1_FSMC_CONFLICT
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static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv);
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static inline void stm32_i2c_enablefsmc(uint32_t ahbenr);
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#endif /* I2C1_FSMC_CONFLICT */
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static int stm32_i2c_isr(struct stm32_i2c_priv_s * priv);
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#ifndef CONFIG_I2C_POLLED
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#ifdef CONFIG_STM32_I2C1
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static int stm32_i2c1_isr(int irq, void *context);
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@ -333,7 +341,8 @@ static int stm32_i2c2_isr(int irq, void *context);
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#ifdef CONFIG_STM32_I2C3
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static int stm32_i2c3_isr(int irq, void *context);
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#endif
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#endif
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#endif /* !CONFIG_I2C_POLLED */
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static int stm32_i2c_init(FAR struct stm32_i2c_priv_s *priv);
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static int stm32_i2c_deinit(FAR struct stm32_i2c_priv_s *priv);
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static uint32_t stm32_i2c_setfrequency(FAR struct i2c_dev_s *dev,
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@ -342,17 +351,19 @@ static int stm32_i2c_setaddress(FAR struct i2c_dev_s *dev, int addr, int nbits);
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static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *msgs,
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int count);
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static int stm32_i2c_write(FAR struct i2c_dev_s *dev, const uint8_t *buffer,
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int buflen);
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int buflen);
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static int stm32_i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen);
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#ifdef CONFIG_I2C_WRITEREAD
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static int stm32_i2c_writeread(FAR struct i2c_dev_s *dev,
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const uint8_t *wbuffer, int wbuflen,
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uint8_t *buffer, int buflen);
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#endif
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#endif /* CONFIG_I2C_WRITEREAD */
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#ifdef CONFIG_I2C_TRANSFER
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static int stm32_i2c_transfer(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *msgs,
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int count);
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#endif
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#endif /* CONFIG_I2C_TRANSFER */
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/************************************************************************************
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* Private Data
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@ -454,14 +465,14 @@ struct i2c_ops_s stm32_i2c_ops =
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.write = stm32_i2c_write,
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.read = stm32_i2c_read
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#ifdef CONFIG_I2C_WRITEREAD
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, .writeread = stm32_i2c_writeread
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, .writeread = stm32_i2c_writeread
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#endif
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#ifdef CONFIG_I2C_TRANSFER
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, .transfer = stm32_i2c_transfer
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, .transfer = stm32_i2c_transfer
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#endif
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#ifdef CONFIG_I2C_SLAVE
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, .setownaddress = stm32_i2c_setownaddress,
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.registercallback = stm32_i2c_registercallback
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, .setownaddress = stm32_i2c_setownaddress,
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.registercallback = stm32_i2c_registercallback
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#endif
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};
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@ -586,8 +597,8 @@ static inline int stm32_i2c_sem_waitdone(FAR struct stm32_i2c_priv_s *priv)
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* sem_timedwait() sleeps.
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*/
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priv->intstate = INTSTATE_WAITING;
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do
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priv->intstate = INTSTATE_WAITING;
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do
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{
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/* Get the current time */
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@ -775,7 +786,7 @@ static inline void stm32_i2c_sem_waitstop(FAR struct stm32_i2c_priv_s *priv)
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static inline void stm32_i2c_sem_post(FAR struct i2c_dev_s *dev)
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{
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sem_post( &((struct stm32_i2c_inst_s *)dev)->priv->sem_excl );
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sem_post(&((struct stm32_i2c_inst_s *)dev)->priv->sem_excl);
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}
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/************************************************************************************
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@ -843,7 +854,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
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{
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struct stm32_trace_s *trace = &priv->trace[priv->tndx];
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/* Is the current entry uninitialized? Has the status changed? */
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/* Is the current entry uninitialized? Has the status changed? */
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if (trace->count == 0 || status != trace->status)
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{
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@ -879,7 +890,7 @@ static void stm32_i2c_tracenew(FAR struct stm32_i2c_priv_s *priv, uint32_t statu
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}
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static void stm32_i2c_traceevent(FAR struct stm32_i2c_priv_s *priv,
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enum stm32_trace_e event, uint32_t parm)
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enum stm32_trace_e event, uint32_t parm)
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{
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struct stm32_trace_s *trace;
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@ -915,8 +926,8 @@ static void stm32_i2c_tracedump(FAR struct stm32_i2c_priv_s *priv)
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{
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trace = &priv->trace[i];
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syslog("%2d. STATUS: %08x COUNT: %3d EVENT: %2d PARM: %08x TIME: %d\n",
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i+1, trace->status, trace->count, trace->event, trace->parm,
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trace->time - priv->start_time);
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i+1, trace->status, trace->count, trace->event, trace->parm,
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trace->time - priv->start_time);
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}
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}
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#endif /* CONFIG_I2C_TRACE */
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@ -963,6 +974,7 @@ static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequ
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speed = 4;
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}
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ccr |= speed;
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/* Set Maximum Rise Time for standard mode */
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@ -1000,6 +1012,7 @@ static void stm32_i2c_setclock(FAR struct stm32_i2c_priv_s *priv, uint32_t frequ
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speed = 1;
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}
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ccr |= speed;
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/* Set Maximum Rise Time for fast mode */
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@ -1121,7 +1134,7 @@ static inline uint32_t stm32_i2c_disablefsmc(FAR struct stm32_i2c_priv_s *priv)
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{
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/* Disable FSMC unconditionally */
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ret = getreg32( STM32_RCC_AHBENR);
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ret = getreg32(STM32_RCC_AHBENR);
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regval = ret & ~RCC_AHBENR_FSMCEN;
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putreg32(regval, STM32_RCC_AHBENR);
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}
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@ -1145,7 +1158,7 @@ static inline void stm32_i2c_enablefsmc(uint32_t ahbenr)
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if ((ahbenr & RCC_AHBENR_FSMCEN) != 0)
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{
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regval = getreg32( STM32_RCC_AHBENR);
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regval = getreg32(STM32_RCC_AHBENR);
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regval |= RCC_AHBENR_FSMCEN;
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putreg32(regval, STM32_RCC_AHBENR);
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}
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@ -1344,7 +1357,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
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* and wake it up.
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*/
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sem_post( &priv->sem_isr );
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sem_post(&priv->sem_isr);
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priv->intstate = INTSTATE_DONE;
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}
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#else
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@ -1379,7 +1392,7 @@ static int stm32_i2c_isr(struct stm32_i2c_priv_s *priv)
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* and wake it up.
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*/
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sem_post( &priv->sem_isr );
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sem_post(&priv->sem_isr);
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priv->intstate = INTSTATE_DONE;
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}
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#else
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@ -1655,7 +1668,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
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status = stm32_i2c_getstatus(priv);
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errval = ETIMEDOUT;
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i2cdbg("Timed out: CR1: %04x status: %08x\n",
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i2cdbg("Timed out: CR1: 0x%04x status: 0x%08x\n",
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stm32_i2c_getreg(priv, STM32_I2C_CR1_OFFSET), status);
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/* "Note: When the STOP, START or PEC bit is set, the software must
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@ -1734,7 +1747,7 @@ static int stm32_i2c_process(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *ms
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/* This is not an error, but should not happen. The BUSY signal can hang,
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* however, if there are unhealthy devices on the bus that need to be reset.
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* NOTE: We will only see this buy indication if stm32_i2c_sem_waitdone()
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* NOTE: We will only see this busy indication if stm32_i2c_sem_waitdone()
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* fails above; Otherwise it is cleared.
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*/
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@ -1884,7 +1897,7 @@ static int stm32_i2c_transfer(FAR struct i2c_dev_s *dev, FAR struct i2c_msg_s *m
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FAR struct i2c_dev_s *up_i2cinitialize(int port)
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{
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struct stm32_i2c_priv_s * priv = NULL; /* Private data of device with multiple instances */
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struct stm32_i2c_inst_s * inst = NULL; /* Eevice, single instance */
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struct stm32_i2c_inst_s * inst = NULL; /* Device, single instance */
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int irqs;
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#if STM32_PCLK1_FREQUENCY < 4000000
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@ -1893,7 +1906,7 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
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#if STM32_PCLK1_FREQUENCY < 2000000
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# warning STM32_I2C_INIT: Peripheral clock must be at least 2 MHz to support 100 kHz operation.
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return NULL;
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return NULL;
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#endif
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/* Get I2C private structure */
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@ -1901,27 +1914,27 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
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switch (port)
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{
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#ifdef CONFIG_STM32_I2C1
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case 1:
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priv = (struct stm32_i2c_priv_s *)&stm32_i2c1_priv;
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break;
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case 1:
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priv = (struct stm32_i2c_priv_s *)&stm32_i2c1_priv;
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break;
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#endif
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#ifdef CONFIG_STM32_I2C2
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case 2:
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priv = (struct stm32_i2c_priv_s *)&stm32_i2c2_priv;
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break;
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case 2:
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priv = (struct stm32_i2c_priv_s *)&stm32_i2c2_priv;
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break;
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#endif
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#ifdef CONFIG_STM32_I2C3
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case 3:
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priv = (struct stm32_i2c_priv_s *)&stm32_i2c3_priv;
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break;
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case 3:
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priv = (struct stm32_i2c_priv_s *)&stm32_i2c3_priv;
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break;
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#endif
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default:
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return NULL;
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default:
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return NULL;
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}
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/* Allocate instance */
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if (!(inst = kmalloc( sizeof(struct stm32_i2c_inst_s))))
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if (!(inst = kmalloc(sizeof(struct stm32_i2c_inst_s))))
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{
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return NULL;
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}
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@ -1942,8 +1955,8 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
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if ((volatile int)priv->refs++ == 0)
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{
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stm32_i2c_sem_init( (struct i2c_dev_s *)inst );
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stm32_i2c_init( priv );
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stm32_i2c_sem_init((struct i2c_dev_s *)inst);
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stm32_i2c_init(priv);
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}
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irqrestore(irqs);
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@ -1984,11 +1997,11 @@ int up_i2cuninitialize(FAR struct i2c_dev_s * dev)
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/* Disable power and other HW resource (GPIO's) */
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stm32_i2c_deinit( ((struct stm32_i2c_inst_s *)dev)->priv );
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stm32_i2c_deinit(((struct stm32_i2c_inst_s *)dev)->priv);
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/* Release unused resources */
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stm32_i2c_sem_destroy( (struct i2c_dev_s *)dev );
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stm32_i2c_sem_destroy((struct i2c_dev_s *)dev);
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kfree(dev);
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return OK;
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