w25qxxxjv: fix STATUS2_QE_ENABLED bitfield write
W25QXXXJV_WRITE_STATUS_2 register uses just first byte therefore all operations has to be done in priv->cmdbuf[0]. Previous priv->cmdbuf[1] caused QuadSPI mode not being enabled. Signed-off-by: Michal Lenc <michallenc@seznam.cz>
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@ -616,7 +616,7 @@ static void w25qxxxjv_quad_enable(FAR struct w25qxxxjv_dev_s *priv)
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w25qxxxjv_write_enable(priv);
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priv->cmdbuf[0] &= ~STATUS2_QE_MASK;
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priv->cmdbuf[1] |= STATUS2_QE_ENABLED;
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priv->cmdbuf[0] |= STATUS2_QE_ENABLED;
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w25qxxxjv_command_write(priv->qspi, W25QXXXJV_WRITE_STATUS_2,
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(FAR const void *)priv->cmdbuf, 1);
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