From 482cbc43637089b4a3bb6e450e477bf8d8e47c5f Mon Sep 17 00:00:00 2001 From: Michal Lenc Date: Sun, 14 May 2023 22:04:39 +0200 Subject: [PATCH] w25qxxxjv: fix STATUS2_QE_ENABLED bitfield write W25QXXXJV_WRITE_STATUS_2 register uses just first byte therefore all operations has to be done in priv->cmdbuf[0]. Previous priv->cmdbuf[1] caused QuadSPI mode not being enabled. Signed-off-by: Michal Lenc --- drivers/mtd/w25qxxxjv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/w25qxxxjv.c b/drivers/mtd/w25qxxxjv.c index 013704b6f6..e77eeae1b8 100644 --- a/drivers/mtd/w25qxxxjv.c +++ b/drivers/mtd/w25qxxxjv.c @@ -616,7 +616,7 @@ static void w25qxxxjv_quad_enable(FAR struct w25qxxxjv_dev_s *priv) w25qxxxjv_write_enable(priv); priv->cmdbuf[0] &= ~STATUS2_QE_MASK; - priv->cmdbuf[1] |= STATUS2_QE_ENABLED; + priv->cmdbuf[0] |= STATUS2_QE_ENABLED; w25qxxxjv_command_write(priv->qspi, W25QXXXJV_WRITE_STATUS_2, (FAR const void *)priv->cmdbuf, 1);