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nucleo-f103rb: add FOC example based on IHM07M1 expansion board (only fixed16)

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raiden00pl 2021-04-10 21:01:23 +02:00 committed by Xiang Xiao
parent cf645fc9ba
commit 4972153ee6
7 changed files with 404 additions and 0 deletions
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64
boards/arm/stm32/nucleo-f103rb/README.txt
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@ -24,3 +24,67 @@ Variants include
NUCLEO-L152RE STM32L152RET6
NUCLEO-L452RE STM32L452RET6
NUCLEO-L476RG STM32L476RGT6
Configurations
==============
ihm07m1_b16:
------------
These examples are dedicated for the X-NUCLEO-IHM07M1 expansion board
based on L6230 DMOS driver for three-phase brushless DC motors.
X-NUCLEO-IHM07M1 must be configured to work with FOC and 3-shunt
resistors. See ST documentation for details.
Pin configuration for the X-NUCLEO-IHM07M1 (TIM1 configuration):
Board Function Chip Function Chip Pin Number
------------- ---------------- -----------------
Phase U high TIM1_CH1 PA8
Phase U enable GPIO_PC10 PC10
Phase V high TIM1_CH2 PA9
Phase V enable GPIO_PC11 PC11
Phase W high TIM1_CH3 PA10
Phase W enable GPIO_PC12 PC12
DIAG/EN GPIO_PA11 PA11
Current U ADC1_IN0 PA0
Current V ADC1_IN11 PC1
Current W ADC1_IN10 PC0
Temperature ADC1_IN12 PC2
VBUS ADC1_IN1 PA1
BEMF1 (NU) PC3
BEMF2 (NU) PB0
BEMF3 (NU) PA7
LED GPIO_PB2 PB2
+3V3 (CN7_16)
GND (CN7_20)
GPIO_BEMF (NU) PC9
ENCO_A/HALL_H1 TIM2_CH1 PA15
ENCO_B/HALL_H2 TIM2_CH2 PB3
ENCO_Z/HALL_H3 TIM2_CH3 PB10
GPIO1 (NU) PB13
GPIO2 (NU) PB5
GPIO3 (NU) PA5
CPOUT (NU) PA12
BKIN1 (NU) PB14
POT ADC1_IN9 PB1
CURR_REF (NU) PB4
DAC DAC1_CH1 PA4
DEBUG0 GPIO PB8
DEBUG1 GPIO PB9
DEBUG2 GPIO PC6
DEBUG3 GPIO PC5
DEBUG4 GPIO PC8
Current shunt resistance = 0.33
Current sense gain = -1.53 (inverted current)
Vbus sense gain = 9.31k/(9.31k+169k) = 0.0522124390107
Vbus min = 8V
Vbus max = 48V
Iout max = 1.4A RMS
IPHASE_RATIO = 1/(R_shunt*gain) = -1.98
VBUS_RATIO = 1/VBUS_gain = 19.152
For now only 3-shunt resistors configuration is supported.

87
boards/arm/stm32/nucleo-f103rb/configs/ihm07m1_b16/defconfig Normal file
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@ -0,0 +1,87 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ADC=y
CONFIG_ADC_FIFOSIZE=3
CONFIG_ANALOG=y
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="nucleo-f103rb"
CONFIG_ARCH_BOARD_NUCLEO_F103RB=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F103RB=y
CONFIG_ARCH_INTERRUPTSTACK=1024
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_BOARD_LOOPSPERMSEC=8499
CONFIG_BOARD_STM32_COMMON=y
CONFIG_BOARD_STM32_IHM07M1=y
CONFIG_BOARD_STM32_IHM07M1_POT=y
CONFIG_BOARD_STM32_IHM07M1_VBUS=y
CONFIG_BUILTIN=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEFAULT_SMALL=y
CONFIG_DEFAULT_TASK_STACKSIZE=1024
CONFIG_EXAMPLES_FOC=y
CONFIG_EXAMPLES_FOC_ADC_MAX=4095
CONFIG_EXAMPLES_FOC_ADC_VREF=3300
CONFIG_EXAMPLES_FOC_CONTROL_STACKSIZE=2048
CONFIG_EXAMPLES_FOC_FIXED16_INST=1
CONFIG_EXAMPLES_FOC_HAVE_BUTTON=y
CONFIG_EXAMPLES_FOC_IPHASE_ADC=-160
CONFIG_EXAMPLES_FOC_NOTIFIER_FREQ=5000
CONFIG_EXAMPLES_FOC_PWM_FREQ=20000
CONFIG_EXAMPLES_FOC_RAMP_ACC=1000000
CONFIG_EXAMPLES_FOC_RAMP_DEC=1000000
CONFIG_EXAMPLES_FOC_RAMP_THR=10000
CONFIG_EXAMPLES_FOC_VBUS_ADC=y
CONFIG_EXAMPLES_FOC_VBUS_SCALE=19152
CONFIG_EXAMPLES_FOC_VEL_ADC=y
CONFIG_INDUSTRY_FOC=y
CONFIG_INDUSTRY_FOC_FIXED16=y
CONFIG_INPUT=y
CONFIG_INPUT_BUTTONS=y
CONFIG_INPUT_BUTTONS_LOWER=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBM=y
CONFIG_MAX_TASKS=4
CONFIG_MOTOR=y
CONFIG_MOTOR_FOC=y
CONFIG_MOTOR_FOC_TRACE=y
CONFIG_MQ_MAXMSGSIZE=5
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=16386
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=14
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2014
CONFIG_STM32_ADC1_ANIOC_TRIGGER=1
CONFIG_STM32_ADC1_DMA=y
CONFIG_STM32_ADC1_INJECTED_CHAN=3
CONFIG_STM32_DMA1=y
CONFIG_STM32_DMA2=y
CONFIG_STM32_FOC=y
CONFIG_STM32_FOC_FOC0=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_TIM1_CH1MODE=0
CONFIG_STM32_TIM1_CH2MODE=0
CONFIG_STM32_TIM1_CH3MODE=0
CONFIG_STM32_TIM1_MODE=2
CONFIG_STM32_TIM1_PARTIAL_REMAP=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXDMA=y
CONFIG_USER_ENTRYPOINT="nsh_main"

40
boards/arm/stm32/nucleo-f103rb/include/board.h
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@ -173,4 +173,44 @@
#define ADC1_DMA_CHAN DMACHAN_ADC1 /* DMA1_CH1 */
#ifdef CONFIG_BOARD_STM32_IHM07M1
/* Configuration specific for the X-NUCLEO-IHM07M1 expansion board with
* the L6230 gate drivers.
*/
/* TIM1 configuration *******************************************************/
/* Configured in stm32/hardware/stm32f103r_pinmap.h */
/* UVW ENABLE */
# define GPIO_FOC_EN_U (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN10)
# define GPIO_FOC_EN_V (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN11)
# define GPIO_FOC_EN_W (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN12)
/* DIAG/ENABLE */
# define GPIO_FOC_DIAGEN (GPIO_OUTPUT|GPIO_CNF_OUTOD|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN11)
# define GPIO_FOC_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN2)
/* Debug pins */
# define GPIO_FOC_DEBUG0 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
# define GPIO_FOC_DEBUG1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
# define GPIO_FOC_DEBUG2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN6)
# define GPIO_FOC_DEBUG3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN5)
#endif /* CONFIG_BOARD_STM32_IHM07M1 */
#endif /* __BOARDS_ARM_STM32_NUCLEO_F103RB_INCLUDE_BOARD_H */

6
boards/arm/stm32/nucleo-f103rb/src/Make.defs
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@ -36,6 +36,7 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
ifneq ($(CONFIG_STM32_FOC),y)
ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
@ -43,6 +44,11 @@ endif
ifeq ($(CONFIG_PWM),y)
CSRCS += stm32_pwm.c
endif
endif
ifeq ($(CONFIG_BOARD_STM32_IHM07M1),y)
CSRCS += stm32_foc_ihm07m1.c
endif
DEPPATH += --dep-path board
VPATH += :board

12
boards/arm/stm32/nucleo-f103rb/src/nucleo-f103rb.h
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@ -113,6 +113,18 @@ int stm32_bringup(void);
int stm32_pwm_setup(void);
#endif
/****************************************************************************
* Name: stm32_foc_setup
*
* Description:
* Initialize FOC peripheral for the board.
*
****************************************************************************/
#ifdef CONFIG_STM32_FOC
int stm32_foc_setup(void);
#endif
/****************************************************************************
* Name: stm32_adc_setup
*

10
boards/arm/stm32/nucleo-f103rb/src/stm32_bringup.c
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@ -102,6 +102,16 @@ int stm32_bringup(void)
}
#endif
#ifdef CONFIG_STM32_FOC
/* Initialize and register the FOC device */
ret = stm32_foc_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_foc_setup failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ADC
/* Initialize ADC and register the ADC driver. */

185
boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c Normal file
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@ -0,0 +1,185 @@
/****************************************************************************
* boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "stm32_ihm07m1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define CURRENT_SAMPLE_TIME ADC_SMPR_28p5
#define VBUS_SAMPLE_TIME ADC_SMPR_239p5
#define POT_SAMPLE_TIME ADC_SMPR_239p5
/* ADC1 channels used in this example */
#define ADC1_INJECTED (CONFIG_MOTOR_FOC_SHUNTS)
#ifdef CONFIG_BOARD_STM32_IHM07M1_VBUS
# define IHM07M1_VBUS 1
#else
# define IHM07M1_VBUS 0
#endif
#ifdef CONFIG_BOARD_STM32_IHM07M1_POT
# define IHM07M1_POT 1
#else
# define IHM07M1_POT 0
#endif
#define ADC1_REGULAR (IHM07M1_VBUS + IHM07M1_POT)
#define ADC1_NCHANNELS (ADC1_INJECTED + ADC1_REGULAR)
/* Check ADC1 configuration */
#if ADC1_INJECTED != CONFIG_STM32_ADC1_INJECTED_CHAN
# error
#endif
/* TIM1 configuration */
#ifndef CONFIG_STM32_TIM1_PARTIAL_REMAP
# error
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* FOC ADC configration:
* - Current Phase V -> ADC1 INJ1 -> ADC1_IN0 (PA0)
* - Current Phase U -> ADC1 INJ2 -> ADC1_IN11 (PC1)
* - Current Phase W -> ADC1 INJ3 -> ADC1_I10 (PC0)
* optional:
* - VBUS -> ADC1 REG -> ADC1_IN1 (PA1)
* - POT -> ADC1 REG -> ADC1_IN9 (PB1)
*
* TIM1 PWM configuration:
* - Phase U high -> TIM1_CH1 (PA8)
* - Phase V high -> TIM1_CH2 (PA9)
* - Phase W high -> TIM1_CH3 (PA10)
*
*/
static uint8_t g_adc1_chan[] =
{
#ifdef CONFIG_BOARD_STM32_IHM07M1_VBUS
1, /* ADC1 REG - VBUS */
#endif
#ifdef CONFIG_BOARD_STM32_IHM07M1_POT
9, /* ADC1 REG - POT */
#endif
0, /* ADC1 INJ1 - PHASE 1 */
#if CONFIG_MOTOR_FOC_SHUNTS == 3
11, /* ADC1 INJ2 - PHASE 2 */
10, /* ADC1 INJ3 - PHASE 3 */
#endif
};
static uint32_t g_adc1_pins[] =
{
#ifdef CONFIG_BOARD_STM32_IHM07M1_VBUS
GPIO_ADC123_IN1,
#endif
#ifdef CONFIG_BOARD_STM32_IHM07M1_POT
GPIO_ADC12_IN9,
#endif
GPIO_ADC123_IN0,
#if CONFIG_MOTOR_FOC_SHUNTS > 1
GPIO_ADC123_IN11,
#endif
#if CONFIG_MOTOR_FOC_SHUNTS > 2
GPIO_ADC123_IN10,
#endif
};
/* ADC1 sample time configuration */
static adc_channel_t g_adc1_stime[] =
{
#ifdef CONFIG_BOARD_STM32_IHM07M1_VBUS
{
.channel = 2,
.sample_time = VBUS_SAMPLE_TIME
},
#endif
#ifdef CONFIG_BOARD_STM32_IHM07M1_POT
{
.channel = 12,
.sample_time = POT_SAMPLE_TIME
},
#endif
{
.channel = 1,
.sample_time = CURRENT_SAMPLE_TIME
},
#if CONFIG_MOTOR_FOC_SHUNTS > 1
{
.channel = 7,
.sample_time = CURRENT_SAMPLE_TIME
},
#endif
#if CONFIG_MOTOR_FOC_SHUNTS > 2
{
.channel = 6,
.sample_time = CURRENT_SAMPLE_TIME
},
#endif
};
/* Board specific ADC configuration for FOC */
static struct stm32_foc_adc_s g_adc_cfg =
{
.chan = g_adc1_chan,
.pins = g_adc1_pins,
.stime = g_adc1_stime,
.nchan = ADC1_NCHANNELS,
.regch = ADC1_REGULAR,
.intf = 1
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_foc_setup
*
* Description:
* Initialize FOC driver.
*
* This function should be call by board_app_initialize().
*
* Returned Value:
* 0 on success, a negated errno value on failure
*
****************************************************************************/
int stm32_foc_setup(void)
{
return board_ihm07m1_initialize(&g_adc_cfg);
}