From 4a36c946e188814cd9d94368842d25d0abfc31ba Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 12 Feb 2018 14:46:40 -0600 Subject: [PATCH] Trivial update to some comments. --- arch/arm/src/sam34/sam_spi.c | 20 +++++++++++++------- arch/arm/src/samdl/sam_serial.c | 3 +-- arch/arm/src/samdl/sam_usb.c | 1 - arch/arm/src/samdl/saml_clockconfig.c | 2 ++ drivers/lcd/Kconfig | 5 +++-- 5 files changed, 19 insertions(+), 12 deletions(-) diff --git a/arch/arm/src/sam34/sam_spi.c b/arch/arm/src/sam34/sam_spi.c index 212293b26d..df2be89716 100644 --- a/arch/arm/src/sam34/sam_spi.c +++ b/arch/arm/src/sam34/sam_spi.c @@ -79,6 +79,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Configuration ************************************************************/ /* When SPI DMA is enabled, small DMA transfers will still be performed by * polling logic. But we need a threshold value to determine what is small. @@ -193,7 +194,7 @@ struct sam_spics_s typedef void (*select_t)(uint32_t devid, bool selected); -/* Chip select register offsetrs */ +/* Chip select register offsets */ /* The overall state of one SPI controller */ @@ -1002,7 +1003,8 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency) return spics->actual; } - /* Configure SPI to a frequency as close as possible to the requested frequency. + /* Configure SPI to a frequency as close as possible to the requested + * frequency. * * SPCK frequency = SPI_CLK / SCBR, or SCBR = SPI_CLK / frequency */ @@ -1110,7 +1112,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode) * 3 1 0 */ - offset = (unsigned int)g_csroffset[spics->cs]; + offset = (unsigned int)g_csroffset[spics->cs]; regval = spi_getreg(spi, offset); regval &= ~(SPI_CSR_CPOL | SPI_CSR_NCPHA); @@ -1184,7 +1186,9 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits) spiinfo("csr[offset=%02x]=%08x\n", offset, regval); - /* Save the selection so the subsequence re-configurations will be faster */ + /* Save the selection so the subsequence re-configurations will be + * faster. + */ spics->nbits = nbits; } @@ -1233,7 +1237,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd) * that performs DMA SPI transfers, but only when a larger block of * data is being transferred. And (2) another version that does polled * SPI transfers. When CONFIG_SAM34_SPI_DMA=n the latter is the only - * version avaialable; when CONFIG_SAM34_SPI_DMA=y, this version is only + * version available; when CONFIG_SAM34_SPI_DMA=y, this version is only * used for short SPI transfers and gets renamed as spi_exchange_nodma). * * Input Parameters: @@ -1268,7 +1272,8 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer, uint8_t *rxptr8; uint8_t *txptr8; - spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords); + spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", + txbuffer, rxbuffer, nwords); /* Set up PCS bits */ @@ -1414,7 +1419,8 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer, return; } - spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords); + spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", + txbuffer, rxbuffer, nwords); spics = (struct sam_spics_s *)dev; spi = spi_device(spics); diff --git a/arch/arm/src/samdl/sam_serial.c b/arch/arm/src/samdl/sam_serial.c index aab2d81d23..6f00639df8 100644 --- a/arch/arm/src/samdl/sam_serial.c +++ b/arch/arm/src/samdl/sam_serial.c @@ -524,7 +524,7 @@ static void sam_disableallints(struct sam_dev_s *priv) * interrupt received on the 'irq' It should call uart_transmitchars or * uart_receivechar to perform the appropriate data transfers. The * interrupt handling logic must be able to map the 'irq' number into the - * approprite uart_dev_s structure in order to call these functions. + * appropriate uart_dev_s structure in order to call these functions. * ****************************************************************************/ @@ -1010,4 +1010,3 @@ int up_putc(int ch) #endif /* USE_SERIALDRIVER */ #endif /* SAMDL_HAVE_USART */ - diff --git a/arch/arm/src/samdl/sam_usb.c b/arch/arm/src/samdl/sam_usb.c index f1f2a7cd3d..2132fec4b7 100644 --- a/arch/arm/src/samdl/sam_usb.c +++ b/arch/arm/src/samdl/sam_usb.c @@ -317,7 +317,6 @@ struct sam_rqhead_s struct sam_req_s *tail; /* Requests are removed from the tail of the list */ }; - /* This is the internal representation of an endpoint */ struct sam_ep_s diff --git a/arch/arm/src/samdl/saml_clockconfig.c b/arch/arm/src/samdl/saml_clockconfig.c index 364933501d..f32166ee49 100644 --- a/arch/arm/src/samdl/saml_clockconfig.c +++ b/arch/arm/src/samdl/saml_clockconfig.c @@ -74,6 +74,7 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* BOARD_GCLK_ENABLE looks optional, but it is not */ #ifndef BOARD_GCLK_ENABLE @@ -140,6 +141,7 @@ static inline void sam_periph_clocks(void); /**************************************************************************** * Private Data ****************************************************************************/ + /* This structure describes the configuration of every enabled GCLK */ #ifdef BOARD_GCLK_ENABLE diff --git a/drivers/lcd/Kconfig b/drivers/lcd/Kconfig index 7bcf4c5e62..364cc185ce 100644 --- a/drivers/lcd/Kconfig +++ b/drivers/lcd/Kconfig @@ -494,8 +494,9 @@ config SSD1306_I2CADDR int "SSD1306 I2C Address" default 60 ---help--- - 7-bit I2C Address of SSD1306. Typical addresses are 0x3C (60) or - 0x7A (61). + 7-bit I2C Address of SSD1306. Typical addresses are 0x3c (60) or + 0x3d (61). NOTE that these correspond to the 8-bit addresses + 0x78 or 0x7a that you may see in documentation. config SSD1306_I2CFREQ int "SSD1306 I2C Frequency"