Add USB Device support for i.MX RT (#408)
* arch/arm/src/imxrt/imxrt_usbdev.c: Add USB Device support for i.MX RT (USB OTG1) Based on the LPC43xx USB Device driver. * imxrt:usbotg Nxstyle fixes Co-authored-by: thomasactia <61285689+thomasactia@users.noreply.github.com>
This commit is contained in:
David Sidrane
GitHub
parent
41ef33bded
commit
4a4b2853c2
@ -192,6 +192,10 @@ config IMXRT_USBOTG
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select USBHOST_HAVE_ASYNCH if USBHOST
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select USBHOST_ASYNCH
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config IMXRT_USBDEV
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bool "USB Device"
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default n
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config IMXRT_ENET
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bool "Ethernet"
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default n
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@ -1527,4 +1531,31 @@ config IMXRT_EHCI_PREALLOCATE
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endmenu # USB host controller driver (HCD) options
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endif # IMXRT_USBOTG && USBHOST
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if IMXRT_USBDEV
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menu "USB device controller driver (DCD) options"
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config IMXRT_USBDEV_NOVBUS
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bool "No USB VBUS sensing"
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default n
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config IMXRT_USBDEV_FRAME_INTERRUPT
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bool "USB frame interrupt"
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default n
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---help---
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Handle USB Start-Of-Frame events. Enable reading SOF from interrupt
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handler vs. simply reading on demand. Probably a bad idea... Unless
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there is some issue with sampling the SOF from hardware asynchronously.
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config IMXRT_USBDEV_REGDEBUG
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bool "Register level debug"
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depends on DEBUG_USB_INFO
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default n
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---help---
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Output detailed register-level USB device debug information. Requires
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also CONFIG_DEBUG_USB_INFO.
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endmenu # USB device controller driver (DCD) options
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endif # IMXRT_USBDEV
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endif # ARCH_CHIP_IMXRT
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@ -164,3 +164,7 @@ endif
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ifeq ($(CONFIG_IMXRT_USBOTG),y)
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CHIP_CSRCS += imxrt_ehci.c
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endif
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ifeq ($(CONFIG_IMXRT_USBDEV),y)
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CHIP_CSRCS += imxrt_usbdev.c
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endif
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@ -1,4 +1,4 @@
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/***************************************************************************
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/********************************************************************************************
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* arch/arm/src/imxrt/hardware/imxrt_usbotg.h
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*
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* Copyright (C) 2009-2011, 2019 Gregory Nutt. All rights reserved.
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@ -32,24 +32,24 @@
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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***************************************************************************/
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********************************************************************************************/
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#ifndef __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USBOTG_H
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#define __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USBOTG_H
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/***************************************************************************
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/********************************************************************************************
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* Included Files
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***************************************************************************/
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********************************************************************************************/
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#include <nuttx/config.h>
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/***************************************************************************
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/********************************************************************************************
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* Pre-processor Definitions
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***************************************************************************/
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********************************************************************************************/
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#define IMXRT_EHCI_NRHPORT 1 /* There is only a single root hub port */
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/* USBOTG register offsets (with respect to IMXRT_USB_BASE) *************************************/
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/* USBOTG register offsets (with respect to IMXRT_USB_BASE) *********************************/
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/* 0x000 - 0x0ff: Reserved */
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@ -119,6 +119,8 @@
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#define IMXRT_USBDEV_ENDPTFLUSH_OFFSET 0x1b4 /* Endpoint de-initialization */
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#define IMXRT_USBDEV_ENDPTSTATUS_OFFSET 0x1b8 /* Endpoint status */
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#define IMXRT_USBDEV_ENDPTCOMPLETE_OFFSET 0x1bc /* Endpoint complete */
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#define IMXRT_USBDEV_ENDPTCTRL_OFFSET(n) (IMXRT_USBDEV_ENDPTCTRL0_OFFSET + ((n) * 4))
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#define IMXRT_USBDEV_ENDPTCTRL0_OFFSET 0x1c0 /* Endpoint control 0 */
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#define IMXRT_USBDEV_ENDPTCTRL1_OFFSET 0x1c4 /* Endpoint control 1 */
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#define IMXRT_USBDEV_ENDPTCTRL2_OFFSET 0x1c8 /* Endpoint control 2 */
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@ -133,7 +135,7 @@
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#define IMXRT_USBNC_USB_OTG1_CTRL_OFFSET 0x0800 /* OTG1 Control Register */
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#define IMXRT_USBNC_USB_OTG1_PHY_CTRL_0_OFFSET 0x0818 /* OTG1 Phy Control Register */
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/* USBOTG register (virtual) addresses **********************************************************/
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/* USBOTG register (virtual) addresses ******************************************************/
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/* Device/host capability registers */
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@ -199,6 +201,8 @@
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#define IMXRT_USBDEV_ENDPTFLUSH (IMXRT_USB_BASE + IMXRT_USBDEV_ENDPTFLUSH_OFFSET)
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#define IMXRT_USBDEV_ENDPTSTATUS (IMXRT_USB_BASE + IMXRT_USBDEV_ENDPTSTATUS_OFFSET)
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#define IMXRT_USBDEV_ENDPTCOMPLETE (IMXRT_USB_BASE + IMXRT_USBDEV_ENDPTCOMPLETE_OFFSET)
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#define IMXRT_USBDEV_ENDPTCTRL(n) (IMXRT_USB_BASE + IMXRT_USBDEV_ENDPTCTRL_OFFSET(n))
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#define IMXRT_USBDEV_ENDPTCTRL0 (IMXRT_USB_BASE + IMXRT_USBDEV_ENDPTCTRL0_OFFSET)
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#define IMXRT_USBDEV_ENDPTCTRL1 (IMXRT_USB_BASE + IMXRT_USBDEV_ENDPTCTRL1_OFFSET)
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#define IMXRT_USBDEV_ENDPTCTRL2 (IMXRT_USB_BASE + IMXRT_USBDEV_ENDPTCTRL2_OFFSET)
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@ -213,7 +217,7 @@
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#define IMXRT_USBNC_USB_OTG1_CTRL (IMXRT_USB_BASE + IMXRT_USBNC_USB_OTG1_CTRL_OFFSET)
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#define IMXRT_USBNC_USB_OTG1_PHY_CTRL_0 (IMXRT_USB_BASE + IMXRT_USBNC_USB_OTG1_PHY_CTRL_0_OFFSET)
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/* USBOTG register bit definitions ******************************************/
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/* USBOTG register bit definitions **********************************************************/
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/* Device/host capability registers */
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@ -726,16 +730,4 @@
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/* Bit 30: Reserved */
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#define USBNC_WIR (1 << 31) /* Bit 31: Wake up interrupt request */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USBOTG_H */
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69
arch/arm/src/imxrt/hardware/imxrt_usbphy.h
Normal file
69
arch/arm/src/imxrt/hardware/imxrt_usbphy.h
Normal file
@ -0,0 +1,69 @@
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/****************************************************************************
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* arch/arm/src/imxrt/hardware/imxrt_usb_phy.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USB_PHY_H
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#define __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USB_PHY_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/imxrt_memorymap.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define IMXRT_USBPHY_BASE_OFFSET 0x1000 /* USB PHY Base */
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#define IMXRT_USBPHY_BASE (IMXRT_ANATOP_BASE + IMXRT_USBPHY_BASE_OFFSET) /* USB PHY Base */
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/* Register Offsets *********************************************************/
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#define IMXRT_USBPHY1_PWD_OFFSET 0x0000 /* USBPHY1 USB PHY Power-Down Register */
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#define IMXRT_USBPHY1_PWD_CLR_OFFSET 0x0008 /* USBPHY1 USB PHY Power-Down Register Clear */
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#define IMXRT_USBPHY1_CTRL_OFFSET 0x0030 /* USBPHY1 USB PHY General Control Register */
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#define IMXRT_USBPHY1_CTRL_CLR_OFFSET 0x0038 /* USBPHY1 USB PHY General Control Register Clear */
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/* Register addresses *******************************************************/
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#define IMXRT_USBPHY1_PWD (IMXRT_USBPHY_BASE + IMXRT_USBPHY1_PWD_OFFSET) /* USBPHY1 USB PHY Power-Down Register */
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#define IMXRT_USBPHY1_PWD_CLR (IMXRT_USBPHY_BASE + IMXRT_USBPHY1_PWD_CLR_OFFSET) /* USBPHY1 USB PHY Power-Down Register Clear */
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#define IMXRT_USBPHY1_CTRL (IMXRT_USBPHY_BASE + IMXRT_USBPHY1_CTRL_OFFSET) /* USBPHY1 USB PHY General Control Register */
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#define IMXRT_USBPHY1_CTRL_CLR (IMXRT_USBPHY_BASE + IMXRT_USBPHY1_CTRL_CLR_OFFSET) /* USBPHY1 USB PHY General Control Register Clear */
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/* Register Bit Definitions *************************************************/
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/* USB PHY Power-Down Register */
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#define USBPHY_PWD_RXPWDRX (1 << 20) /* Bit 20: Power-down the entire USB PHY receiver block except for the full-speed differential receiver. */
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#define USBPHY_PWD_RXPWDDIFF (1 << 19) /* Bit 19: Power-down the USB high-speed differential receiver. */
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#define USBPHY_PWD_RXPWD1PT1 (1 << 18) /* Bit 18: Power-down the USB full-speed differential receiver. */
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#define USBPHY_PWD_RXPWDENV (1 << 17) /* Bit 17: Power-down the USB high-speed receiver envelope detector (squelch signal). */
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#define USBPHY_PWD_TXPWDV2I (1 << 12) /* Bit 12: Power-down the USB PHY transmit V-to-I converter and the current mirror. */
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#define USBPHY_PWD_TXPWDIBIAS (1 << 11) /* Bit 11: Power-down the USB PHY current bias block for the transmitter. */
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#define USBPHY_PWD_TXPWDFS (1 << 10) /* Bit 10: Power-down the USB full-speed drivers. */
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/* USB PHY General Control Register */
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#define USBPHY_CTRL_SFTRST (1 << 31) /* Bit 31: Soft-reset */
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#define USBPHY_CTRL_CLKGATE (1 << 30) /* Bit 30: Gate UTMI clocks */
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#endif /* __ARCH_ARM_SRC_IMXRT_HARDWARE_IMXRT_USB_PHY_H */
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3059
arch/arm/src/imxrt/imxrt_usbdev.c
Normal file
3059
arch/arm/src/imxrt/imxrt_usbdev.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -58,6 +58,10 @@
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# include <nuttx/usb/usbmonitor.h>
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#endif
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#ifdef CONFIG_PL2303
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# include <nuttx/usb/pl2303.h>
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#endif
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#include "imxrt1060-evk.h"
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#include <arch/board/board.h> /* Must always be included last */
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@ -244,6 +248,10 @@ int imxrt_bringup(void)
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}
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#endif
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#ifdef CONFIG_PL2303
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usbdev_serialinitialize(0);
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#endif
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UNUSED(ret);
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return OK;
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}
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