Progress with C5471 boot

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@8 42af7a65-404d-4744-a932-0658087f49c3

arch/c5471/defconfig

@@ -43,6 +43,37 @@ CONFIG_ARCH=c5471
 CONFIG_ARCH_C5471=y
 CONFIG_ROM_VECTORS=n
 
+#
+# C5471 specific device driver settings
+#
+# CONFIG_SERIAL_IRDA_CONSOLE - selects the IRDA UART for the
+#   console ant ttys0 (default is the modem UART).
+# CONFIG_UART_*_HWFLOWCONTROL - enables hardware flow control
+# CONFIG_UART_*_RXBUFSIZE - Characters are buffered as received.
+#   This specific the size of the receive buffer
+# CONFIG_UART_*_TXBUFSIZE - Characters are buffered before
+#   being sent.  This specific the size of the transmit buffer
+# CONFIG_UART_*_BAUD - The configure BAUD of the UART.  Must be
+# CONFIG_UART_*_BITS - The number of bits.  Must be either 7 or 8.
+# CONFIG_UART_*_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+# CONFIG_UART_*_2STOP - Two stop bits
+#
+CONFIG_SERIAL_IRDA_CONSOLE=n
+CONFIG_UART_IRDA_HWFLOWCONTROL=y
+CONFIG_UART_MODEM_HWFLOWCONTROL=y
+CONFIG_UART_IRDA_RXBUFSIZE=256
+CONFIG_UART_MODEM_RXBUFSIZE=256
+CONFIG_UART_IRDA_TXBUFSIZE=256
+CONFIG_UART_MODEM_TXBUFSIZE=256
+CONFIG_UART_IRDA_BAUD=115200
+CONFIG_UART_MODEM_BAUD=115200
+CONFIG_UART_IRDA_BITS=8
+CONFIG_UART_MODEM_BITS=8
+CONFIG_UART_IRDA_PARITY=0
+CONFIG_UART_MODEM_PARITY=0
+CONFIG_UART_IRDA_2STOP=0
+CONFIG_UART_MODEM_2STOP=0
+
 #
 # General OS setup
 #
@@ -69,7 +100,7 @@ CONFIG_ROM_VECTORS=n
 CONFIG_EXAMPLE=ostest
 CONFIG_DEBUG=y
 CONFIG_DEBUG_VERBOSE=n
-CONFIG_ARCH_LOWPUTC=n
+CONFIG_ARCH_LOWPUTC=y
 CONFIG_RR_INTERVAL=200
 CONFIG_SCHED_INSTRUMENTATION=n
 CONFIG_TASK_NAME_SIZE=0
@@ -77,7 +108,7 @@ CONFIG_START_YEAR=2007
 CONFIG_START_MONTH=2
 CONFIG_START_DAY=13
 CONFIG_JULIAN_TIME=n
-CONFIG_DEV_CONSOLE=n
+CONFIG_DEV_CONSOLE=y
 
 #
 # Allow for artchitecture optimized implementations
@@ -157,9 +188,9 @@ CONFIG_PREALLOC_WDOGS=32
 # CONFIG_HEAP_SIZE - The size of the heap
 #
 CONFIG_BOOT_FROM_FLASH=n
-CONFIG_STACK_POINTER=0x02100000
+CONFIG_STACK_POINTER=
-CONFIG_PROC_STACK_SIZE=0x00001000
+CONFIG_PROC_STACK_SIZE=4096
 CONFIG_PTHREAD_STACK_MIN=256
 CONFIG_PTHREAD_STACK_DEFAULT=4096
-CONFIG_HEAP_BASE=0x02100000
+CONFIG_HEAP_BASE=(0x10300000+90*1024+4096)
-CONFIG_HEAP_SIZE=0x00100000
+CONFIG_HEAP_SIZE=(0x11000000-CONFIG_HEAP_BASE)

arch/c5471/include/irq.h

@@ -120,7 +120,7 @@
 #define C5471_IRQ_API           15
 
 #define C5471_IRQ_WATCHDOG      C5471_IRQ_TIMER0
-#define C5471_IRQ_SYSTIMER      C5471_IRQ_TIMER1
+#define C5471_IRQ_SYSTIMER      C5471_IRQ_TIMER2
 #define NR_IRQS                 (C5471_IRQ_API+1)
 
 /************************************************************

arch/c5471/include/serial.h

@@ -0,0 +1,66 @@
+/************************************************************
+ * serial.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+#ifndef __ARCH_SERIAL_H
+#define __ARCH_SERIAL_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* IOCTL commands supported by the C5471 serial driver */
+
+#define TIOCSBRK        0x5401  /* BSD compatibility */
+#define TIOCCBRK        0x5402  /* " " "           " */
+#define TIOCSERCONFIG   0x5403  /* Reconfigure the port */
+#define TIOCSERGSTRUCT  0x5458  /* Get up_dev_t for port */
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Functions
+ ************************************************************/
+
+#endif /* __ARCH_SERIAL_H */

arch/c5471/ld.script

@@ -62,7 +62,7 @@ SECTIONS
 
 	/* The OS entry point is here */
 
-	. = 0x01030000;
+	. = 0x10300000;
 	.text : {
 		_stext = ABSOLUTE(.);
 		*(.text)

arch/c5471/src/Makefile

@@ -38,8 +38,10 @@
 MKDEP 	= $(TOPDIR)/tools/mkdeps.sh
 CFLAGS	+= -I$(TOPDIR)/sched
 
-ASRCS	= up_vectors.S up_saveusercontext.S up_fullcontextrestore.S \
+ASRCS	= up_vectors.S up_saveusercontext.S up_fullcontextrestore.S
-	  up_lowputc.S
+ifeq ($(CONFIG_DEBUG),y)
+ASRCS	+= up_lowputc.S
+endif
 AOBJS	= $(ASRCS:.S=.o)
 
 CSRCS	= up_initialize.c up_initialstate.c up_idle.c \
@@ -48,7 +50,7 @@ CSRCS	= up_initialize.c up_initialstate.c up_idle.c \
 	  up_createstack.c up_usestack.c up_releasestack.c \
 	  up_exit.c up_assert.c up_blocktask.c up_unblocktask.c \
 	  up_releasepending.c up_reprioritizertr.c up_copystate.c \
-	  up_schedulesigaction.c up_sigdeliver.c
+	  up_schedulesigaction.c up_sigdeliver.c up_serial.c
 COBJS	= $(CSRCS:.c=.o)
 
 SRCS	= $(ASRCS) $(CSRCS)

arch/c5471/src/c5471.h

@@ -72,6 +72,10 @@
 #define CC_Z_BIT               (1 << 30)
 #define CC_N_BIT               (1 << 31)
 
+/* Clocking *************************************************/
+
+#define C5471_CLOCK            47500000 /* 47.5 MHz */
+
 /* UARTs ****************************************************/
 
 #define UART_IRDA_BASE         0xffff0800

arch/c5471/src/up_head.S

@@ -44,6 +44,18 @@
  * Definitions
  ************************************************************/
 
+	/* This macro will modify r0, r1, r2 and r14 */
+
+#ifdef CONFIG_DEBUG
+	.macro	showprogress, code
+	mov	r0, #\code
+	bl	up_lowputc
+	.endm
+#else
+	.macro	showprogress, code
+	.endm
+#endif
+
 /************************************************************
  * OS Entry Point
  ************************************************************/
@@ -61,6 +73,8 @@ __start:
 	mov	r0, #(SVC_MODE | I_BIT | F_BIT )
 	msr	cpsr, r0
 
+	showprogress 'A'
+
 	/* Setup system stack (and get the BSS range) */
 
 	adr	r0, LC0
@@ -73,6 +87,8 @@ __start:
 	strcc	r0, [r4], #4
 	bcc	1b
 
+	showprogress 'B'
+
 	/* Copy system .data sections to new home in RAM. */
 
 #ifdef CONFIG_BOOT_FROM_FLASH
@@ -86,40 +102,33 @@ __start:
 	blt	1b
 
 #endif
-
+	/* Perform early serial initialization */
-/* Initialize Kernel Stack Contents */
-
-#if 0
-	mov	r1, sp
-	sub	r1, r1, #INITIAL_STACK_SIZE
-	ldr	r0, L_STACK_MAGIC
-	str	r0, [r1], #4
-	ldr	r0, L_STACK_UNTOUCHED_MAGIC
-1:      cmp	r1, sp
-        strcc	r0, [r1], #4
-        bcc	1b
-#endif
-
-/* Jump to OS entry */
 
 	mov	fp, #0
+	bl	up_earlyserialinit
+
+#ifdef CONFIG_DEBUG
+	mov	r0, #'C'
+	bl	up_putc
+	mov	r0, #'\n'
+	bl	up_putc
+#endif
+
+	/* Then jump to OS entry */
+
 	b	os_start
 
 	/* Variables */
 
 LC0:	.long	_sbss
 	.long	_ebss
-	.long	CONFIG_STACK_POINTER+CONFIG_PROC_STACK_SIZE-4
+	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
 
 #ifdef CONFIG_BOOT_FROM_FLASH
-LC2:	.long	_eronly		@ Where .data defaults are stored in Flash.
+LC2:	.long	_eronly	/* Where .data defaults are stored in FLASH */
-	.long	_sdata		@ Where .data needs to reside in SDRAM.
+	.long	_sdata	/* Where .data needs to reside in SDRAM */
 	.long	_edata
 #endif
 
-#if 0
-L_STACK_UNTOUCHED_MAGIC: .long 0xfeef1ef0
-L_STACK_MAGIC:           .long 0xdeadbeef
-#endif
 	.end
 

arch/c5471/src/up_initialize.c

@@ -41,7 +41,6 @@
 #include <sys/types.h>
 #include <debug.h>
 #include <nuttx/arch.h>
-#include <nuttx/fs.h>
 #include "up_internal.h"
 
 /************************************************************
@@ -86,13 +85,15 @@ void up_initialize(void)
 
   up_irqinitialize();
 
-  /* Attach and enable the timer interrupt */
+  /* Initialize the system timer interrupt */
 
-  up_disable_irq(C5471_IRQ_SYSTIMER);
+  up_timerinit();
-  irq_attach(C5471_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
-  up_enable_irq(C5471_IRQ_SYSTIMER);
 
   /* Register devices */
 
   devnull_register();   /* Standard /dev/null */
+
+  /* Initialize the serial device driver */
+
+  up_serialinit();
 }

arch/c5471/src/up_internal.h

@@ -84,6 +84,12 @@ extern void up_syscall(uint32 *regs);
 extern int  up_timerisr(int irq, uint32 *regs);
 extern void up_undefinedinsn(uint32 *regs);
 
+#ifdef CONFIG_DEBUG
+extern void up_lowputc(char ch);
+#else
+# define up_lowputc(ch)
+#endif
+
 /* Defined in up_vectors.S */
 
 extern void up_vectorundefinsn(void);
@@ -94,6 +100,15 @@ extern void up_vectoraddrexcptn(void);
 extern void up_vectorirq(void);
 extern void up_vectorfiq(void);
 
+/* Defined in up_serial.c */
+
+extern void up_earlyserialinit(void);
+extern void up_serialinit(void);
+
+/* Defined in up_timerisr.c */
+
+extern void up_timerinit(void);
+
 #endif /* __ASSEMBLY__ */
 
 #endif  /* __UP_INTERNAL_H */

arch/c5471/src/up_lowputc.S

@@ -79,7 +79,7 @@
  */
 
 	.text
-	.global	up_putc
+	.global	up_lowputc
 	.type	up_lowputc, function
 up_lowputc:
 	/* On entry, r0 holds the character to be printed */

arch/c5471/src/up_timerisr.c

@@ -41,7 +41,30 @@
 #include <sys/types.h>
 #include <debug.h>
 #include <nuttx/arch.h>
+#include "clock_internal.h"
 #include "up_internal.h"
+#include "c5471.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* We want the general purpose timer running at the rate
+ * MSEC_PER_TICK. The C5471 clock is 47.5MHz and we're using
+ * a timer PTV value of 3 (3 == divide incoming frequency by
+ * 16) which then yields a 16 bitCLKS_PER_INT value
+ * of 29687.
+ *
+ *   47500000 / 16 = 2968750 clocks/sec
+ *   2968750 / 100 = 29687   clocks/ 100Hz interrupt
+ *
+ */
+
+#define CLKS_PER_INT       29687
+#define CLKS_PER_INT_SHIFT 5
+#define AR                 0x00000010
+#define ST                 0x00000008
+#define PTV                0x00000003
 
 /************************************************************
  * Private Types
@@ -91,3 +114,23 @@ int up_timerisr(int irq, uint32 *regs)
    current_regs = saved_regs;
    return 0;
 }
+
+void up_timerinit(void)
+{
+  uint32 val;
+
+  up_disable_irq(C5471_IRQ_SYSTIMER);
+
+  /* Start the general purpose timer running in auto-reload mode
+   * so that an interrupt is generated at the rate MSEC_PER_TICK.
+   */
+
+  val = ((CLKS_PER_INT-1) << CLKS_PER_INT_SHIFT) | AR | ST | PTV;
+  putreg32(val, C5471_TIMER2_CTRL);
+
+  /* Attach and enable the timer interrupt */
+
+  irq_attach(C5471_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  up_enable_irq(C5471_IRQ_SYSTIMER);
+}
+