STM32: Hook 1-Wire driver into the build system
This commit is contained in:
Gregory Nutt
parent
9ec104834a
commit
4a63a7760a
@ -120,7 +120,7 @@
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# define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */
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# define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */
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# define STM32_IRQ_UART4 (68) /* 52: USART2 global interrupt */
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# define STM32_IRQ_UART5 (69) /* 53: USART5 global interrupt */
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# define STM32_IRQ_UART5 (69) /* 53: UART5 global interrupt */
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# define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */
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# define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */
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# define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */
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@ -2160,63 +2160,47 @@ config STM32_TSC
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config STM32_USART1
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bool "USART1"
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default n
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select USART1_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_USART
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config STM32_USART2
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bool "USART2"
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default n
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select USART2_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_USART
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config STM32_USART3
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bool "USART3"
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default n
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depends on STM32_HAVE_USART3
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select ARCH_HAVE_SERIAL_TERMIOS
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select USART3_SERIALDRIVER
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select STM32_USART
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config STM32_UART4
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bool "UART4"
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default n
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depends on STM32_HAVE_UART4
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select ARCH_HAVE_SERIAL_TERMIOS
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select UART4_SERIALDRIVER
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select STM32_USART
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config STM32_UART5
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bool "UART5"
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default n
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depends on STM32_HAVE_UART5
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select ARCH_HAVE_SERIAL_TERMIOS
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select UART5_SERIALDRIVER
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select STM32_USART
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config STM32_USART6
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bool "USART6"
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default n
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depends on STM32_HAVE_USART6
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select ARCH_HAVE_SERIAL_TERMIOS
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select USART6_SERIALDRIVER
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select STM32_USART
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config STM32_UART7
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bool "UART7"
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default n
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depends on STM32_HAVE_UART7
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select ARCH_HAVE_SERIAL_TERMIOS
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select UART7_SERIALDRIVER
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select STM32_USART
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config STM32_UART8
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bool "UART8"
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default n
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depends on STM32_HAVE_UART8
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select ARCH_HAVE_SERIAL_TERMIOS
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select UART8_SERIALDRIVER
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select STM32_USART
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config STM32_USB
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@ -5414,13 +5398,37 @@ endmenu
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config STM32_USART
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bool
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config STM32_SERIALDRIVER
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bool
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config STM32_1WIREDRIVER
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bool
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menu "U[S]ART Configuration"
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depends on STM32_USART
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choice
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prompt "USART1 Driver Configuration"
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default STM32_USART1_SERIALDRIVER
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depends on STM32_USART1
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config STM32_USART1_SERIALDRIVER
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bool "Standard serial driver"
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select USART1_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_USART1_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # USART1 Driver Configuration
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if STM32_USART1_SERIALDRIVER
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config USART1_RS485
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bool "RS-485 on USART1"
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default n
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depends on STM32_USART1
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---help---
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Enable RS-485 interface on USART1. Your board config will have to
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provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be
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@ -5438,14 +5446,34 @@ config USART1_RS485_DIR_POLARITY
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config USART1_RXDMA
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bool "USART1 Rx DMA"
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default n
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depends on STM32_USART1 && (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2))
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depends on (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2))
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_USART1_SERIALDRIVER
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choice
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prompt "USART2 Driver Configuration"
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default STM32_USART2_SERIALDRIVER
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depends on STM32_USART2
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config STM32_USART2_SERIALDRIVER
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bool "Standard serial driver"
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select USART2_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_USART2_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # USART2 Driver Configuration
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if STM32_USART2_SERIALDRIVER
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config USART2_RS485
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bool "RS-485 on USART2"
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default n
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depends on STM32_USART2
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---help---
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Enable RS-485 interface on USART2. Your board config will have to
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provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be
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@ -5463,14 +5491,34 @@ config USART2_RS485_DIR_POLARITY
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config USART2_RXDMA
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bool "USART2 Rx DMA"
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default n
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depends on STM32_USART2 && STM32_DMA1
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depends on STM32_DMA1
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_USART2_SERIALDRIVER
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choice
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prompt "USART3 Driver Configuration"
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default STM32_USART3_SERIALDRIVER
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depends on STM32_USART3
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config STM32_USART3_SERIALDRIVER
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bool "Standard serial driver"
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select USART3_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_USART3_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # USART3 Driver Configuration
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if STM32_USART3_SERIALDRIVER
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config USART3_RS485
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bool "RS-485 on USART3"
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default n
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depends on STM32_USART3
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---help---
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Enable RS-485 interface on USART3. Your board config will have to
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provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be
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@ -5488,14 +5536,34 @@ config USART3_RS485_DIR_POLARITY
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config USART3_RXDMA
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bool "USART3 Rx DMA"
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default n
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depends on STM32_USART3 && STM32_DMA1
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depends on STM32_DMA1
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_USART3_SERIALDRIVER
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choice
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prompt "UART4 Driver Configuration"
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default STM32_UART4_SERIALDRIVER
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depends on STM32_UART4
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config STM32_UART4_SERIALDRIVER
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bool "Standard serial driver"
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select UART4_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_UART4_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # UART1 Driver Configuration
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if STM32_UART4_SERIALDRIVER
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config UART4_RS485
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bool "RS-485 on UART4"
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default n
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depends on STM32_UART4
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---help---
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Enable RS-485 interface on UART4. Your board config will have to
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provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be
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@ -5513,14 +5581,34 @@ config UART4_RS485_DIR_POLARITY
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config UART4_RXDMA
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bool "UART4 Rx DMA"
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default n
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depends on STM32_UART4 && STM32_DMA1
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depends on STM32_DMA1
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_UART4_SERIALDRIVER
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choice
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prompt "UART5 Driver Configuration"
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default STM32_UART5_SERIALDRIVER
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depends on STM32_UART5
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config STM32_UART5_SERIALDRIVER
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bool "Standard serial driver"
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select UART5_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_UART5_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # UART5 Driver Configuration
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if STM32_UART5_SERIALDRIVER
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config UART5_RS485
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bool "RS-485 on UART5"
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default n
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depends on STM32_UART5
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---help---
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Enable RS-485 interface on UART5. Your board config will have to
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provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be
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@ -5538,14 +5626,34 @@ config UART5_RS485_DIR_POLARITY
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config UART5_RXDMA
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bool "UART5 Rx DMA"
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default n
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depends on STM32_UART5 && STM32_DMA1
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depends on STM32_DMA1
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_UART5_SERIALDRIVER
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choice
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prompt "USART6 Driver Configuration"
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default STM32_USART6_SERIALDRIVER
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depends on STM32_USART6
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config STM32_USART6_SERIALDRIVER
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bool "Standard serial driver"
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select USART6_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_USART6_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # USART6 Driver Configuration
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if STM32_USART6_SERIALDRIVER
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config USART6_RS485
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bool "RS-485 on USART6"
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default n
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depends on STM32_USART6
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---help---
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Enable RS-485 interface on USART6. Your board config will have to
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provide GPIO_USART6_RS485_DIR pin definition. Currently it cannot be
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@ -5563,14 +5671,34 @@ config USART6_RS485_DIR_POLARITY
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config USART6_RXDMA
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bool "USART6 Rx DMA"
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default n
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depends on STM32_USART6 && STM32_DMA2
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depends on STM32_DMA2
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_USART6_SERIALDRIVER
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choice
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prompt "UART7 Driver Configuration"
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default STM32_UART7_SERIALDRIVER
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depends on STM32_UART7
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config STM32_UART7_SERIALDRIVER
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bool "Standard serial driver"
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select UART7_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_UART7_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # UART7 Driver Configuration
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if STM32_UART7_SERIALDRIVER
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config UART7_RS485
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bool "RS-485 on UART7"
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default n
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depends on STM32_UART7
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---help---
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Enable RS-485 interface on UART7. Your board config will have to
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provide GPIO_UART7_RS485_DIR pin definition. Currently it cannot be
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@ -5588,14 +5716,34 @@ config UART7_RS485_DIR_POLARITY
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config UART7_RXDMA
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bool "UART7 Rx DMA"
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default n
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depends on STM32_UART7 && STM32_DMA2
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depends on STM32_DMA2
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_UART7_SERIALDRIVER
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choice
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prompt "UART8 Driver Configuration"
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default STM32_UART8_SERIALDRIVER
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depends on STM32_UART7
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config STM32_UART8_SERIALDRIVER
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bool "Standard serial driver"
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select UART8_SERIALDRIVER
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32_SERIALDRIVER
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config STM32_UART8_1WIREDRIVER
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bool "1-Wire driver"
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select STM32_1WIREDRIVER
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endchoice # UART8 Driver Configuration
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if STM32_UART8_SERIALDRIVER
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config UART8_RS485
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bool "RS-485 on UART8"
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default n
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depends on STM32_UART8
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---help---
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Enable RS-485 interface on UART8. Your board config will have to
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provide GPIO_UART8_RS485_DIR pin definition. Currently it cannot be
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@ -5613,10 +5761,14 @@ config UART8_RS485_DIR_POLARITY
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config UART8_RXDMA
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bool "UART8 Rx DMA"
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default n
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depends on STM32_UART8 && STM32_DMA2
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depends on STM32_DMA2
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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endif # STM32_UART8_SERIALDRIVER
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if STM32_SERIALDRIVER
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config SERIAL_DISABLE_REORDERING
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bool "Disable reordering of ttySx devices."
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depends on STM32_USART1 || STM32_USART2 || STM32_USART3 || STM32_UART4 || STM32_UART5 || STM32_USART6 || STM32_UART7 || STM32_UART8
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@ -5661,8 +5813,6 @@ config STM32_SERIALBRK_BSDCOMPAT
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on because the SW starts the break and then the HW automatically clears
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the break. This makes it is difficult to sent a long break.
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endmenu # U[S]ART Configuration
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config STM32_USART_SINGLEWIRE
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bool "Single Wire Support"
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default n
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@ -5671,6 +5821,9 @@ config STM32_USART_SINGLEWIRE
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Enable single wire UART support. The option enables support for the
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TIOCSSINGLEWIRE ioctl in the STM32 serial driver.
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endif # STM32_SERIALDRIVER
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endmenu # U[S]ART Configuration
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menu "SPI Configuration"
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depends on STM32_SPI
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@ -211,6 +211,10 @@ ifeq ($(CONFIG_DAC),y)
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CHIP_CSRCS += stm32_dac.c
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endif
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ifeq ($(CONFIG_STM32_1WIREDRIVER),y)
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CHIP_CSRCS += stm32_1wire.c
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endif
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ifeq ($(CONFIG_STM32_RNG),y)
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CHIP_CSRCS += stm32_rng.c
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endif
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@ -110,7 +110,7 @@ UNUSED(STM32_IRQ_RESERVED6) /* Vector 16+49: Reserved 6 */
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VECTOR(stm32_tim5, STM32_IRQ_TIM5) /* Vector 16+50: TIM5 global interrupt */
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VECTOR(stm32_spi3, STM32_IRQ_SPI3) /* Vector 16+51: SPI3 global interrupt */
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VECTOR(stm32_uart4, STM32_IRQ_UART4) /* Vector 16+52: USART2 global interrupt */
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VECTOR(stm32_uart5, STM32_IRQ_UART5) /* Vector 16+53: USART5 global interrupt */
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VECTOR(stm32_uart5, STM32_IRQ_UART5) /* Vector 16+53: UART5 global interrupt */
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VECTOR(stm32_tim6, STM32_IRQ_TIM6) /* Vector 16+54: TIM6 global interrupt */
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VECTOR(stm32_tim7, STM32_IRQ_TIM7) /* Vector 16+55: TIM7 global interrupt */
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VECTOR(stm32_dma2ch1, STM32_IRQ_DMA2CH1) /* Vector 16+56: DMA2 Channel 1 global interrupt */
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File diff suppressed because it is too large
Load Diff
@ -1,113 +1,63 @@
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/************************************************************************************
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* arch/arm/src/stm32/stm32_1wire.h
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*
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* Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved.
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* Author: Aleksandr Vyhovanec <www.desh@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_1WIRE_H
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#define __ARCH_ARM_SRC_STM32_STM32_1WIRE_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
#if defined(CONFIG_STM32_STM32L15XX)
|
||||
# include "chip/stm32l15xxx_uart.h"
|
||||
#elif defined(CONFIG_STM32_STM32F10XX)
|
||||
# include "chip/stm32f10xxx_uart.h"
|
||||
#elif defined(CONFIG_STM32_STM32F20XX)
|
||||
# include "chip/stm32f20xxx_uart.h"
|
||||
#elif defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX)
|
||||
# include "chip/stm32f30xxx_uart.h"
|
||||
#elif defined(CONFIG_STM32_STM32F40XX)
|
||||
# include "chip/stm32f40xxx_uart.h"
|
||||
#else
|
||||
# error "Unsupported STM32 UART"
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* Check 1-Wire and U(S)ART conflicting */
|
||||
|
||||
#if defined(CONFIG_STM32_1WIRE1) && defined(CONFIG_STM32_USART1)
|
||||
# undef CONFIG_STM32_1WIRE1
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_1WIRE2) && defined(CONFIG_STM32_USART2)
|
||||
# undef CONFIG_STM32_1WIRE2
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_1WIRE3) && defined(CONFIG_STM32_USART3)
|
||||
# undef CONFIG_STM32_1WIRE3
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_1WIRE4) && defined(CONFIG_STM32_UART4)
|
||||
# undef CONFIG_STM32_1WIRE4
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_1WIRE5) && defined(CONFIG_STM32_UART5)
|
||||
# undef CONFIG_STM32_1WIRE5
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_1WIRE6) && defined(CONFIG_STM32_USART6)
|
||||
# undef CONFIG_STM32_1WIRE6
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_1WIRE7) && defined(CONFIG_STM32_UART7)
|
||||
# undef CONFIG_STM32_1WIRE7
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_1WIRE8) && defined(CONFIG_STM32_UART8)
|
||||
# undef CONFIG_STM32_1WIRE8
|
||||
#endif
|
||||
|
||||
/* Is there a 1-Wire enabled? */
|
||||
|
||||
#if defined(CONFIG_STM32_1WIRE1) || defined(CONFIG_STM32_1WIRE2) || \
|
||||
defined(CONFIG_STM32_1WIRE3) || defined(CONFIG_STM32_1WIRE4) || \
|
||||
defined(CONFIG_STM32_1WIRE5) || defined(CONFIG_STM32_1WIRE6) || \
|
||||
defined(CONFIG_STM32_1WIRE7) || defined(CONFIG_STM32_1WIRE8)
|
||||
# define HAVE_1WIRE 1
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_STM32_STM32_1WIRE_H */
|
||||
/************************************************************************************
|
||||
* arch/arm/src/stm32/stm32_1wire.h
|
||||
*
|
||||
* Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved.
|
||||
* Author: Aleksandr Vyhovanec <www.desh@gmail.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_STM32_STM32_1WIRE_H
|
||||
#define __ARCH_ARM_SRC_STM32_STM32_1WIRE_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "stm32_uart.h"
|
||||
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Data
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_STM32_STM32_1WIRE_H */
|
||||
|
||||
@ -436,7 +436,7 @@ void up_lowputc(char ch)
|
||||
|
||||
void stm32_lowsetup(void)
|
||||
{
|
||||
#if defined(HAVE_UART)
|
||||
#if defined(HAVE_SERIALDRIVER)
|
||||
uint32_t mapr;
|
||||
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
|
||||
uint32_t cr;
|
||||
@ -559,7 +559,7 @@ void stm32_lowsetup(void)
|
||||
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
|
||||
|
||||
#endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
|
||||
#endif /* HAVE_UART */
|
||||
#endif /* HAVE_SERIALDRIVER */
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \
|
||||
@ -568,7 +568,7 @@ void stm32_lowsetup(void)
|
||||
|
||||
void stm32_lowsetup(void)
|
||||
{
|
||||
#if defined(HAVE_UART)
|
||||
#if defined(HAVE_SERIALDRIVER)
|
||||
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
|
||||
uint32_t cr;
|
||||
#endif
|
||||
@ -638,7 +638,7 @@ void stm32_lowsetup(void)
|
||||
putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET);
|
||||
|
||||
#endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
|
||||
#endif /* HAVE_UART */
|
||||
#endif /* HAVE_SERIALDRIVER */
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
@ -272,7 +272,7 @@
|
||||
#endif
|
||||
|
||||
#ifdef USE_SERIALDRIVER
|
||||
#ifdef HAVE_UART
|
||||
#ifdef HAVE_SERIALDRIVER
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
@ -386,28 +386,28 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
|
||||
enum pm_state_e pmstate);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_USART1
|
||||
#ifdef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
static int up_interrupt_usart1(int irq, void *context);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART2
|
||||
#ifdef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
static int up_interrupt_usart2(int irq, void *context);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART3
|
||||
#ifdef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
static int up_interrupt_usart3(int irq, void *context);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART4
|
||||
#ifdef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
static int up_interrupt_uart4(int irq, void *context);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART5
|
||||
#ifdef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
static int up_interrupt_uart5(int irq, void *context);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART6
|
||||
#ifdef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
static int up_interrupt_usart6(int irq, void *context);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART7
|
||||
#ifdef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
static int up_interrupt_uart7(int irq, void *context);
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART8
|
||||
#ifdef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
static int up_interrupt_uart8(int irq, void *context);
|
||||
#endif
|
||||
|
||||
@ -459,7 +459,7 @@ static const struct uart_ops_s g_uart_dma_ops =
|
||||
|
||||
/* I/O buffers */
|
||||
|
||||
#ifdef CONFIG_STM32_USART1
|
||||
#ifdef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE];
|
||||
static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE];
|
||||
# ifdef CONFIG_USART1_RXDMA
|
||||
@ -467,7 +467,7 @@ static char g_usart1rxfifo[RXDMA_BUFFER_SIZE];
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_USART2
|
||||
#ifdef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE];
|
||||
static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE];
|
||||
# ifdef CONFIG_USART2_RXDMA
|
||||
@ -475,7 +475,7 @@ static char g_usart2rxfifo[RXDMA_BUFFER_SIZE];
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_USART3
|
||||
#ifdef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE];
|
||||
static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE];
|
||||
# ifdef CONFIG_USART3_RXDMA
|
||||
@ -483,7 +483,7 @@ static char g_usart3rxfifo[RXDMA_BUFFER_SIZE];
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART4
|
||||
#ifdef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
|
||||
static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
|
||||
# ifdef CONFIG_UART4_RXDMA
|
||||
@ -491,7 +491,7 @@ static char g_uart4rxfifo[RXDMA_BUFFER_SIZE];
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART5
|
||||
#ifdef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE];
|
||||
static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
|
||||
# ifdef CONFIG_UART5_RXDMA
|
||||
@ -499,7 +499,7 @@ static char g_uart5rxfifo[RXDMA_BUFFER_SIZE];
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_USART6
|
||||
#ifdef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
static char g_usart6rxbuffer[CONFIG_USART6_RXBUFSIZE];
|
||||
static char g_usart6txbuffer[CONFIG_USART6_TXBUFSIZE];
|
||||
# ifdef CONFIG_USART6_RXDMA
|
||||
@ -507,7 +507,7 @@ static char g_usart6rxfifo[RXDMA_BUFFER_SIZE];
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART7
|
||||
#ifdef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
static char g_uart7rxbuffer[CONFIG_UART7_RXBUFSIZE];
|
||||
static char g_uart7txbuffer[CONFIG_UART7_TXBUFSIZE];
|
||||
# ifdef CONFIG_UART7_RXDMA
|
||||
@ -515,7 +515,7 @@ static char g_uart7rxfifo[RXDMA_BUFFER_SIZE];
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART8
|
||||
#ifdef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
static char g_uart8rxbuffer[CONFIG_UART8_RXBUFSIZE];
|
||||
static char g_uart8txbuffer[CONFIG_UART8_TXBUFSIZE];
|
||||
# ifdef CONFIG_UART8_RXDMA
|
||||
@ -525,7 +525,7 @@ static char g_uart8rxfifo[RXDMA_BUFFER_SIZE];
|
||||
|
||||
/* This describes the state of the STM32 USART1 ports. */
|
||||
|
||||
#ifdef CONFIG_STM32_USART1
|
||||
#ifdef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
static struct up_dev_s g_usart1priv =
|
||||
{
|
||||
.dev =
|
||||
@ -587,7 +587,7 @@ static struct up_dev_s g_usart1priv =
|
||||
|
||||
/* This describes the state of the STM32 USART2 port. */
|
||||
|
||||
#ifdef CONFIG_STM32_USART2
|
||||
#ifdef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
static struct up_dev_s g_usart2priv =
|
||||
{
|
||||
.dev =
|
||||
@ -649,7 +649,7 @@ static struct up_dev_s g_usart2priv =
|
||||
|
||||
/* This describes the state of the STM32 USART3 port. */
|
||||
|
||||
#ifdef CONFIG_STM32_USART3
|
||||
#ifdef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
static struct up_dev_s g_usart3priv =
|
||||
{
|
||||
.dev =
|
||||
@ -711,7 +711,7 @@ static struct up_dev_s g_usart3priv =
|
||||
|
||||
/* This describes the state of the STM32 UART4 port. */
|
||||
|
||||
#ifdef CONFIG_STM32_UART4
|
||||
#ifdef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
static struct up_dev_s g_uart4priv =
|
||||
{
|
||||
.dev =
|
||||
@ -777,7 +777,7 @@ static struct up_dev_s g_uart4priv =
|
||||
|
||||
/* This describes the state of the STM32 UART5 port. */
|
||||
|
||||
#ifdef CONFIG_STM32_UART5
|
||||
#ifdef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
static struct up_dev_s g_uart5priv =
|
||||
{
|
||||
.dev =
|
||||
@ -843,7 +843,7 @@ static struct up_dev_s g_uart5priv =
|
||||
|
||||
/* This describes the state of the STM32 USART6 port. */
|
||||
|
||||
#ifdef CONFIG_STM32_USART6
|
||||
#ifdef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
static struct up_dev_s g_usart6priv =
|
||||
{
|
||||
.dev =
|
||||
@ -905,7 +905,7 @@ static struct up_dev_s g_usart6priv =
|
||||
|
||||
/* This describes the state of the STM32 UART7 port. */
|
||||
|
||||
#ifdef CONFIG_STM32_UART7
|
||||
#ifdef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
static struct up_dev_s g_uart7priv =
|
||||
{
|
||||
.dev =
|
||||
@ -940,11 +940,11 @@ static struct up_dev_s g_uart7priv =
|
||||
.usartbase = STM32_UART7_BASE,
|
||||
.tx_gpio = GPIO_UART7_TX,
|
||||
.rx_gpio = GPIO_UART7_RX,
|
||||
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART7_OFLOWCONTROL)
|
||||
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART7_OFLOWCONTROL)
|
||||
.oflow = true,
|
||||
.cts_gpio = GPIO_UART7_CTS,
|
||||
#endif
|
||||
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART7_IFLOWCONTROL)
|
||||
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART7_IFLOWCONTROL)
|
||||
.iflow = true,
|
||||
.rts_gpio = GPIO_UART7_RTS,
|
||||
#endif
|
||||
@ -967,7 +967,7 @@ static struct up_dev_s g_uart7priv =
|
||||
|
||||
/* This describes the state of the STM32 UART8 port. */
|
||||
|
||||
#ifdef CONFIG_STM32_UART8
|
||||
#ifdef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
static struct up_dev_s g_uart8priv =
|
||||
{
|
||||
.dev =
|
||||
@ -1002,11 +1002,11 @@ static struct up_dev_s g_uart8priv =
|
||||
.usartbase = STM32_UART8_BASE,
|
||||
.tx_gpio = GPIO_UART8_TX,
|
||||
.rx_gpio = GPIO_UART8_RX,
|
||||
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART8_OFLOWCONTROL)
|
||||
#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART8_OFLOWCONTROL)
|
||||
.oflow = true,
|
||||
.cts_gpio = GPIO_UART8_CTS,
|
||||
#endif
|
||||
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART8_IFLOWCONTROL)
|
||||
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART8_IFLOWCONTROL)
|
||||
.iflow = true,
|
||||
.rts_gpio = GPIO_UART8_RTS,
|
||||
#endif
|
||||
@ -1031,28 +1031,28 @@ static struct up_dev_s g_uart8priv =
|
||||
|
||||
static struct up_dev_s * const uart_devs[STM32_NUSART] =
|
||||
{
|
||||
#ifdef CONFIG_STM32_USART1
|
||||
#ifdef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
[0] = &g_usart1priv,
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART2
|
||||
#ifdef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
[1] = &g_usart2priv,
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART3
|
||||
#ifdef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
[2] = &g_usart3priv,
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART4
|
||||
#ifdef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
[3] = &g_uart4priv,
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART5
|
||||
#ifdef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
[4] = &g_uart5priv,
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART6
|
||||
#ifdef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
[5] = &g_usart6priv,
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART7
|
||||
#ifdef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
[6] = &g_uart7priv,
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART8
|
||||
#ifdef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
[7] = &g_uart8priv,
|
||||
#endif
|
||||
};
|
||||
@ -1376,49 +1376,49 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on)
|
||||
{
|
||||
default:
|
||||
return;
|
||||
#ifdef CONFIG_STM32_USART1
|
||||
#ifdef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
case STM32_USART1_BASE:
|
||||
rcc_en = RCC_APB2ENR_USART1EN;
|
||||
regaddr = STM32_RCC_APB2ENR;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART2
|
||||
#ifdef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
case STM32_USART2_BASE:
|
||||
rcc_en = RCC_APB1ENR_USART2EN;
|
||||
regaddr = STM32_RCC_APB1ENR;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART3
|
||||
#ifdef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
case STM32_USART3_BASE:
|
||||
rcc_en = RCC_APB1ENR_USART3EN;
|
||||
regaddr = STM32_RCC_APB1ENR;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART4
|
||||
#ifdef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
case STM32_UART4_BASE:
|
||||
rcc_en = RCC_APB1ENR_UART4EN;
|
||||
regaddr = STM32_RCC_APB1ENR;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART5
|
||||
#ifdef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
case STM32_UART5_BASE:
|
||||
rcc_en = RCC_APB1ENR_UART5EN;
|
||||
regaddr = STM32_RCC_APB1ENR;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_USART6
|
||||
#ifdef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
case STM32_USART6_BASE:
|
||||
rcc_en = RCC_APB2ENR_USART6EN;
|
||||
regaddr = STM32_RCC_APB2ENR;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART7
|
||||
#ifdef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
case STM32_UART7_BASE:
|
||||
rcc_en = RCC_APB1ENR_UART7EN;
|
||||
regaddr = STM32_RCC_APB1ENR;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32_UART8
|
||||
#ifdef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
case STM32_UART8_BASE:
|
||||
rcc_en = RCC_APB1ENR_UART8EN;
|
||||
regaddr = STM32_RCC_APB1ENR;
|
||||
@ -2579,56 +2579,56 @@ static bool up_txready(struct uart_dev_s *dev)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_STM32_USART1
|
||||
#ifdef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
static int up_interrupt_usart1(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_usart1priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_USART2
|
||||
#ifdef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
static int up_interrupt_usart2(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_usart2priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_USART3
|
||||
#ifdef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
static int up_interrupt_usart3(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_usart3priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART4
|
||||
#ifdef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
static int up_interrupt_uart4(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_uart4priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART5
|
||||
#ifdef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
static int up_interrupt_uart5(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_uart5priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_USART6
|
||||
#ifdef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
static int up_interrupt_usart6(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_usart6priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART7
|
||||
#ifdef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
static int up_interrupt_uart7(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_uart7priv);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_UART8
|
||||
#ifdef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
static int up_interrupt_uart8(int irq, void *context)
|
||||
{
|
||||
return up_interrupt_common(&g_uart8priv);
|
||||
@ -2771,7 +2771,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
#endif /* HAVE_UART */
|
||||
#endif /* HAVE_SERIALDRIVER */
|
||||
#endif /* USE_SERIALDRIVER */
|
||||
|
||||
/****************************************************************************
|
||||
@ -2793,7 +2793,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain,
|
||||
#ifdef USE_EARLYSERIALINIT
|
||||
void up_earlyserialinit(void)
|
||||
{
|
||||
#ifdef HAVE_UART
|
||||
#ifdef HAVE_SERIALDRIVER
|
||||
unsigned i;
|
||||
|
||||
/* Disable all USART interrupts */
|
||||
@ -2826,7 +2826,7 @@ void up_earlyserialinit(void)
|
||||
|
||||
void up_serialinit(void)
|
||||
{
|
||||
#ifdef HAVE_UART
|
||||
#ifdef HAVE_SERIALDRIVER
|
||||
char devname[16];
|
||||
unsigned i;
|
||||
unsigned minor = 0;
|
||||
|
||||
@ -90,18 +90,97 @@
|
||||
# undef CONFIG_STM32_USART1
|
||||
#endif
|
||||
|
||||
/* Is there a USART enabled? */
|
||||
/* Sanity checks */
|
||||
|
||||
#if defined(CONFIG_STM32_USART1) || defined(CONFIG_STM32_USART2) || \
|
||||
defined(CONFIG_STM32_USART3) || defined(CONFIG_STM32_UART4) || \
|
||||
defined(CONFIG_STM32_UART5) || defined(CONFIG_STM32_USART6) || \
|
||||
defined(CONFIG_STM32_UART7) || defined(CONFIG_STM32_UART8)
|
||||
# define HAVE_UART 1
|
||||
#if !defined(CONFIG_STM32_USART1)
|
||||
# undef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
# undef CONFIG_STM32_USART1_1WIREDRIVER
|
||||
#endif
|
||||
#if !defined(CONFIG_STM32_USART2)
|
||||
# undef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
# undef CONFIG_STM32_USART2_1WIREDRIVER
|
||||
#endif
|
||||
#if !defined(CONFIG_STM32_USART3)
|
||||
# undef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
# undef CONFIG_STM32_USART3_1WIREDRIVER
|
||||
#endif
|
||||
#if !defined(CONFIG_STM32_UART4)
|
||||
# undef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
# undef CONFIG_STM32_UART4_1WIREDRIVER
|
||||
#endif
|
||||
#if !defined(CONFIG_STM32_UART5)
|
||||
# undef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
# undef CONFIG_STM32_UART5_1WIREDRIVER
|
||||
#endif
|
||||
#if !defined(CONFIG_STM32_USART6)
|
||||
# undef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
# undef CONFIG_STM32_USART6_1WIREDRIVER
|
||||
#endif
|
||||
#if !defined(CONFIG_STM32_UART7)
|
||||
# undef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
# undef CONFIG_STM32_UART7_1WIREDRIVER
|
||||
#endif
|
||||
#if !defined(CONFIG_STM32_UART8)
|
||||
# undef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
# undef CONFIG_STM32_UART8_1WIREDRIVER
|
||||
#endif
|
||||
|
||||
/* Check 1-Wire and U(S)ART conflicts */
|
||||
|
||||
#if defined(CONFIG_STM32_USART1_1WIREDRIVER) && defined(CONFIG_STM32_USART1_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_USART1_1WIREDRIVER and CONFIG_STM32_USART1_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_USART1_1WIREDRIVER
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_USART2_1WIREDRIVER) && defined(CONFIG_STM32_USART2_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_USART2_1WIREDRIVER and CONFIG_STM32_USART2_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_USART2_1WIREDRIVER
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_USART3_1WIREDRIVER) && defined(CONFIG_STM32_USART3_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_USART3_1WIREDRIVER and CONFIG_STM32_USART3_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_USART3_1WIREDRIVER
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_UART4_1WIREDRIVER) && defined(CONFIG_STM32_UART4_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_UART4_1WIREDRIVER and CONFIG_STM32_UART4_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_UART4_1WIREDRIVER
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_UART5_1WIREDRIVER) && defined(CONFIG_STM32_UART5_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_UART5_1WIREDRIVER and CONFIG_STM32_UART5_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_UART5_1WIREDRIVER
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_USART6_1WIREDRIVER) && defined(CONFIG_STM32_USART6_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_USART6_1WIREDRIVER and CONFIG_STM32_USART6_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_USART6_1WIREDRIVER
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_UART7_1WIREDRIVER) && defined(CONFIG_STM32_UART7_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_UART7_1WIREDRIVER and CONFIG_STM32_UART7_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_UART7_1WIREDRIVER
|
||||
#endif
|
||||
#if defined(CONFIG_STM32_UART8_1WIREDRIVER) && defined(CONFIG_STM32_UART8_SERIALDRIVER)
|
||||
# error Both CONFIG_STM32_UART8_1WIREDRIVER and CONFIG_STM32_UART8_SERIALDRIVER defined
|
||||
# undef CONFIG_STM32_UART8_1WIREDRIVER
|
||||
#endif
|
||||
|
||||
/* Is the serial driver enabled? */
|
||||
|
||||
#if defined(CONFIG_STM32_USART1_SERIALDRIVER) || defined(CONFIG_STM32_USART2_SERIALDRIVER) || \
|
||||
defined(CONFIG_STM32_USART3_SERIALDRIVER) || defined(CONFIG_STM32_UART4_SERIALDRIVER) || \
|
||||
defined(CONFIG_STM32_UART5_SERIALDRIVER) || defined(CONFIG_STM32_USART6_SERIALDRIVER) || \
|
||||
defined(CONFIG_STM32_UART7_SERIALDRIVER) || defined(CONFIG_STM32_UART8_SERIALDRIVER)
|
||||
# define HAVE_SERIALDRIVER 1
|
||||
#endif
|
||||
|
||||
/* Is the 1-Wire driver? */
|
||||
|
||||
#if defined(CONFIG_STM32_USART1_1WIREDRIVER) || defined(CONFIG_STM32_USART2_1WIREDRIVER) || \
|
||||
defined(CONFIG_STM32_USART3_1WIREDRIVER) || defined(CONFIG_STM32_UART4_1WIREDRIVER) || \
|
||||
defined(CONFIG_STM32_UART5_1WIREDRIVER) || defined(CONFIG_STM32_USART6_1WIREDRIVER) || \
|
||||
defined(CONFIG_STM32_UART7_1WIREDRIVER) || defined(CONFIG_STM32_UART8_1WIREDRIVER)
|
||||
# define HAVE_1WIREDRIVER 1
|
||||
#endif
|
||||
|
||||
/* Is there a serial console? */
|
||||
|
||||
#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1)
|
||||
#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1_SERIALDRIVER)
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
@ -111,7 +190,7 @@
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 1
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2)
|
||||
#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2_SERIALDRIVER)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
@ -121,7 +200,7 @@
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 2
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3)
|
||||
#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3_SERIALDRIVER)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_UART4_SERIAL_CONSOLE
|
||||
@ -131,7 +210,7 @@
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 3
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4)
|
||||
#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4_SERIALDRIVER)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
@ -141,7 +220,7 @@
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 4
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5)
|
||||
#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5_SERIALDRIVER)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
@ -151,7 +230,7 @@
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 5
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6)
|
||||
#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6_SERIALDRIVER)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
@ -161,7 +240,7 @@
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 6
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7)
|
||||
#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7_SERIALDRIVER)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
@ -172,7 +251,7 @@
|
||||
# undef CONFIG_UART8_SERIAL_CONSOLE
|
||||
# define CONSOLE_UART 7
|
||||
# define HAVE_CONSOLE 1
|
||||
#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8)
|
||||
#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8_SERIALDRIVER)
|
||||
# undef CONFIG_USART1_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART2_SERIAL_CONSOLE
|
||||
# undef CONFIG_USART3_SERIAL_CONSOLE
|
||||
@ -197,7 +276,7 @@
|
||||
|
||||
/* DMA support is only provided if CONFIG_ARCH_DMA is in the NuttX configuration */
|
||||
|
||||
#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA)
|
||||
#if !defined(HAVE_SERIALDRIVER) || !defined(CONFIG_ARCH_DMA)
|
||||
# undef CONFIG_USART1_RXDMA
|
||||
# undef CONFIG_USART2_RXDMA
|
||||
# undef CONFIG_USART3_RXDMA
|
||||
@ -210,35 +289,35 @@
|
||||
|
||||
/* Disable the DMA configuration on all unused USARTs */
|
||||
|
||||
#ifndef CONFIG_STM32_USART1
|
||||
#ifndef CONFIG_STM32_USART1_SERIALDRIVER
|
||||
# undef CONFIG_USART1_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_USART2
|
||||
#ifndef CONFIG_STM32_USART2_SERIALDRIVER
|
||||
# undef CONFIG_USART2_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_USART3
|
||||
#ifndef CONFIG_STM32_USART3_SERIALDRIVER
|
||||
# undef CONFIG_USART3_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_UART4
|
||||
#ifndef CONFIG_STM32_UART4_SERIALDRIVER
|
||||
# undef CONFIG_UART4_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_UART5
|
||||
#ifndef CONFIG_STM32_UART5_SERIALDRIVER
|
||||
# undef CONFIG_UART5_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_USART6
|
||||
#ifndef CONFIG_STM32_USART6_SERIALDRIVER
|
||||
# undef CONFIG_USART6_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_UART7
|
||||
#ifndef CONFIG_STM32_UART7_SERIALDRIVER
|
||||
# undef CONFIG_UART7_RXDMA
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_STM32_UART8
|
||||
#ifndef CONFIG_STM32_UART8_SERIALDRIVER
|
||||
# undef CONFIG_UART8_RXDMA
|
||||
#endif
|
||||
|
||||
@ -276,21 +355,21 @@
|
||||
/* Is DMA used on all (enabled) USARTs */
|
||||
|
||||
#define SERIAL_HAVE_ONLY_DMA 1
|
||||
#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_USART1_RXDMA)
|
||||
#if defined(CONFIG_STM32_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_USART2) && !defined(CONFIG_USART2_RXDMA)
|
||||
#elif defined(CONFIG_STM32_USART2_SERIALDRIVER) && !defined(CONFIG_USART2_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_USART3) && !defined(CONFIG_USART3_RXDMA)
|
||||
#elif defined(CONFIG_STM32_USART3_SERIALDRIVER) && !defined(CONFIG_USART3_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_UART4_RXDMA)
|
||||
#elif defined(CONFIG_STM32_UART4_SERIALDRIVER) && !defined(CONFIG_UART4_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_UART5_RXDMA)
|
||||
#elif defined(CONFIG_STM32_UART5_SERIALDRIVER) && !defined(CONFIG_UART5_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_USART6) && !defined(CONFIG_USART6_RXDMA)
|
||||
#elif defined(CONFIG_STM32_USART6_SERIALDRIVER) && !defined(CONFIG_USART6_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_UART7) && !defined(CONFIG_UART7_RXDMA)
|
||||
#elif defined(CONFIG_STM32_UART7_SERIALDRIVER) && !defined(CONFIG_UART7_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#elif defined(CONFIG_STM32_UART8) && !defined(CONFIG_UART8_RXDMA)
|
||||
#elif defined(CONFIG_STM32_UART8_SERIALDRIVER) && !defined(CONFIG_UART8_RXDMA)
|
||||
# undef SERIAL_HAVE_ONLY_DMA
|
||||
#endif
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user