imxrt:imxrt_lowputc Fixed parity settings.
imxrt UART must be placed in 9 bit mode (M=1) with when 8 bit data with parity is required. If left in 8 bit mode (M=0) with parity then D7 of the TX/RX register becomes parity bit. Hence what is called 9-bit or 8-bit Mode Select is a misnomer. 8 bit mode when parity is enabled is realy 7 bit with parity.
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@ -1,35 +1,20 @@
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/****************************************************************************
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* arch/arm/src/imxrt/imxrt_lowputc.c
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*
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* Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved.
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* Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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@ -544,14 +529,14 @@ int imxrt_lpuart_configure(uint32_t base,
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regval |= LPUART_CTRL_PE | LPUART_CTRL_PT_EVEN;
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}
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if (config->bits == 8)
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{
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regval &= ~LPUART_CTRL_M;
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}
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else if (config->bits == 9)
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if (config->bits == 9 || (config->bits == 8 && config->parity != 0))
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{
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regval |= LPUART_CTRL_M;
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}
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else if ((config->bits == 8))
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{
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regval &= ~LPUART_CTRL_M;
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}
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else
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{
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/* Here should be added support of other bit modes. */
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@ -590,13 +575,16 @@ void imxrt_lowputc(int ch)
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{
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}
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/* If the character to output is a newline, then pre-pend a carriage return */
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/* If the character to output is a newline, then pre-pend a carriage
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* return
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*/
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if (ch == '\n')
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{
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/* Send the carriage return by writing it into the UART_TXD register. */
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putreg32((uint32_t)'\r', IMXRT_CONSOLE_BASE + IMXRT_LPUART_DATA_OFFSET);
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putreg32((uint32_t)'\r', IMXRT_CONSOLE_BASE +
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IMXRT_LPUART_DATA_OFFSET);
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/* Wait for the transmit register to be emptied. When the TXFE bit is
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* non-zero, the TX Buffer FIFO is empty.
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