16Z: Some early bring-up fixes
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e44748d1c3
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@ -98,72 +98,95 @@ Z16F_FLOPTION3 = (Z16F_FLOPTION3_RESVD|Z16F_FLOPTION3_NORMAL);
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*
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***************************************************************************/
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static void z16f_sysclkinit(void)
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static void z16f_sysclkinit(int clockid, uint32_t frequency)
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{
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int count;
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int temp_oscdiv;
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/* _DEFSRC (SCKSEL Bits 1,0) is passed to program view the .linkcmd file */
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if ((getreg8(Z16F_OSC_CTL) & 0x03) != _DEFSRC)
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if ((getreg8(Z16F_OSC_CTL) & 0x03) != clockid)
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{
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if (_DEFSRC == 0)
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switch (clockid)
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{
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/* Enable 5.6 MHz clock RESET DEFAULT*/
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/* 0: Internal precision oscillator functions as system clock at 5.6 MHz */
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xa0, Z16F_OSC_CTL);
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case 0:
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{
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/* Enable 5.6 MHz clock RESET DEFAULT*/
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/* Wait for oscillator to stabilize */
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xa0, Z16F_OSC_CTL);
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for (count = 0; count < 10000; count++);
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/* Wait for oscillator to stabilize */
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/* Select 5.6 MHz clock (SCKSEL=0) */
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for (count = 0; count < 10000; count++);
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xa0, Z16F_OSC_CTL);
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}
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else if (_DEFSRC == 1)
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{
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/* Enable (reserved) clock */
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}
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else if (_DEFSRC == 2 )
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{
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/* Enable external oscillator */
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/* Select 5.6 MHz clock (SCKSEL=0) */
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xe0, Z16F_OSC_CTL);
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xa0, Z16F_OSC_CTL);
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}
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break;
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/* Wait for oscillator to stabilize */
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/* 1: Crystal oscillator or external clock driver functions as system clock */
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for (count = 0; count < 10000; count++);
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case 1:
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{
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/* No divider for the oscillator */
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/* select external oscillator (SCKSEL=2) */
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putreg8(0x00, Z16F_OSC_DIV);
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xe0 | 2, Z16F_OSC_CTL);
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}
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else if (_DEFSRC == 3)
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{
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/* Enable watchdog timer clock */
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/* Enable external oscillator */
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xb0, Z16F_OSC_CTL);
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xe0, Z16F_OSC_CTL); /* INTEN+XTLEN+WDTEN */
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/* Wait for oscillator to stabilize */
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/* Wait for oscillator to stabilize */
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for (count = 0; count < 10000; count++);
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for (count = 0; count < 10000; count++);
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/* Select watch dog timer clock (SKCSEL=3) */
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/* select external oscillator (SCKSEL=2) */
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xb0 | 3, Z16F_OSC_CTL);
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xe0 | 1, Z16F_OSC_CTL);
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}
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break;
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/* 2: Reserved */
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default:
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case 2:
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{
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/* Reserved */
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}
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break;
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/* Watchdog Timer oscillator functions as system clock. */
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case 3:
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{
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/* Enable watchdog timer clock */
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xb0, Z16F_OSC_CTL);
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/* Wait for oscillator to stabilize */
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for (count = 0; count < 10000; count++);
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/* Select watch dog timer clock (SKCSEL=3) */
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xb0 | 3, Z16F_OSC_CTL);
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}
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break;
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}
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}
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@ -171,22 +194,22 @@ static void z16f_sysclkinit(void)
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* divide the clock if the user has selected the OTHER option for frequency.
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*/
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if (((_DEFSRC == 0) && (_DEFCLK < 3000000ul)) ||
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((_DEFSRC == 2) && (_DEFCLK <= 10000000ul)))
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if (((clockid == 0) && (frequency < 3000000ul)) ||
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((clockid == 1) && (frequency <= 10000000ul)))
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{
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if ( _DEFSRC == 0 )
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if ( clockid == 0 )
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{
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temp_oscdiv = ( 5526000ul / (_DEFCLK +1) );
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temp_oscdiv = (5526000ul / (frequency + 1));
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/* Example @ 32 KHz: 0xAC (172 decimal)*/
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}
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else
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{
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temp_oscdiv = (( 20000000ul / (_DEFCLK +1) ) + 1 );
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temp_oscdiv = ((20000000ul / (frequency +1)) + 1);
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}
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/* Unlock and Set the Oscillator Division Register (Z16F_OSC_DIV) */
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putreg8(0xE7, Z16F_OSC_CTL);
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(temp_oscdiv, Z16F_OSC_DIV);
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}
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@ -206,32 +229,35 @@ static void z16f_sysclkinit(void)
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* stabilize.
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***************************************************************************/
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static void z16f_sysclkinit(void)
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static void z16f_sysclkinit(int clockid, uint32_t frequency)
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{
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int count;
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/*
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* _DEFSRC (SCKSEL Bits 1,0) is passed to program from Target Settings Dialog.
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* I.E. extern _Erom unsigned long SYS_CLK_SRC;
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/* In this configuration, we support only the external oscillator/clock
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* the the source of the system clock (__DEFCLK is ignored).
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*/
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if ((getreg8(Z16F_OSC_CTL) & 0x03) != _DEFSRC)
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if ((getreg8(Z16F_OSC_CTL) & 0x03) != 1)
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{
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/* No divider for the oscillator */
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putreg8(0x00, Z16F_OSC_DIV);
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/* Enable external oscillator */
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xe0, Z16F_OSC_CTL);
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putreg8(0xe0, Z16F_OSC_CTL); /* INTEN+XTLEN+WDTEN */
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/* Wait for oscillator to stabilize */
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for (count = 0; count < 10000; count++);
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/* Select external oscillator (SCLKSEL=2) */
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/* Select external oscillator (SCLKSEL=1) */
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putreg8(0xe7, Z16F_OSC_CTL);
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putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
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putreg8(0x18, Z16F_OSC_CTL);
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putreg8(0xe0 | 2, Z16F_OSC_CTL);
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putreg8(0xe0 | 1, Z16F_OSC_CTL); /* Use the external osc/clock as system clock */
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}
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}
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#endif /* CONFIG_DEBUG */
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@ -246,6 +272,7 @@ static void z16f_sysclkinit(void)
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void z16f_clkinit(void)
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{
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z16f_sysclkinit();
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}
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/* _DEFSRC (SCKSEL Bits 1,0) is passed to program view the .linkcmd file */
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z16f_sysclkinit(_DEFSRC, _DEFCLK);
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}
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@ -2,7 +2,7 @@
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* arch/z16/src/z16f/z16f_lowuart.asm
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* Z16F UART management
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*
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* Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2008, 2012, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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