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16Z: Some early bring-up fixes

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This commit is contained in:
Gregory Nutt 2014-01-22 13:46:42 -06:00
parent e44748d1c3
commit 4b74cf594f
2 changed files with 89 additions and 62 deletions
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97
arch/z16/src/z16f/z16f_clkinit.c
View File

@ -98,20 +98,24 @@ Z16F_FLOPTION3 = (Z16F_FLOPTION3_RESVD|Z16F_FLOPTION3_NORMAL);
* *
***************************************************************************/ ***************************************************************************/
static void z16f_sysclkinit(void) static void z16f_sysclkinit(int clockid, uint32_t frequency)
{ {
int count; int count;
int temp_oscdiv; int temp_oscdiv;
/* _DEFSRC (SCKSEL Bits 1,0) is passed to program view the .linkcmd file */ /* _DEFSRC (SCKSEL Bits 1,0) is passed to program view the .linkcmd file */
if ((getreg8(Z16F_OSC_CTL) & 0x03) != _DEFSRC) if ((getreg8(Z16F_OSC_CTL) & 0x03) != clockid)
{ {
if (_DEFSRC == 0) switch (clockid)
{
/* 0: Internal precision oscillator functions as system clock at 5.6 MHz */
case 0:
{ {
/* Enable 5.6 MHz clock RESET DEFAULT*/ /* Enable 5.6 MHz clock RESET DEFAULT*/
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xa0, Z16F_OSC_CTL); putreg8(0xa0, Z16F_OSC_CTL);
@ -121,21 +125,25 @@ static void z16f_sysclkinit(void)
/* Select 5.6 MHz clock (SCKSEL=0) */ /* Select 5.6 MHz clock (SCKSEL=0) */
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xa0, Z16F_OSC_CTL); putreg8(0xa0, Z16F_OSC_CTL);
} }
else if (_DEFSRC == 1) break;
{
/* Enable (reserved) clock */ /* 1: Crystal oscillator or external clock driver functions as system clock */
}
else if (_DEFSRC == 2 ) case 1:
{ {
/* No divider for the oscillator */
putreg8(0x00, Z16F_OSC_DIV);
/* Enable external oscillator */ /* Enable external oscillator */
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xe0, Z16F_OSC_CTL); putreg8(0xe0, Z16F_OSC_CTL); /* INTEN+XTLEN+WDTEN */
/* Wait for oscillator to stabilize */ /* Wait for oscillator to stabilize */
@ -143,15 +151,28 @@ static void z16f_sysclkinit(void)
/* select external oscillator (SCKSEL=2) */ /* select external oscillator (SCKSEL=2) */
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xe0 | 2, Z16F_OSC_CTL); putreg8(0xe0 | 1, Z16F_OSC_CTL);
} }
else if (_DEFSRC == 3) break;
/* 2: Reserved */
default:
case 2:
{
/* Reserved */
}
break;
/* Watchdog Timer oscillator functions as system clock. */
case 3:
{ {
/* Enable watchdog timer clock */ /* Enable watchdog timer clock */
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xb0, Z16F_OSC_CTL); putreg8(0xb0, Z16F_OSC_CTL);
@ -161,32 +182,34 @@ static void z16f_sysclkinit(void)
/* Select watch dog timer clock (SKCSEL=3) */ /* Select watch dog timer clock (SKCSEL=3) */
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xb0 | 3, Z16F_OSC_CTL); putreg8(0xb0 | 3, Z16F_OSC_CTL);
} }
break;
}
} }
/* Check SysClock Frequency. /* Check SysClock Frequency.
* divide the clock if the user has selected the OTHER option for frequency. * divide the clock if the user has selected the OTHER option for frequency.
*/ */
if (((_DEFSRC == 0) && (_DEFCLK < 3000000ul)) || if (((clockid == 0) && (frequency < 3000000ul)) ||
((_DEFSRC == 2) && (_DEFCLK <= 10000000ul))) ((clockid == 1) && (frequency <= 10000000ul)))
{ {
if ( _DEFSRC == 0 ) if ( clockid == 0 )
{ {
temp_oscdiv = ( 5526000ul / (_DEFCLK +1) ); temp_oscdiv = (5526000ul / (frequency + 1));
/* Example @ 32 KHz: 0xAC (172 decimal)*/ /* Example @ 32 KHz: 0xAC (172 decimal)*/
} }
else else
{ {
temp_oscdiv = (( 20000000ul / (_DEFCLK +1) ) + 1 ); temp_oscdiv = ((20000000ul / (frequency +1)) + 1);
} }
/* Unlock and Set the Oscillator Division Register (Z16F_OSC_DIV) */ /* Unlock and Set the Oscillator Division Register (Z16F_OSC_DIV) */
putreg8(0xE7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(temp_oscdiv, Z16F_OSC_DIV); putreg8(temp_oscdiv, Z16F_OSC_DIV);
} }
@ -206,32 +229,35 @@ static void z16f_sysclkinit(void)
* stabilize. * stabilize.
***************************************************************************/ ***************************************************************************/
static void z16f_sysclkinit(void) static void z16f_sysclkinit(int clockid, uint32_t frequency)
{ {
int count; int count;
/* /* In this configuration, we support only the external oscillator/clock
* _DEFSRC (SCKSEL Bits 1,0) is passed to program from Target Settings Dialog. * the the source of the system clock (__DEFCLK is ignored).
* I.E. extern _Erom unsigned long SYS_CLK_SRC;
*/ */
if ((getreg8(Z16F_OSC_CTL) & 0x03) != _DEFSRC) if ((getreg8(Z16F_OSC_CTL) & 0x03) != 1)
{ {
/* No divider for the oscillator */
putreg8(0x00, Z16F_OSC_DIV);
/* Enable external oscillator */ /* Enable external oscillator */
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xe0, Z16F_OSC_CTL); putreg8(0xe0, Z16F_OSC_CTL); /* INTEN+XTLEN+WDTEN */
/* Wait for oscillator to stabilize */ /* Wait for oscillator to stabilize */
for (count = 0; count < 10000; count++); for (count = 0; count < 10000; count++);
/* Select external oscillator (SCLKSEL=2) */ /* Select external oscillator (SCLKSEL=1) */
putreg8(0xe7, Z16F_OSC_CTL); putreg8(0xe7, Z16F_OSC_CTL); /* Unlock the crystal oscillator */
putreg8(0x18, Z16F_OSC_CTL); putreg8(0x18, Z16F_OSC_CTL);
putreg8(0xe0 | 2, Z16F_OSC_CTL); putreg8(0xe0 | 1, Z16F_OSC_CTL); /* Use the external osc/clock as system clock */
} }
} }
#endif /* CONFIG_DEBUG */ #endif /* CONFIG_DEBUG */
@ -246,6 +272,7 @@ static void z16f_sysclkinit(void)
void z16f_clkinit(void) void z16f_clkinit(void)
{ {
z16f_sysclkinit(); /* _DEFSRC (SCKSEL Bits 1,0) is passed to program view the .linkcmd file */
}
z16f_sysclkinit(_DEFSRC, _DEFCLK);
}

2
arch/z16/src/z16f/z16f_lowuart.S
View File

@ -2,7 +2,7 @@
* arch/z16/src/z16f/z16f_lowuart.asm * arch/z16/src/z16f/z16f_lowuart.asm
* Z16F UART management * Z16F UART management
* *
* Copyright (C) 2008, 2012 Gregory Nutt. All rights reserved. * Copyright (C) 2008, 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without