Merged in masayuki2009/nuttx.nuttx/lc823450_spi_flash (pull request #687)
lc823450 spi flash
* arch/arm/src/lc823450: Add SPI flash driver for lc823450
NOTE: Only bus accelerator mode is supported.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
* arch/arm/src/lc823450: Remove unnecessary settings in Kconfig
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Approved-by: GregoryN <gnutt@nuttx.org>
This commit is contained in:
Masayuki Ishikawa
GregoryN
parent
4c756e3872
commit
4bc2ba3bee
@ -37,42 +37,11 @@ config LC823450_WDT
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config LC823450_SPIFI
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bool "SPI Flash Interface (SPIFI)"
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default n
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depends on MTD
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if LC823450_SPIFI
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config LC823450_SPIFI_DEVNO
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int "number in /dev/mtdblk?"
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default 0
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config LC823450_SPIFI_SIZE
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int "SPI FLASH size (byte)"
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default 4194304
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config LC823450_SPIFI_QUADIO
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bool "SPIFI 4bit access"
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default n
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config LC823450_SPIFI_RAMFAT
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bool "SPIFI with SRAM FAT"
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default n
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config LC823450_SPIFI_RAMFAT_VOLUMELABEL
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string "volume label for SRAM FAT"
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depends on LC823450_SPIFI_RAMFAT
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config LC823450_SPIFI_BACKUP
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bool "power dwon tolerance I/O"
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default n
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config LC823450_SPIFI_BACKUP_HEAD_OFFSET
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hex "backup header offset"
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depends on LC823450_SPIFI_BACKUP
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config LC823450_SPIFI_BACKUP_VAL_OFFSET
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hex "backup area offset"
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depends on LC823450_SPIFI_BACKUP
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default y
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endif
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config LC823450_SDIF
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@ -1,7 +1,7 @@
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############################################################################
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# arch/arm/src/lc823450/Make.defs
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#
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# Copyright 2014, 2015, 2016, 2017 Sony Video & Sound Products Inc.
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# Copyright 2014, 2015, 2016, 2017, 2018 Sony Video & Sound Products Inc.
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# Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
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# Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
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# Author: Yasuhiro Osaki <Yasuhiro.Osaki@jp.sony.com>
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@ -92,7 +92,7 @@ CHIP_CSRCS += lc823450_wdt.c
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endif
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ifeq ($(CONFIG_LC823450_SPIFI), y)
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CHIP_CSRCS += lc823450_spifi.c
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CHIP_CSRCS += lc823450_spifi2.c
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endif
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ifeq ($(CONFIG_LC823450_SDIF), y)
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364
arch/arm/src/lc823450/lc823450_spifi2.c
Normal file
364
arch/arm/src/lc823450/lc823450_spifi2.c
Normal file
@ -0,0 +1,364 @@
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/****************************************************************************
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* arch/arm/src/lc823450/lc823450_spifi2.c
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*
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* Copyright 2014,2015,2016,2017,2018 Sony Video & Sound Products Inc.
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* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
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* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/arch.h>
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#include <errno.h>
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#include "chip.h"
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#include "up_arch.h"
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#include "lc823450_syscontrol.h"
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#include "lc823450_spifi2.h"
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: wait_txfifo_empty
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****************************************************************************/
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static int wait_txfifo_empty(void)
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{
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int t;
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t = 1000;
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while ((getreg32(SF_FIFO_NUM) & SF_FIFO_NUM_T_MASK) && t)
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{
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up_udelay(1);
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t--;
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}
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return t == 0 ? -ETIMEDOUT : 0;
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}
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/****************************************************************************
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* Name: wait_rxfifo_notempty
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****************************************************************************/
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static int wait_rxfifo_notempty(void)
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{
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int t;
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t = 1000;
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while (!(getreg32(SF_FIFO_NUM) & SF_FIFO_NUM_R_MASK) && t)
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{
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up_udelay(1);
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t--;
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}
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return t == 0 ? -ETIMEDOUT : 0;
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}
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/****************************************************************************
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* Name: spiflash_cmd_only
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****************************************************************************/
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static int spiflash_cmd_only(int cmd)
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{
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/* COMMAND(1byte) = 1 */
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putreg32(SF_SIZE_NOREAD | 1 << SF_SIZE_T_SHIFT, SF_SIZE);
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putreg32(0, SF_DUMMY);
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putreg8(cmd, SF_T_FIFO);
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/* Start Transfer */
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putreg32(SF_CTL_ACT, SF_CTL);
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return wait_txfifo_empty();
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}
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/****************************************************************************
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* Name: spiflash_read_jdid
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****************************************************************************/
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static int spiflash_read_jdid(void)
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{
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int ret = 0;
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/* COMMAND(1byte) + jid(3byte) */
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putreg32(1 << SF_SIZE_UL_SHIFT | 4 << SF_SIZE_T_SHIFT, SF_SIZE);
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putreg32(SF_DUMMY_DUMMY, SF_DUMMY);
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/* COMMAND */
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putreg8(SF_CMD_READ_JID, SF_T_FIFO);
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/* Start Transfer */
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putreg32(SF_CTL_ACT, SF_CTL);
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/* MID */
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wait_rxfifo_notempty();
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ret |= getreg8(SF_R_FIFO);
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/* MType */
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wait_rxfifo_notempty();
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ret <<= 8;
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ret |= getreg8(SF_R_FIFO);
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/* CapID */
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wait_rxfifo_notempty();
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ret <<= 8;
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ret |= getreg8(SF_R_FIFO);
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return ret;
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}
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/****************************************************************************
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* Name: spiflash_quad_enable_winbond
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****************************************************************************/
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static void spiflash_quad_enable_winbond(void)
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{
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/* SR Write Enable */
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if (spiflash_cmd_only(SF_CMD_WRITE_EN))
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{
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return;
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}
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/* Quad Enable */
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putreg32(SF_SIZE_NOREAD | 3 << SF_SIZE_T_SHIFT, SF_SIZE);
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putreg32(0, SF_DUMMY);
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putreg8(SF_CMD_WRITE_STATUS, SF_T_FIFO);
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putreg8(0, SF_T_FIFO); /* status1 */
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putreg8(SF_STATUS2_QE, SF_T_FIFO); /* status2 */
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/* Start Transfer */
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putreg32(SF_CTL_ACT, SF_CTL);
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wait_txfifo_empty();
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return;
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}
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/****************************************************************************
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* Name: spiflash_read_quad_enable_winbond
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****************************************************************************/
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static int spiflash_read_quad_enable_winbond(void)
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{
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/* COMMAND(1byte) + status(1byte) */
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putreg32(1 << SF_SIZE_UL_SHIFT | 2 << SF_SIZE_T_SHIFT, SF_SIZE);
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putreg32(SF_DUMMY_DUMMY, SF_DUMMY);
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/* COMMAND */
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putreg8(SF_CMD_READ_STATUS2, SF_T_FIFO);
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/* Start Transfer */
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putreg32(SF_CTL_ACT, SF_CTL);
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wait_rxfifo_notempty();
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return getreg8(SF_R_FIFO) & SF_STATUS2_QE;
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}
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/****************************************************************************
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* Name: spiflash_quad_enable_macronix
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****************************************************************************/
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static void spiflash_quad_enable_macronix(void)
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{
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/* SR Write Enable */
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if (spiflash_cmd_only(SF_CMD_WRITE_EN))
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{
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return;
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}
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/* Quad Enable */
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putreg32(SF_SIZE_NOREAD | 2 << SF_SIZE_T_SHIFT, SF_SIZE);
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putreg32(0, SF_DUMMY);
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putreg8(SF_CMD_WRITE_STATUS, SF_T_FIFO);
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putreg8(1 << 6, SF_T_FIFO); /* status1 */
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/* Start Transfer */
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putreg32(SF_CTL_ACT, SF_CTL);
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wait_txfifo_empty();
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return;
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}
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/****************************************************************************
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* Name: spiflash_read_quad_enable_macronix
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****************************************************************************/
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static int spiflash_read_quad_enable_macronix(void)
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{
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/* COMMAND(1byte) + status(1byte) */
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putreg32(1 << SF_SIZE_UL_SHIFT | 2 << SF_SIZE_T_SHIFT, SF_SIZE);
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putreg32(SF_DUMMY_DUMMY, SF_DUMMY);
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/* COMMAND */
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putreg8(SF_CMD_READ_STATUS1, SF_T_FIFO);
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/* Start Transfer */
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putreg32(SF_CTL_ACT, SF_CTL);
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wait_rxfifo_notempty();
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return getreg8(SF_R_FIFO) & (1 << 6);
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}
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/****************************************************************************
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* Name: spiflash_quad_enable
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****************************************************************************/
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static void spiflash_quad_enable(int jdid)
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{
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if ((jdid & SF_JID_MID_MASK) == SF_JID_MID_MACRONIX)
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{
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spiflash_quad_enable_macronix();
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}
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else
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{
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spiflash_quad_enable_winbond();
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}
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}
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/****************************************************************************
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* Name: spiflash_read_quad_enable
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****************************************************************************/
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static int spiflash_read_quad_enable(int jdid)
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{
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if ((jdid & SF_JID_MID_MASK) == SF_JID_MID_MACRONIX)
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{
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return spiflash_read_quad_enable_macronix();
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}
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return spiflash_read_quad_enable_winbond();
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}
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/****************************************************************************
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* Name: spiflash_write_busy
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****************************************************************************/
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static int spiflash_write_busy(void)
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{
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/* COMMAND(1byte) + status(1byte) */
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putreg32(1 << SF_SIZE_UL_SHIFT | 2 << SF_SIZE_T_SHIFT, SF_SIZE);
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putreg32(SF_DUMMY_DUMMY, SF_DUMMY);
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/* COMMAND */
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putreg8(SF_CMD_READ_STATUS1, SF_T_FIFO);
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/* Start Transfer */
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putreg32(SF_CTL_ACT, SF_CTL);
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wait_rxfifo_notempty();
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return getreg8(SF_R_FIFO) & SF_STATUS1_BUSY;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: lc823450_spiflash_earlyinit
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****************************************************************************/
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void lc823450_spiflash_earlyinit(void)
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{
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#ifdef CONFIG_LC823450_SPIFI_QUADIO
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int jdid;
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#endif
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/* S-Flash controller: Enable clock & unreset */
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modifyreg32(MCLKCNTBASIC, 0, MCLKCNTBASIC_SFIF_CLKEN);
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modifyreg32(MRSTCNTBASIC, 0, MRSTCNTBASIC_SFIF_RSTB);
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/* S-Flash cache: Enable clock & unreset */
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modifyreg32(MCLKCNTBASIC, 0, MCLKCNTBASIC_CACHE_CLKEN);
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modifyreg32(MRSTCNTBASIC, 0, MRSTCNTBASIC_CACHE_RSTB);
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/* Set S-Flash I/O voltage to 3.3v */
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putreg32(0x1, SFIFSEL);
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#ifdef CONFIG_LC823450_SPIFI_QUADIO
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jdid = spiflash_read_jdid();
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/* Check if QUAD mode supported */
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if (!spiflash_read_quad_enable(jdid))
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{
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spiflash_quad_enable(jdid);
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while (spiflash_write_busy())
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{
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up_udelay(10);
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}
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}
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/* bus accelerator enable : mode 3(use FAST_READ_QUAD_IO) */
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putreg32(SF_BUS_BUSEN | 3 << SF_BUS_BUSMODE_SHIFT | SF_BUS_LOOKAHEAD,
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SF_BUS);
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#else
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/* bus accelerator enable : mode 1(use FAST_READ) */
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putreg32(SF_BUS_BUSEN | 1 << SF_BUS_BUSMODE_SHIFT | SF_BUS_LOOKAHEAD,
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SF_BUS);
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#endif /* CONFIG_LC823450_SPIFI_QUADIO */
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/* S-Flash cache: Flash and Re-enable cache */
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modifyreg32(CACHE_CTL, CACHE_CTL_USE, 0);
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modifyreg32(CACHE_CTL, 0, CACHE_CTL_USE);
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}
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129
arch/arm/src/lc823450/lc823450_spifi2.h
Normal file
129
arch/arm/src/lc823450/lc823450_spifi2.h
Normal file
@ -0,0 +1,129 @@
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/****************************************************************************
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* arch/arm/src/lc823450/lc823450_spifi2.h
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*
|
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* Copyright 2014,2015,2016,2017,2018 Sony Video & Sound Products Inc.
|
||||
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
|
||||
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
|
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
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****************************************************************************/
|
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#ifndef __ARCH_ARM_SRC_LC823450_LC823450_SPIFI2_H
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#define __ARCH_ARM_SRC_LC823450_LC823450_SPIFI2_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define LC823450_SFLASH_REGBASE 0x40001000
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#define SF_SIZE (LC823450_SFLASH_REGBASE + 0x00)
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#define SF_SIZE_T_SHIFT 0
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#define SF_SIZE_UL_SHIFT 24
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#define SF_SIZE_NOREAD (1 << 28)
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#define SF_CTL (LC823450_SFLASH_REGBASE + 0x04)
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#define SF_CTL_ACT (1 << 0)
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#define SF_MODE (LC823450_SFLASH_REGBASE + 0x08)
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#define SF_MODE_MODE_SHIFT 0
|
||||
#define SF_DUMMY (LC823450_SFLASH_REGBASE + 0x0c)
|
||||
#define SF_DUMMY_DUMMY (1 << 0)
|
||||
#define SF_FIFO_CLR (LC823450_SFLASH_REGBASE + 0x10)
|
||||
#define SF_STATUS (LC823450_SFLASH_REGBASE + 0x14)
|
||||
#define SF_IRQEN (LC823450_SFLASH_REGBASE + 0x18)
|
||||
#define SF_FIFO_NUM (LC823450_SFLASH_REGBASE + 0x1c)
|
||||
#define SF_FIFO_NUM_T_SHIFT 0
|
||||
#define SF_FIFO_NUM_T_MASK (0xf << SF_FIFO_NUM_T_SHIFT)
|
||||
#define SF_FIFO_NUM_R_SHIFT 8
|
||||
#define SF_FIFO_NUM_R_MASK (0xf << SF_FIFO_NUM_R_SHIFT)
|
||||
#define SF_SRSTB (LC823450_SFLASH_REGBASE + 0x20)
|
||||
#define SF_PHASE_SET (LC823450_SFLASH_REGBASE + 0x24)
|
||||
#define SF_BUS (LC823450_SFLASH_REGBASE + 0x28)
|
||||
#define SF_BUS_BUSEN (1 << 0)
|
||||
#define SF_BUS_LOOKAHEAD (1 << 1)
|
||||
#define SF_BUS_ACT (1 << 24)
|
||||
#define SF_BUS_BUSMODE_SHIFT 8
|
||||
#define SF_TIMING (LC823450_SFLASH_REGBASE + 0x2c)
|
||||
#define SF_TIMING_CS_MASK (0x7 << 0)
|
||||
#define SF_TIMING_CS_SHIFT 0
|
||||
#define SF_T_FIFO (LC823450_SFLASH_REGBASE + 0x30)
|
||||
#define SF_R_FIFO (LC823450_SFLASH_REGBASE + 0x34)
|
||||
|
||||
#define SF_CMD_WRITE_STATUS 0x01
|
||||
#define SF_CMD_PAGE_PROG 0x02
|
||||
#define SF_CMD_READ_STATUS1 0x05
|
||||
#define SF_CMD_WRITE_EN 0x06
|
||||
#define SF_CMD_FAST_READ 0x0b
|
||||
#define SF_CMD_SEC_ERASE 0x20
|
||||
#define SF_CMD_WRITE_STATUS2 0x31
|
||||
#define SF_CMD_READ_STATUS2 0x35
|
||||
#define SF_CMD_SR_WRITE_EN 0x50
|
||||
#define SF_CMD_CHIP_ERASE 0x60
|
||||
#define SF_CMD_FAST_READ_QUAD 0x6b
|
||||
#define SF_CMD_READ_JID 0x9f
|
||||
|
||||
#define SF_STATUS1_BUSY (1 << 0)
|
||||
#define SF_STATUS2_QE (1 << 1)
|
||||
|
||||
#define SF_JID_MID_MASK 0xff0000
|
||||
#define SF_JID_MID_WINBOND 0xef0000
|
||||
#define SF_JID_MID_MACRONIX 0xc20000
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
void lc823450_spiflash_earlyinit(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
#undef EXTERN
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_LC823450_LC823450_SPIFI2_H */
|
||||
@ -1,7 +1,7 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/lc823450/lc823450_start.c
|
||||
*
|
||||
* Copyright 2014, 2015, 2016, 2017 Sony Video & Sound Products Inc.
|
||||
* Copyright 2014, 2015, 2016, 2017, 2018 Sony Video & Sound Products Inc.
|
||||
* Author: Masatoshi Tateishi <Masatoshi.Tateishi@jp.sony.com>
|
||||
* Author: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
|
||||
* Author: Yasuhiro Osaki <Yasuhiro.Osaki@jp.sony.com>
|
||||
@ -61,7 +61,7 @@
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#ifdef CONFIG_LC823450_SPIFI
|
||||
# include "lc823450_spifi.h"
|
||||
# include "lc823450_spifi2.h"
|
||||
#endif
|
||||
#include "lc823450_lowputc.h"
|
||||
#include "lc823450_clockconfig.h"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user