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i.MX6: Fix a bit setting in the timer configuration

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This commit is contained in:
Gregory Nutt 2016-05-17 07:21:18 -06:00
parent 80a9357b6f
commit 4c08492c0f
2 changed files with 6 additions and 3 deletions
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4
arch/arm/src/imx6/imx_timerisr.c
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@ -165,7 +165,7 @@ void up_timer_initialize(void)
/* Disable GPT by setting EN=0 in GPT_CR register */
cr = getreg32(IMX_GPT_CR);
cr = getreg32(IMX_GPT_CR);
cr &= ~GPT_CR_EN;
putreg32(cr, IMX_GPT_CR);
@ -221,7 +221,7 @@ void up_timer_initialize(void)
*/
cr &= ~GPT_CR_FFR;
putreg32(cr | GPT_CR_SWR, IMX_GPT_CR);
putreg32(cr, IMX_GPT_CR);
/* Set ENMOD=1 in GPT_CR register, to bring GPT counter to 0x00000000. If
* the ENMOD bit is 1, then the Main Counter and Prescaler Counter values

5
configs/sabre-6quad/README.txt
View File

@ -53,7 +53,10 @@ With this change, the NSH serial console works:
NuttShell (NSH)
nsh>
But there are still no timer interrupts.
But there are still no timer interrupts. LEDs do not appear to be working.
2016-05-17: Timer interrupts now work. This turned out to be just a minor
bit setting error in the timer configuration.
Platform Features
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