From 4c35bde3ba4bb771dfefd015a7660820d659f044 Mon Sep 17 00:00:00 2001 From: Lup Yuen Lee Date: Wed, 28 Aug 2024 09:30:23 +0800 Subject: [PATCH] risc-v/bl808: Configure MMU to cache User Text, Data and Heap This PR configures the BL808 MMU to cache the the User Text, Data and Heap. We enable the T-Head MMU Flags for Shareable, Bufferable and Cacheable, as explained in the previous PR: https://github.com/apache/nuttx/pull/13199 This PR fixes the Slow Memory Access for NuttX Apps on Ox64 BL808 SBC: https://github.com/apache/nuttx/issues/12696. With this fix, Ox64 NuttX CoreMark jumps from 19 to 1,104. (Close to Buildroot Linux CoreMark) Modified Files: `arch/risc-v/Kconfig`: Enabled `ARCH_MMU_EXT_THEAD` for BL808 SoC. --- arch/risc-v/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index ed89a17ad5..3b37e6a916 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -295,6 +295,7 @@ config ARCH_CHIP_BL808 select ARCH_HAVE_MULTICPU select ARCH_HAVE_MPU select ARCH_MMU_TYPE_SV39 + select ARCH_MMU_EXT_THEAD select ARCH_HAVE_ADDRENV select ARCH_NEED_ADDRENV_MAPPING select ARCH_HAVE_S_MODE