mmc renames

This commit is contained in:
Lok Tep 2016-09-30 16:00:28 +02:00
parent 1cbd7a0e59
commit 4cb1ba493b
2 changed files with 6 additions and 6 deletions

View File

@ -274,16 +274,16 @@
* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
*/
#define SDMMC1_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
#define STM32_SDMMC_INIT_CLKDIV (118 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define SDMMC1_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
# define STM32_SDMMC_MMCXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define SDMMC1_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
# define STM32_SDMMC_MMCXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
@ -291,9 +291,9 @@
*/
#ifdef CONFIG_SDIO_DMA
# define SDMMC1_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
# define STM32_SDMMC_SDXFR_CLKDIV (1 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#else
# define SDMMC1_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
# define STM32_SDMMC_SDXFR_CLKDIV (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
#endif
/************************************************************************************

View File

@ -312,7 +312,7 @@ CONFIG_STM32F7_OTGFS=y
# CONFIG_STM32F7_RNG is not set
# CONFIG_STM32F7_SAI1 is not set
# CONFIG_STM32F7_SAI2 is not set
##CONFIG_STM32F7_SDMMC1=y
CONFIG_STM32F7_SDMMC1=y
# CONFIG_STM32F7_SPDIFRX is not set
CONFIG_STM32F7_SPI1=y
# CONFIG_STM32F7_SPI2 is not set