arm64: ARMv8-r(Cortex-R82) support(add ARCH_SET_VMPIDR_EL2 option)
Summary VMPIDR_EL2 holds the value of the Virtualization Multiprocessor ID. From architecture manual of AArch64, the behave is: -reading register MPIDR_EL1 in EL2, it's return real MPIDR_EL1 -reading register MPIDR_EL1 in EL1, it's return VMPIDR_EL2 So since NuttX for SMP is running at EL1 to read MPIDR_EL1 for identify CPU id, it's need to set VMPIDR_EL2 to MPIDR_EL1 for every CPU at boot EL2 stage. For some platform, the bootloader or hypervisor will do that at the EL2 stage, but not all. Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
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@ -84,6 +84,21 @@ config ARCH_HAVE_EL3
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runing at EL3 is not necessary and system register for EL3
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is not accessible
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config ARCH_SET_VMPIDR_EL2
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bool "Set VMPIDR_EL2 at EL2 stage"
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help
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VMPIDR_EL2 holds the value of the Virtualization Multiprocessor ID.
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From architecture manual of AArch64, the behave is:
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-reading register MPIDR_EL1 in EL2, it's return real MPIDR_EL1
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-reading register MPIDR_EL1 in EL1, it's return VMPIDR_EL2
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So since NuttX for SMP is running at EL1 to read MPIDR_EL1 for
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identify CPU id, it's need to set VMPIDR_EL2 to MPIDR_EL1 for
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every CPU at boot EL2 stage.
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For some platform, the bootloader or hypervisor will do that at
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the EL2 stage, but not all.
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ARM FVP and VDK should set it since these platform will boot
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without BootLoader.
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config ARCH_EARLY_PRINT
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bool "arch early print support"
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default n
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@ -130,6 +130,11 @@ void arm64_boot_el2_init(void)
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zero_sysreg(cnthp_ctl_el2);
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#endif
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#ifdef CONFIG_ARCH_SET_VMPIDR_EL2
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reg = read_sysreg(mpidr_el1);
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write_sysreg(reg, vmpidr_el2);
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#endif
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/* Enable this if/when we use the hypervisor timer.
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* write_cnthp_cval_el2(~(uint64_t)0);
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*/
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@ -149,7 +149,6 @@ static void arm64_start_cpu(int cpu_num, char *stack, int stack_sz,
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{
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uint64_t cpu_mpid = cpu_num;
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#ifdef CONFIG_SCHED_INSTRUMENTATION
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/* Notify of the start event */
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