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SAM3/4: Rename CONFIG_GPIO*_IRQ to CONFIG_SAM34_GPIO*_IRQ

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This commit is contained in:
Gregory Nutt 2014-03-23 15:51:08 -06:00
parent c3380746b1
commit 4cc814220e
4 changed files with 43 additions and 41 deletions
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19
arch/arm/src/sam34/Kconfig
View File

@ -381,6 +381,7 @@ config SAM34_HSMCI
default n
depends on ARCH_CHIP_SAM3U || ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4S || ARCH_CHIP_SAM4E
select ARCH_HAVE_SDIO
select MMCSD
config SAM34_IISC
bool "Inter-IC Sound (I2S) Controller"
@ -841,41 +842,41 @@ endmenu # External Memory Configuration
menu "AT91SAM3/4 GPIO Interrupt Configuration"
config GPIO_IRQ
config SAM34_GPIO_IRQ
bool "GPIO pin interrupts"
---help---
Enable support for interrupting GPIO pins
if GPIO_IRQ
if SAM34_GPIO_IRQ
config GPIOA_IRQ
config SAM34_GPIOA_IRQ
bool "GPIOA interrupts"
default n
config GPIOB_IRQ
config SAM34_GPIOB_IRQ
bool "GPIOB interrupts"
default n
config GPIOC_IRQ
config SAM34_GPIOC_IRQ
bool "GPIOC interrupts"
default n
config GPIOD_IRQ
config SAM34_GPIOD_IRQ
bool "GPIOD interrupts"
default n
depends on ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A
config GPIOE_IRQ
config SAM34_GPIOE_IRQ
bool "GPIOE interrupts"
default n
depends on ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A
config GPIOF_IRQ
config SAM34_GPIOF_IRQ
bool "GPIOF interrupts"
default n
depends on ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A
endif # GPIO_IRQ
endif # SAM34_GPIO_IRQ
endmenu # AT91SAM3/4 GPIO Interrupt Configuration
if SAM34_SPI0 || SAM34_SPI1

15
arch/arm/src/sam34/sam_gpio.h
View File

@ -67,10 +67,11 @@
/* Configuration ********************************************************************/
#if defined(CONFIG_GPIOA_IRQ) || defined(CONFIG_GPIOB_IRQ) || defined(CONFIG_GPIOC_IRQ)
# define CONFIG_GPIO_IRQ 1
#if defined(CONFIG_SAM34_GPIOA_IRQ) || defined(CONFIG_SAM34_GPIOB_IRQ) || \
defined(CONFIG_SAM34_GPIOC_IRQ)
# define CONFIG_SAM34_GPIO_IRQ 1
#else
# undef CONFIG_GPIO_IRQ
# undef CONFIG_SAM34_GPIO_IRQ
#endif
#ifndef CONFIG_DEBUG
@ -112,7 +113,7 @@ extern "C"
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
void sam_gpioirqinitialize(void);
#else
# define sam_gpioirqinitialize()
@ -156,7 +157,7 @@ bool sam_gpioread(gpio_pinset_t pinset);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
void sam_gpioirq(gpio_pinset_t pinset);
#else
# define sam_gpioirq(pinset)
@ -170,7 +171,7 @@ void sam_gpioirq(gpio_pinset_t pinset);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
void sam_gpioirqenable(int irq);
#else
# define sam_gpioirqenable(irq)
@ -184,7 +185,7 @@ void sam_gpioirqenable(int irq);
*
************************************************************************************/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
void sam_gpioirqdisable(int irq);
#else
# define sam_gpioirqdisable(irq)

42
arch/arm/src/sam34/sam_gpioirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/sam34/sam_gpioirq.c
*
* Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -58,7 +58,7 @@
#include "chip/sam3u_pio.h"
#include "chip/sam_pmc.h"
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
/****************************************************************************
* Private Definitions
@ -115,7 +115,7 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
{
if (irq >= SAM_IRQ_NIRQS)
{
#ifdef CONFIG_GPIOA_IRQ
#ifdef CONFIG_SAM34_GPIOA_IRQ
if (irq <= SAM_IRQ_PA31)
{
*base = SAM_PIOA_BASE;
@ -123,7 +123,7 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
return OK;
}
#endif
#ifdef CONFIG_GPIOB_IRQ
#ifdef CONFIG_SAM34_GPIOB_IRQ
if (irq <= SAM_IRQ_PB31)
{
*base = SAM_PIOB_BASE;
@ -131,7 +131,7 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
return OK;
}
#endif
#ifdef CONFIG_GPIOC_IRQ
#ifdef CONFIG_SAM34_GPIOC_IRQ
if (irq <= SAM_IRQ_PC31)
{
*base = SAM_PIOC_BASE;
@ -139,7 +139,7 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
return OK;
}
#endif
#ifdef CONFIG_GPIOD_IRQ
#ifdef CONFIG_SAM34_GPIOD_IRQ
if (irq <= SAM_IRQ_PD31)
{
*base = SAM_PIOD_BASE;
@ -147,7 +147,7 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
return OK;
}
#endif
#ifdef CONFIG_GPIOE_IRQ
#ifdef CONFIG_SAM34_GPIOE_IRQ
if (irq <= SAM_IRQ_PE31)
{
*base = SAM_PIOE_BASE;
@ -155,7 +155,7 @@ static int sam_irqbase(int irq, uint32_t *base, int *pin)
return OK;
}
#endif
#ifdef CONFIG_GPIOF_IRQ
#ifdef CONFIG_SAM34_GPIOF_IRQ
if (irq <= SAM_IRQ_PF31)
{
*base = SAM_PIOF_BASE;
@ -199,42 +199,42 @@ static int sam_gpiointerrupt(uint32_t base, int irq0, void *context)
return OK;
}
#ifdef CONFIG_GPIOA_IRQ
#ifdef CONFIG_SAM34_GPIOA_IRQ
static int sam_gpioainterrupt(int irq, void *context)
{
return sam_gpiointerrupt(SAM_PIOA_BASE, SAM_IRQ_PA0, context);
}
#endif
#ifdef CONFIG_GPIOB_IRQ
#ifdef CONFIG_SAM34_GPIOB_IRQ
static int sam_gpiobinterrupt(int irq, void *context)
{
return sam_gpiointerrupt(SAM_PIOB_BASE, SAM_IRQ_PB0, context);
}
#endif
#ifdef CONFIG_GPIOC_IRQ
#ifdef CONFIG_SAM34_GPIOC_IRQ
static int sam_gpiocinterrupt(int irq, void *context)
{
return sam_gpiointerrupt(SAM_PIOC_BASE, SAM_IRQ_PC0, context);
}
#endif
#ifdef CONFIG_GPIOD_IRQ
#ifdef CONFIG_SAM34_GPIOD_IRQ
static int sam_gpiodinterrupt(int irq, void *context)
{
return sam_gpiointerrupt(SAM_PIOD_BASE, SAM_IRQ_PD0, context);
}
#endif
#ifdef CONFIG_GPIOE_IRQ
#ifdef CONFIG_SAM34_GPIOE_IRQ
static int sam_gpioeinterrupt(int irq, void *context)
{
return sam_gpiointerrupt(SAM_PIOE_BASE, SAM_IRQ_PE0, context);
}
#endif
#ifdef CONFIG_GPIOF_IRQ
#ifdef CONFIG_SAM34_GPIOF_IRQ
static int sam_gpiofinterrupt(int irq, void *context)
{
return sam_gpiointerrupt(SAM_PIOF_BASE, SAM_IRQ_PF0, context);
@ -258,7 +258,7 @@ void sam_gpioirqinitialize(void)
{
/* Configure GPIOA interrupts */
#ifdef CONFIG_GPIOA_IRQ
#ifdef CONFIG_SAM34_GPIOA_IRQ
/* Enable GPIOA clocking */
sam_pioa_enableclk();
@ -276,7 +276,7 @@ void sam_gpioirqinitialize(void)
/* Configure GPIOB interrupts */
#ifdef CONFIG_GPIOB_IRQ
#ifdef CONFIG_SAM34_GPIOB_IRQ
/* Enable GPIOB clocking */
sam_piob_enableclk();
@ -294,7 +294,7 @@ void sam_gpioirqinitialize(void)
/* Configure GPIOC interrupts */
#ifdef CONFIG_GPIOC_IRQ
#ifdef CONFIG_SAM34_GPIOC_IRQ
/* Enable GPIOC clocking */
sam_pioc_enableclk();
@ -312,7 +312,7 @@ void sam_gpioirqinitialize(void)
/* Configure GPIOD interrupts */
#ifdef CONFIG_GPIOD_IRQ
#ifdef CONFIG_SAM34_GPIOD_IRQ
/* Enable GPIOD clocking */
sam_piod_enableclk();
@ -330,7 +330,7 @@ void sam_gpioirqinitialize(void)
/* Configure GPIOE interrupts */
#ifdef CONFIG_GPIOE_IRQ
#ifdef CONFIG_SAM34_GPIOE_IRQ
/* Enable GPIOE clocking */
sam_pioe_enableclk();
@ -348,7 +348,7 @@ void sam_gpioirqinitialize(void)
/* Configure GPIOF interrupts */
#ifdef CONFIG_GPIOF_IRQ
#ifdef CONFIG_SAM34_GPIOF_IRQ
/* Enable GPIOF clocking */
sam_piof_enableclk();
@ -459,4 +459,4 @@ void sam_gpioirqdisable(int irq)
}
}
#endif /* CONFIG_GPIO_IRQ */
#endif /* CONFIG_SAM34_GPIO_IRQ */

8
arch/arm/src/sam34/sam_irq.c
View File

@ -52,7 +52,7 @@
#include "os_internal.h"
#include "up_internal.h"
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
# include "sam_gpio.h"
#endif
@ -438,7 +438,7 @@ void up_irqinitialize(void)
* GPIO pins.
*/
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
sam_gpioirqinitialize();
#endif
@ -481,7 +481,7 @@ void up_disable_irq(int irq)
putreg32(regval, regaddr);
}
}
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
else
{
/* Maybe it is a (derived) GPIO IRQ */
@ -525,7 +525,7 @@ void up_enable_irq(int irq)
putreg32(regval, regaddr);
}
}
#ifdef CONFIG_GPIO_IRQ
#ifdef CONFIG_SAM34_GPIO_IRQ
else
{
/* Maybe it is a (derived) GPIO IRQ */