arch: imx6: Fix style warnings in imx_memorymap.h
This commit is contained in:
Masayuki Ishikawa
Alan Carvalho de Assis
parent
e26daf9357
commit
4ce99f324e
@ -47,9 +47,19 @@
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#include <nuttx/config.h>
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#include <arch/imx6/chip.h>
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/* i.MX6 Virtual (mapped) Memory Map
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*
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* board_memorymap.h contains special mappings that are needed when a ROM
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* memory map is used. It is included in this odd location because it depends
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* on some the virtual address definitions provided above.
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*/
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#include <arch/board/board_memorymap.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Decimal configuration values may exceed 2Gb and, hence, overflow to negative
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* values unless we force them to unsigned long:
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*/
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@ -57,7 +67,7 @@
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#define __CONCAT(a,b) a ## b
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#define MKULONG(a) __CONCAT(a,ul)
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/* Overview *****************************************************************
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/* Overview *************************************************************************
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*
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* i.MX6 Physical (unmapped) Memory Map
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* - i.MX6 System 1MB PSECTIONS
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@ -94,9 +104,10 @@
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* Page table start addresses
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* Base address of the interrupt vector table
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*
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****************************************************************************/
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************************************************************************************/
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/* i.MX6 Physical (unmapped) Memory Map *********************************************/
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/* i.MX6 Physical (unmapped) Memory Map *************************************/
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/* i.MX6 System PSECTIONS */
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#define IMX_ROMCP_PSECTION 0x00000000 /* 00000000-00017fff 96 KB Boot ROM (ROMCP) */
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@ -146,6 +157,7 @@
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#define IMX_GPU2D_OFFSET 0x00034000 /* 00034000-00037fff 16 KB GPU 2D (GC320) */
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#define IMX_DTCP_OFFSET 0x00038000 /* 00038000-0003bfff 16 KB DTCP */
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/* 0003c000-000fffff 784 KB Reserved */
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/* i.MX6 OCRAM PSECTION Offsets */
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#define IMX_OCRAM_OFFSET 0x00000000 /* 00000000-0003ffff 0.25 MB OCRAM 256 KB */
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@ -170,7 +182,8 @@
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/* i.MX6 AIPS-1 PSECTION Offsets */
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/* 00000000 00003fff Reserved for SDMA internal registers 16 KB */
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/* 00000000 00003fff Reserved for SDMA internal registers 16 KB */
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#define IMX_SPDIF_OFFSET 0x00004000 /* 00004000 00007fff SPDIF 16 KB */
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#define IMX_ECSPI1_OFFSET 0x00008000 /* 00008000 0000bfff eCSPI1 16 KB */
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#define IMX_ECSPI2_OFFSET 0x0000c000 /* 0000c000 0000ffff eCSPI2 16KB */
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@ -195,7 +208,9 @@
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#define IMX_CAN1_OFFSET 0x00090000 /* 00090000 00093fff CAN1 16 KB */
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#define IMX_CAN2_OFFSET 0x00094000 /* 00094000 00097fff CAN2 16 KB */
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#define IMX_GPT_OFFSET 0x00098000 /* 00098000 0009bfff GPT 16 KB */
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#define IMX_GPIO_OFFSET(n) (0x0009c000 + ((n) << 14)) /* n=0..6 */
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#define IMX_GPIO1_OFFSET 0x0009c000 /* 0009c000 0009ffff GPIO1 16 KB */
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#define IMX_GPIO2_OFFSET 0x000a0000 /* 000a0000 000a3fff GPIO2 16 KB */
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#define IMX_GPIO3_OFFSET 0x000a4000 /* 000a4000 000a7fff GPIO3 16 KB */
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@ -228,6 +243,7 @@
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/* 000f4000 000f7fff Reserved 16 KB */
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/* 000f8000 000fbfff Reserved 16 KB */
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/* 000fc000 000fffff AIPS-1 Reserved 16 KB */
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/* i.MX6 AIPS-2 PSECTION Offsets */
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#define IMX_CAAM_OFFSET 0x00100000 /* 00100000 0210ffff CAAM 64 KB */
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@ -304,6 +320,7 @@
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#define IMX_OPENVG_OFFSET 0x00204000 /* 00204000-02207fff 16 KB OpenVG (GC355) */
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#define IMX_MIPIHSI_OFFSET 0x00208000 /* 00208000-0220bfff 16 KB MIPIHSI */
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/* 0020c000-000fffff 2 MB Reserved */
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/* i.MX6 DMA Physical Base Addresses */
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#define IMX_CAAMRAM_PBASE (IMX_DMA_PSECTION+IMX_CAAMRAM_OFFSET)
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@ -478,9 +495,10 @@
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/* 0220c000-023fffff 2 MB Reserved */
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#define IMX_IPU1_SECSIZE (4*1024*1024) /* 02600000-029fffff 4 MB IPU-1 */
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#define IMX_IPU2_SECSIZE (4*1024*1024) /* 02a00000-02dfffff 4 MB IPU-2 */
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#define IMX_EIM_SECSIZE MKULONG(CONFIG_IMX_EIM_SIZE) /* 08000000-0fffffff 128 MB EIM - (NOR/SRAM) */
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#define IMX_MMDCDDR_SECSIZE MKULONG(CONFIG_IMX_DDR_SIZE) /* 10000000-ffffffff 3840 MB MMDC-DDR Controller */
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/* 10000000-7fffffff 1792 MB */
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/* 10000000-7fffffff 1792 MB */
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/* Convert size in bytes to number of sections (in Mb). */
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@ -536,15 +554,6 @@
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#define IMX_EIM_MMUFLAGS MMU_ROMFLAGS /* REVISIT */
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#define IMX_MMDCDDR_MMUFLAGS MMU_MEMFLAGS
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/* i.MX6 Virtual (mapped) Memory Map
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*
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* board_memorymap.h contains special mappings that are needed when a ROM
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* memory map is used. It is included in this odd location because it depends
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* on some the virtual address definitions provided above.
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*/
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#include <arch/board/board_memorymap.h>
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/* i.MX6 Virtual (mapped) Memory Map. These are the mappings that will
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* be created if the page table lies in RAM. If the platform has another,
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* read-only, pre-initialized page table (perhaps in ROM), then the board.h
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@ -799,43 +808,44 @@
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# error "Only one of PGTABLE_BASE_PADDR or PGTABLE_BASE_VADDR is defined"
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# endif
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/* A sanity check, if the configuration says that the page table is read-only
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* and pre-initialized (maybe ROM), then it should have also defined both of
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* the page table base addresses.
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*/
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/* A sanity check, if the configuration says that the page table is read-only
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* and pre-initialized (maybe ROM), then it should have also defined both of
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* the page table base addresses.
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*/
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# ifdef CONFIG_ARCH_ROMPGTABLE
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# error "CONFIG_ARCH_ROMPGTABLE defined; PGTABLE_BASE_P/VADDR not defined"
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# endif
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/* We must declare the page table at the bottom or at the top of OCRAM. */
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/* Yes.. do the vectors lie in low memory? */
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/* We must declare the page table at the bottom or at the top of OCRAM.
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* Yes.. do the vectors lie in low memory?
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*/
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# ifdef CONFIG_ARCH_LOWVECTORS
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/* In this case, page table must lie at the top 16Kb of OCRAM. */
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/* In this case, page table must lie at the top 16Kb of OCRAM. */
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# define PGTABLE_BASE_PADDR (IMX_OCRAM_PBASE + IMX_OCRAM_SIZE - PGTABLE_SIZE)
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# define PGTABLE_BASE_VADDR (IMX_OCRAM_VBASE + IMX_OCRAM_SIZE - PGTABLE_SIZE)
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# define PGTABLE_IN_HIGHSRAM 1
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/* We will force the IDLE stack to precede the page table */
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/* We will force the IDLE stack to precede the page table */
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# define IDLE_STACK_PBASE (PGTABLE_BASE_PADDR - CONFIG_IDLETHREAD_STACKSIZE)
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# define IDLE_STACK_VBASE (PGTABLE_BASE_VADDR - CONFIG_IDLETHREAD_STACKSIZE)
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# else /* CONFIG_ARCH_LOWVECTORS */
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/* Otherwise, the vectors lie at another location (perhaps in NOR FLASH,
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* perhaps elsewhere in OCRAM). The page table will then be positioned
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* at the first 16Kb of SRAM.
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*/
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/* Otherwise, the vectors lie at another location (perhaps in NOR FLASH,
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* perhaps elsewhere in OCRAM). The page table will then be positioned
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* at the first 16Kb of SRAM.
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*/
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# define PGTABLE_BASE_PADDR IMX_OCRAM_PBASE
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# define PGTABLE_BASE_VADDR IMX_OCRAM_VBASE
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# define PGTABLE_IN_LOWSRAM 1
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/* We will force the IDLE stack to follow the page table */
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/* We will force the IDLE stack to follow the page table */
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# define IDLE_STACK_PBASE (PGTABLE_BASE_PADDR + PGTABLE_SIZE)
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# define IDLE_STACK_VBASE (PGTABLE_BASE_VADDR + PGTABLE_SIZE)
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@ -867,21 +877,21 @@
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#else /* !PGTABLE_BASE_PADDR || !PGTABLE_BASE_VADDR */
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/* Sanity check.. if one is defined, both should be defined */
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/* Sanity check.. if one is defined, both should be defined */
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# if !defined(PGTABLE_BASE_PADDR) || !defined(PGTABLE_BASE_VADDR)
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# error "One of PGTABLE_BASE_PADDR or PGTABLE_BASE_VADDR is undefined"
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# endif
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/* The page table then lies at the beginning of the OSSRAM and
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* the IDLE stack follows immediately.
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*/
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/* The page table then lies at the beginning of the OSSRAM and
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* the IDLE stack follows immediately.
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*/
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# define PGTABLE_BASE_PADDR IMX_OCRAM_PBASE
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# define PGTABLE_BASE_VADDR IMX_OCRAM_VBASE
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# define PGTABLE_IN_LOWSRAM 1
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/* We will force the IDLE stack to follow the page table */
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/* We will force the IDLE stack to follow the page table */
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# define IDLE_STACK_PBASE (PGTABLE_BASE_PADDR + PGTABLE_SIZE)
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# define IDLE_STACK_VBASE (PGTABLE_BASE_VADDR + PGTABLE_SIZE)
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@ -1031,16 +1041,4 @@
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_IMX6_HARDWARE_IMX_MEMORYMAP_H */
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