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xtensa_user_handler.S: In syscall handler store context before

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continuing the rest of the syscall handling.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
Abdelatif Guettouche 2022-03-12 23:10:22 +01:00 committed by Xiang Xiao
parent 5305f76b1d
commit 4d1bb20f8c
1 changed files with 7 additions and 14 deletions
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21
arch/xtensa/src/common/xtensa_user_handler.S
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@ -338,16 +338,16 @@ _xtensa_syscall_handler:
rsr a0, EXCSAVE_1 /* Save interruptee's a0 */
s32i a0, sp, (4 * REG_A0)
/* Save EPC */
#if XCHAL_HAVE_LOOPS != 0
/* Save A2 and A3 now to give us some registers to work with. A0, A2
* and A3 are now available.
*/
s32i a2, sp, (4 * REG_A2) /* Save interruptee's A2 */
s32i a3, sp, (4 * REG_A3) /* Save interruptee's A3 */
/* Save rest of interrupt context. */
call0 _xtensa_context_save
/* Save EPC */
#if XCHAL_HAVE_LOOPS != 0
/* Get the interruptee's PC and skip over the 'syscall' instruction.
* If it's at the end of a zero-overhead loop and it's not on the last
* iteration, decrement loop counter and skip to beginning of loop.
@ -378,15 +378,8 @@ _xtensa_syscall_handler:
wsr a0, EPC_1 /* Update PC */
s32i a0, sp, (4 * REG_PC)
s32i a2, sp, (4 * REG_A2) /* Save interruptee's A2 */
s32i a3, sp, (4 * REG_A3) /* Save interruptee's A3 */
#endif
/* Save rest of interrupt context. */
call0 _xtensa_context_save /* Save full register state */
/* Dispatch the sycall as with other interrupts. */
mov a12, sp /* a12 = address of register save area */