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Add LM3S SSI driver

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1818 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-05-23 14:26:22 +00:00
parent 52c8c15231
commit 4d1fd0a378
14 changed files with 1385 additions and 77 deletions
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3
ChangeLog
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@ -724,8 +724,9 @@
0.4.7 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr> 0.4.7 2009-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
* arch/arm/src/lm2s: Added an Ethernet driver for the LM3S6918 * arch/arm/src/lm3s: Added an Ethernet driver for the LM3S6918
* configs/eagle100/nettest: Added an examples/nettest configuration for the * configs/eagle100/nettest: Added an examples/nettest configuration for the
Micromint Eagle100 board. Micromint Eagle100 board.
* Documentation/NuttxPortingGuide.html: Added a section on NuttX device drivers. * Documentation/NuttxPortingGuide.html: Added a section on NuttX device drivers.
* arch/arm/src/lm3s: Added an SSI driver for the LM3S6918

5
Documentation/NuttX.html
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@ -8,7 +8,7 @@
<tr align="center" bgcolor="#e4e4e4"> <tr align="center" bgcolor="#e4e4e4">
<td> <td>
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1> <h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
<p>Last Updated: May 21, 2009</p> <p>Last Updated: May 23, 2009</p>
</td> </td>
</tr> </tr>
</table> </table>
@ -1414,10 +1414,11 @@ buildroot-0.1.5 2009-04-25 &lt;spudmonkey@racsa.co.cr&gt;
<pre><ul> <pre><ul>
nuttx-0.4.7 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt; nuttx-0.4.7 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
* arch/arm/src/lm2s: Added an Ethernet driver for the LM3S6918 * arch/arm/src/lm3s: Added an Ethernet driver for the LM3S6918
* configs/eagle100/nettest: Added an examples/nettest configuration for the * configs/eagle100/nettest: Added an examples/nettest configuration for the
Micromint Eagle100 board. Micromint Eagle100 board.
* Documentation/NuttxPortingGuide.html: Added a section on NuttX device drivers. * Documentation/NuttxPortingGuide.html: Added a section on NuttX device drivers.
* arch/arm/src/lm3s: Added an SSI driver for the LM3S6918
pascal-0.1.3 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt; pascal-0.1.3 2009-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;

8
arch/arm/src/imx/imx_spi.c
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@ -59,7 +59,7 @@
* Definitions * Definitions
****************************************************************************/ ****************************************************************************/
/* The i.MX1/L supports 2 SPI interfaces. Which have been endabled? */ /* The i.MX1/L supports 2 SPI interfaces. Which have been enabled? */
#ifndef CONFIG_SPI1_DISABLE #ifndef CONFIG_SPI1_DISABLE
# define SPI1_NDX 0 /* Index to SPI1 in g_spidev[] */ # define SPI1_NDX 0 /* Index to SPI1 in g_spidev[] */
@ -809,7 +809,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
* Name: spi_setbits * Name: spi_setbits
* *
* Description: * Description:
* Set the number if bits per word. * Set the number of bits per word.
* *
* Input Parameters: * Input Parameters:
* dev - Device-specific state data * dev - Device-specific state data
@ -995,11 +995,11 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
#ifndef CONFIG_SPI2_DISABLE #ifndef CONFIG_SPI2_DISABLE
case 2: case 2:
/* Select SPI1 */ /* Select SPI2 */
priv = &g_spidev[SPI2_NDX]; priv = &g_spidev[SPI2_NDX];
/* Configure SPI1 GPIOs */ /* Configure SPI2 GPIOs */
/* SCLK: AIN of Port A, pin 0 -OR- AIN of Port D, pin 7 */ /* SCLK: AIN of Port A, pin 0 -OR- AIN of Port D, pin 7 */
#if 1 #if 1

2
arch/arm/src/lm3s/Make.defs
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@ -47,7 +47,7 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
CHIP_ASRCS = CHIP_ASRCS =
CHIP_CSRCS = lm3s_start.c lm3s_syscontrol.c lm3s_irq.c \ CHIP_CSRCS = lm3s_start.c lm3s_syscontrol.c lm3s_irq.c \
lm3s_gpio.c lm3s_gpioirq.c lm3s_timerisr.c lm3s_lowputc.c \ lm3s_gpio.c lm3s_gpioirq.c lm3s_timerisr.c lm3s_lowputc.c \
lm3s_serial.c lm3s_serial.c lm3s_ssi.c
ifdef CONFIG_NET ifdef CONFIG_NET
CHIP_CSRCS += lm3s_ethernet.c CHIP_CSRCS += lm3s_ethernet.c

8
arch/arm/src/lm3s/chip.h
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@ -50,9 +50,9 @@
/* Get customizations for each supported chip (only the LM3S6918 right now) */ /* Get customizations for each supported chip (only the LM3S6918 right now) */
#ifdef CONFIG_ARCH_CHIP_LM3S6918 #ifdef CONFIG_ARCH_CHIP_LM3S6918
# define LMS_NUARTS 2 /* Two UART modules */ # define LM3S_NUARTS 2 /* Two UART modules */
# define LMS_NSSI 2 /* Two SSI modules */ # define LM3S_NSSI 2 /* Two SSI modules */
# define LMS_NETHCONTROLLERS 1 /* One ethenet controller */ # define LM3S_NETHCONTROLLERS 1 /* One ethenet controller */
#else #else
# error "No Ethernet support for this LM3S chip" # error "No Ethernet support for this LM3S chip"
#endif #endif
@ -63,7 +63,7 @@
#include "lm3s_syscontrol.h" /* System control module */ #include "lm3s_syscontrol.h" /* System control module */
#include "lm3s_gpio.h" /* GPIO modules */ #include "lm3s_gpio.h" /* GPIO modules */
#include "lm3s_uart.h" /* UART modules */ #include "lm3s_uart.h" /* UART modules */
#include "lm2s_ssi.h" /* SSI modules */ #include "lm3s_ssi.h" /* SSI modules */
#include "lm3s_ethernet.h" /* Ethernet MAC and PHY */ #include "lm3s_ethernet.h" /* Ethernet MAC and PHY */
#include "lm3s_flash.h" /* FLASH */ #include "lm3s_flash.h" /* FLASH */

30
arch/arm/src/lm3s/lm3s_ethernet.c
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@ -179,7 +179,7 @@ struct lm3s_driver_s
* multiple Ethernet controllers. * multiple Ethernet controllers.
*/ */
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
uint32 ld_base; /* Ethernet controller base address */ uint32 ld_base; /* Ethernet controller base address */
int ld-irq; /* Ethernet controller IRQ */ int ld-irq; /* Ethernet controller IRQ */
#endif #endif
@ -201,7 +201,7 @@ struct lm3s_driver_s
* Private Data * Private Data
****************************************************************************/ ****************************************************************************/
static struct lm3s_driver_s g_lm3sdev[LMS_NETHCONTROLLERS]; static struct lm3s_driver_s g_lm3sdev[LM3S_NETHCONTROLLERS];
/**************************************************************************** /****************************************************************************
* Private Function Prototypes * Private Function Prototypes
@ -209,7 +209,7 @@ static struct lm3s_driver_s g_lm3sdev[LMS_NETHCONTROLLERS];
/* Miscellaneous low level helpers */ /* Miscellaneous low level helpers */
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset); static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset);
static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value); static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value);
#else #else
@ -263,7 +263,7 @@ static int lm3s_txavail(struct uip_driver_s *dev);
* *
****************************************************************************/ ****************************************************************************/
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset) static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset)
{ {
return getreg32(priv->ld_base + offset); return getreg32(priv->ld_base + offset);
@ -291,7 +291,7 @@ static inline uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset)
* *
****************************************************************************/ ****************************************************************************/
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value) static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value)
{ {
putreg32(value, priv->ld_base + offset); putreg32(value, priv->ld_base + offset);
@ -325,7 +325,7 @@ static void lm3s_ethreset(struct lm3s_driver_s *priv)
uint32 regval; uint32 regval;
volatile uint32 delay; volatile uint32 delay;
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
# error "If multiple interfaces are supported, this function would have to be redesigned" # error "If multiple interfaces are supported, this function would have to be redesigned"
#endif #endif
@ -830,7 +830,7 @@ static int lm3s_interrupt(int irq, FAR void *context)
register struct lm3s_driver_s *priv; register struct lm3s_driver_s *priv;
uint32 ris; uint32 ris;
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
# error "A mechanism to associate and interface with an IRQ is needed" # error "A mechanism to associate and interface with an IRQ is needed"
#else #else
priv = &g_lm3sdev[0]; priv = &g_lm3sdev[0];
@ -1096,7 +1096,7 @@ static int lm3s_ifup(struct uip_driver_s *dev)
/* Enable the Ethernet interrupt */ /* Enable the Ethernet interrupt */
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
up_enable_irq(priv->irq); up_enable_irq(priv->irq);
#else #else
up_enable_irq(LM3S_IRQ_ETHCON); up_enable_irq(LM3S_IRQ_ETHCON);
@ -1164,7 +1164,7 @@ static int lm3s_ifdown(struct uip_driver_s *dev)
/* Disable the Ethernet interrupt */ /* Disable the Ethernet interrupt */
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
up_disable_irq(priv->irq); up_disable_irq(priv->irq);
#else #else
up_disable_irq(LM3S_IRQ_ETHCON); up_disable_irq(LM3S_IRQ_ETHCON);
@ -1278,7 +1278,7 @@ static int lm3s_txavail(struct uip_driver_s *dev)
* *
****************************************************************************/ ****************************************************************************/
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
int lm3s_initialize(int intf) int lm3s_initialize(int intf)
#else #else
static inline int lm3s_initialize(int intf) static inline int lm3s_initialize(int intf)
@ -1291,12 +1291,12 @@ static inline int lm3s_initialize(int intf)
ndbg("Setting up eth%d\n", intf); ndbg("Setting up eth%d\n", intf);
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
# error "This debug check only works with one interface" # error "This debug check only works with one interface"
#else #else
DEBUGASSERT((getreg32(LM3S_SYSCON_DC4) & (SYSCON_DC4_EMAC0|SYSCON_DC4_EPHY0)) == (SYSCON_DC4_EMAC0|SYSCON_DC4_EPHY0)); DEBUGASSERT((getreg32(LM3S_SYSCON_DC4) & (SYSCON_DC4_EMAC0|SYSCON_DC4_EPHY0)) == (SYSCON_DC4_EMAC0|SYSCON_DC4_EPHY0));
#endif #endif
DEBUGASSERT((unsigned)intf < LMS_NETHCONTROLLERS); DEBUGASSERT((unsigned)intf < LM3S_NETHCONTROLLERS);
/* Initialize the driver structure */ /* Initialize the driver structure */
@ -1308,7 +1308,7 @@ static inline int lm3s_initialize(int intf)
/* Create a watchdog for timing polling for and timing of transmisstions */ /* Create a watchdog for timing polling for and timing of transmisstions */
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
# error "A mechanism to associate base address an IRQ with an interface is needed" # error "A mechanism to associate base address an IRQ with an interface is needed"
priv->ld_base = ??; /* Ethernet controller base address */ priv->ld_base = ??; /* Ethernet controller base address */
priv->ld_irq = ??; /* Ethernet controller IRQ number */ priv->ld_irq = ??; /* Ethernet controller IRQ number */
@ -1335,7 +1335,7 @@ static inline int lm3s_initialize(int intf)
/* Attach the IRQ to the driver */ /* Attach the IRQ to the driver */
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
ret = irq_attach(priv->irq, lm3s_interrupt); ret = irq_attach(priv->irq, lm3s_interrupt);
#else #else
ret = irq_attach(LM3S_IRQ_ETHCON, lm3s_interrupt); ret = irq_attach(LM3S_IRQ_ETHCON, lm3s_interrupt);
@ -1364,7 +1364,7 @@ static inline int lm3s_initialize(int intf)
* *
************************************************************************************/ ************************************************************************************/
#if LMS_NETHCONTROLLERS == 1 #if LM3S_NETHCONTROLLERS == 1
void up_netinitialize(void) void up_netinitialize(void)
{ {
(void)lm3s_initialize(0); (void)lm3s_initialize(0);

26
arch/arm/src/lm3s/lm3s_internal.h
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@ -308,10 +308,34 @@ EXTERN int weak_function gpio_irqinitialize(void);
* *
****************************************************************************/ ****************************************************************************/
#if LMS_NETHCONTROLLERS > 1 #if LM3S_NETHCONTROLLERS > 1
EXTERN int lm3s_initialize(int intf); EXTERN int lm3s_initialize(int intf);
#endif #endif
/****************************************************************************
* The external functions, lm3s_spiselect and lm3s_spistatus must be provided
* by board-specific logic. The are implementations of the select and status
* methods SPI interface defined by struct spi_ops_s (see include/nuttx/spi.h).
* All othermethods (including up_spiinitialize()) are provided by common
* logic. To use this common SPI logic on your board:
*
* 1. Provide lm3s_spiselect() and lm3s_spistatus() functions in your
* board-specific logic. This function will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 2. Add a call to up_spiinitialize() in your low level initialization
* logic
* 3. The handle returned by up_spiinitialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
struct spi_dev_s;
enum spi_dev_e;
EXTERN void lm3s_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected);
EXTERN ubyte lm3s_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
#undef EXTERN #undef EXTERN
#if defined(__cplusplus) #if defined(__cplusplus)
} }

1266
arch/arm/src/lm3s/lm3s_ssi.c Executable file
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File diff suppressed because it is too large Load Diff

12
arch/arm/src/lm3s/lm3s_ssi.h
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@ -43,7 +43,7 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <sys/types.h> #include <sys/types.h>
#if LMS_NSSI > 0 #if LM3S_NSSI > 0
/************************************************************************************ /************************************************************************************
* Definitions * Definitions
@ -97,7 +97,7 @@
#define LM3S_SSI0_PCELLID2 (LM3S_SSI0_BASE + LM3S_SSI_PCELLID2_OFFSET) #define LM3S_SSI0_PCELLID2 (LM3S_SSI0_BASE + LM3S_SSI_PCELLID2_OFFSET)
#define LM3S_SSI0_PCELLID3 (LM3S_SSI0_BASE + LM3S_SSI_PCELLID3_OFFSET) #define LM3S_SSI0_PCELLID3 (LM3S_SSI0_BASE + LM3S_SSI_PCELLID3_OFFSET)
#if LMS_NSSI > 1 #if LM3S_NSSI > 1
#define LM3S_SSI1_CR0 (LM3S_SSI1_BASE + LM3S_SSI_CR0_OFFSET) #define LM3S_SSI1_CR0 (LM3S_SSI1_BASE + LM3S_SSI_CR0_OFFSET)
#define LM3S_SSI1_CR1 (LM3S_SSI1_BASE + LM3S_SSI_CR1_OFFSET) #define LM3S_SSI1_CR1 (LM3S_SSI1_BASE + LM3S_SSI_CR1_OFFSET)
#define LM3S_SSI1_DR (LM3S_SSI1_BASE + LM3S_SSI_DR_OFFSET) #define LM3S_SSI1_DR (LM3S_SSI1_BASE + LM3S_SSI_DR_OFFSET)
@ -143,18 +143,18 @@
#define LM3S_SSI_PCELLID1(n) (LM3S_SSI_BASE(n) + LM3S_SSI_PCELLID1_OFFSET) #define LM3S_SSI_PCELLID1(n) (LM3S_SSI_BASE(n) + LM3S_SSI_PCELLID1_OFFSET)
#define LM3S_SSI_PCELLID2(n) (LM3S_SSI_BASE(n) + LM3S_SSI_PCELLID2_OFFSET) #define LM3S_SSI_PCELLID2(n) (LM3S_SSI_BASE(n) + LM3S_SSI_PCELLID2_OFFSET)
#define LM3S_SSI_PCELLID3(n) (LM3S_SSI_BASE(n) + LM3S_SSI_PCELLID3_OFFSET) #define LM3S_SSI_PCELLID3(n) (LM3S_SSI_BASE(n) + LM3S_SSI_PCELLID3_OFFSET)
#endif /* LMS_NSSI > 1 */ #endif /* LM3S_NSSI > 1 */
/* SSI register bit defitiions ******************************************************/ /* SSI register bit defitiions ******************************************************/
/* SSI Control 0 (SSICR0), offset 0x000 */ /* SSI Control 0 (SSICR0), offset 0x000 */
#define SSI_CR0_DSS_SHIFT 0 /* Bits 3-0: SSI Data Size Select #define SSI_CR0_DSS_SHIFT 0 /* Bits 3-0: SSI Data Size Select */
#define SSI_CR0_DSS_MASK (0x0f << SSI_CR0_DSS_SHIFT) #define SSI_CR0_DSS_MASK (0x0f << SSI_CR0_DSS_SHIFT)
#define SSI_CR0_DSS(n) ((n-1) << SSI_CR0_DSS_SHIFT) /* n={4,5,..16} */ #define SSI_CR0_DSS(n) ((n-1) << SSI_CR0_DSS_SHIFT) /* n={4,5,..16} */
#define SSI_CR0_FRF_SHIFT 4 /* Bits 5-4: SSI Frame Format Select */ #define SSI_CR0_FRF_SHIFT 4 /* Bits 5-4: SSI Frame Format Select */
#define SSI_CR0_FRF_MASK (3 << SSI_CR0_FRF_SHIFT) #define SSI_CR0_FRF_MASK (3 << SSI_CR0_FRF_SHIFT)
#define SSI_CR0_FRF_SPI (0 << SSI_CR0_FRF_SHIFT) /* Freescale SPI format */e #define SSI_CR0_FRF_SPI (0 << SSI_CR0_FRF_SHIFT) /* Freescale SPI format */
#define SSI_CR0_FRF_SSFF (1 << SSI_CR0_FRF_SHIFT) /* TI synchronous serial fram format */ #define SSI_CR0_FRF_SSFF (1 << SSI_CR0_FRF_SHIFT) /* TI synchronous serial fram format */
#define SSI_CR0_FRF_UWIRE (2 << SSI_CR0_FRF_SHIFT) /* MICROWIRE frame format */ #define SSI_CR0_FRF_UWIRE (2 << SSI_CR0_FRF_SHIFT) /* MICROWIRE frame format */
#define SSI_CR0_SPO (1 << 6) /* Bit 6: SSI Serial Clock Polarity */ #define SSI_CR0_SPO (1 << 6) /* Bit 6: SSI Serial Clock Polarity */
@ -231,5 +231,5 @@
* Public Function Prototypes * Public Function Prototypes
************************************************************************************/ ************************************************************************************/
#endif /* LMS_NSSI > 0 */ #endif /* LM3S_NSSI > 0 */
#endif /* __ARCH_ARM_SRC_LM3S_LM3S_SSI_H */ #endif /* __ARCH_ARM_SRC_LM3S_LM3S_SSI_H */

4
configs/eagle100/README.txt
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@ -200,6 +200,10 @@ Eagle100-specific Configuration Options
CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_UARTn_2STOP - Two stop bits CONFIG_UARTn_2STOP - Two stop bits
CONFIG_SSI0_DISABLE - Select to disable support for SSI0
CONFIG_SSI1_DISABLE - Select to disable support for SSI1
CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support.
CONFIG_LM3S_ETHERNET - This must be set (along with CONFIG_NET) CONFIG_LM3S_ETHERNET - This must be set (along with CONFIG_NET)
to build the LM3S Ethernet driver to build the LM3S Ethernet driver
CONFIG_LM3S_ETHLEDS - Enable to use Ethernet LEDs on the board. CONFIG_LM3S_ETHLEDS - Enable to use Ethernet LEDs on the board.

13
configs/eagle100/httpd/defconfig
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@ -121,12 +121,15 @@ CONFIG_UART0_2STOP=0
CONFIG_UART1_2STOP=0 CONFIG_UART1_2STOP=0
# #
# LM3S6918 specific SPI device driver settings # LM3S6918 specific SSI device driver settings
# #
# CONFIG_SPIn_DISABLE - select to disable all support for # CONFIG_SSIn_DISABLE - select to disable all support for
# the SPI # the SSI
CONFIG_SPI1_DISABLE=n # CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support
CONFIG_SPI2_DISABLE=y #
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=n
# #
# LM3S6918 specific serial device driver settings # LM3S6918 specific serial device driver settings

13
configs/eagle100/nettest/defconfig
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@ -121,12 +121,15 @@ CONFIG_UART0_2STOP=0
CONFIG_UART1_2STOP=0 CONFIG_UART1_2STOP=0
# #
# LM3S6918 specific SPI device driver settings # LM3S6918 specific SSI device driver settings
# #
# CONFIG_SPIn_DISABLE - select to disable all support for # CONFIG_SSIn_DISABLE - select to disable all support for
# the SPI # the SSI
CONFIG_SPI1_DISABLE=n # CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support
CONFIG_SPI2_DISABLE=y #
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=n
# #
# LM3S6918 specific serial device driver settings # LM3S6918 specific serial device driver settings

13
configs/eagle100/nsh/defconfig
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@ -121,12 +121,15 @@ CONFIG_UART0_2STOP=0
CONFIG_UART1_2STOP=0 CONFIG_UART1_2STOP=0
# #
# LM3S6918 specific SPI device driver settings # LM3S6918 specific SSI device driver settings
# #
# CONFIG_SPIn_DISABLE - select to disable all support for # CONFIG_SSIn_DISABLE - select to disable all support for
# the SPI # the SSI
CONFIG_SPI1_DISABLE=n # CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support
CONFIG_SPI2_DISABLE=y #
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=n
# #
# LM3S6918 specific serial device driver settings # LM3S6918 specific serial device driver settings

13
configs/eagle100/ostest/defconfig
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@ -121,12 +121,15 @@ CONFIG_UART0_2STOP=0
CONFIG_UART1_2STOP=0 CONFIG_UART1_2STOP=0
# #
# LM3S6918 specific SPI device driver settings # LM3S6918 specific SSI device driver settings
# #
# CONFIG_SPIn_DISABLE - select to disable all support for # CONFIG_SSIn_DISABLE - select to disable all support for
# the SPI # the SSI
CONFIG_SPI1_DISABLE=n # CONFIG_SSI_POLLWAIT - Select to disable interrupt driven SSI support
CONFIG_SPI2_DISABLE=y #
CONFIG_SSI0_DISABLE=n
CONFIG_SSI1_DISABLE=y
CONFIG_SSI_POLLWAIT=n
# #
# LM3S6918 specific serial device driver settings # LM3S6918 specific serial device driver settings