configs/spark: Spark configuration update from David Sidrane
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@ -414,7 +414,6 @@ Hardware
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A1 JP1-11 PA[01] USART2_RTS/ADC12_IN1/TIM2_CH2 11
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A1 JP1-11 PA[01] USART2_RTS/ADC12_IN1/TIM2_CH2 11
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A0 JP1-12 PA[00] WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR 10
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A0 JP1-12 PA[00] WKUP/USART2_CTS/ADC12_IN0/TIM2_CH1_ETR 10
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+3V3 JP2-1 V3.3 Out of Core NA
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+3V3 JP2-1 V3.3 Out of Core NA
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RST JP2-2 NRST 7
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RST JP2-2 NRST 7
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VDDA JP2-3 ADC Voltage 9
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VDDA JP2-3 ADC Voltage 9
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@ -486,7 +485,7 @@ Hardware
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LED_HEAPALLOCATE Heap has been allocated OFF ON OFF Blue
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LED_HEAPALLOCATE Heap has been allocated OFF ON OFF Blue
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LED_IRQSENABLED Interrupts enabled ON OFF ON Orange
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LED_IRQSENABLED Interrupts enabled ON OFF ON Orange
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LED_STACKCREATED Idle stack created OFF OFF ON Green
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LED_STACKCREATED Idle stack created OFF OFF ON Green
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LED_INIRQ In an interrupt** ON N/C N/C Red Glow
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LED_INIRQ In an interrupt** ON N/C N/C Orange Glow
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LED_SIGNAL In a signal handler*** N/C ON N/C Blue Glow
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LED_SIGNAL In a signal handler*** N/C ON N/C Blue Glow
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LED_ASSERTION An assertion failed ON ON ON White
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LED_ASSERTION An assertion failed ON ON ON White
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LED_PANIC The system has crashed ON N/C N/C Red Flashing
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LED_PANIC The system has crashed ON N/C N/C Red Flashing
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@ -176,7 +176,7 @@
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#define GPIO_LED1 (GPIO_PORTA | GPIO_PIN13 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED1 (GPIO_PORTA | GPIO_PIN13 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED_USR GPIO_LED1
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#define GPIO_LED_USR GPIO_LED1
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#define GPIO_LED2 (GPIO_PORTA | GPIO_PIN8 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED2 (GPIO_PORTA | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED3 (GPIO_PORTA | GPIO_PIN9 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED3 (GPIO_PORTA | GPIO_PIN9 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED4 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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#define GPIO_LED4 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz)
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@ -189,12 +189,12 @@ static inline void phy_led_on(unsigned int on_bitset)
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if ((on_bitset & BOARD_RED_LED_BIT) != 0)
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if ((on_bitset & BOARD_RED_LED_BIT) != 0)
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{
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{
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stm32_gpiowrite(GPIO_LED1, false);
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stm32_gpiowrite(GPIO_LED2, false);
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}
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}
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if ((on_bitset & BOARD_GREEN_LED_BIT) != 0)
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if ((on_bitset & BOARD_GREEN_LED_BIT) != 0)
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{
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{
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stm32_gpiowrite(GPIO_LED2, false);
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stm32_gpiowrite(GPIO_LED4, false);
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}
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}
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if ((on_bitset & BOARD_BLUE_LED_BIT) != 0)
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if ((on_bitset & BOARD_BLUE_LED_BIT) != 0)
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@ -206,7 +206,7 @@ static inline void phy_led_on(unsigned int on_bitset)
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if ((on_bitset & BOARD_USR_LED_BIT) != 0)
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if ((on_bitset & BOARD_USR_LED_BIT) != 0)
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{
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{
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stm32_gpiowrite(GPIO_LED4, true);
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stm32_gpiowrite(GPIO_LED1, true);
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}
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}
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}
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}
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@ -224,12 +224,12 @@ static inline void phy_led_off(unsigned int off_bitset)
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if ((off_bitset & BOARD_RED_LED_BIT) != 0)
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if ((off_bitset & BOARD_RED_LED_BIT) != 0)
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{
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{
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stm32_gpiowrite(GPIO_LED1, true);
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stm32_gpiowrite(GPIO_LED2, true);
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}
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}
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if ((off_bitset & BOARD_GREEN_LED_BIT) != 0)
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if ((off_bitset & BOARD_GREEN_LED_BIT) != 0)
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{
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{
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stm32_gpiowrite(GPIO_LED2, true);
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stm32_gpiowrite(GPIO_LED4, true);
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}
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}
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if ((off_bitset & BOARD_BLUE_LED_BIT) != 0)
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if ((off_bitset & BOARD_BLUE_LED_BIT) != 0)
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@ -241,7 +241,7 @@ static inline void phy_led_off(unsigned int off_bitset)
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if ((off_bitset & BOARD_USR_LED_BIT) != 0)
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if ((off_bitset & BOARD_USR_LED_BIT) != 0)
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{
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{
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stm32_gpiowrite(GPIO_LED4, false);
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stm32_gpiowrite(GPIO_LED1, false);
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}
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}
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}
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}
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@ -159,15 +159,19 @@ int nsh_archinitialize(void)
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/* Get the SPI port */
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/* Get the SPI port */
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message("nsh_archinitialize: Initializing SPI port %d\n",CONFIG_SPARK_FLASH_SPI);
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message("nsh_archinitialize: Initializing SPI port %d\n",
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CONFIG_SPARK_FLASH_SPI);
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spi = up_spiinitialize(CONFIG_SPARK_FLASH_SPI);
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spi = up_spiinitialize(CONFIG_SPARK_FLASH_SPI);
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if (!spi)
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if (!spi)
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{
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{
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message("nsh_archinitialize: ERROR: Failed to initialize SPI port %d\n",CONFIG_SPARK_FLASH_SPI);
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message("nsh_archinitialize: ERROR: Failed to initialize SPI port %d\n",
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CONFIG_SPARK_FLASH_SPI);
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return -ENODEV;
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return -ENODEV;
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}
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}
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message("nsh_archinitialize: Successfully initialized SPI port %d\n",CONFIG_SPARK_FLASH_SPI);
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message("nsh_archinitialize: Successfully initialized SPI port %d\n",
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CONFIG_SPARK_FLASH_SPI);
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/* Now bind the SPI interface to the SST25 SPI FLASH driver */
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/* Now bind the SPI interface to the SST25 SPI FLASH driver */
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@ -175,14 +179,45 @@ int nsh_archinitialize(void)
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mtd = sst25_initialize(spi);
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mtd = sst25_initialize(spi);
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if (!mtd)
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if (!mtd)
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{
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{
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message("nsh_archinitialize: Failed to bind SPI port %d to the SPI FLASH driver\n", CONFIG_SPARK_FLASH_SPI);
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message("nsh_archinitialize: Failed to bind SPI port %d to the SPI FLASH driver\n",
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CONFIG_SPARK_FLASH_SPI);
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}
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}
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else
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else
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{
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{
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message("nsh_archinitialize: Successfully bound SPI port %d to the SPI FLASH driver\n", CONFIG_SPARK_FLASH_SPI);
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message("nsh_archinitialize: Successfully bound SPI port %d to the SPI FLASH driver\n",
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CONFIG_SPARK_FLASH_SPI);
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}
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}
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#ifdef CONFIG_SPARK_FLASH_PART
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#ifndef CONFIG_SPARK_FLASH_PART
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char partname[16];
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char mntpoint[16];
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/* Use the FTL layer to wrap the MTD driver as a block driver */
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ret = ftl_initialize(CONFIG_SPARK_FLASH_MINOR, mtd);
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if (ret < 0)
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{
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fdbg("ERROR: Initialize the FTL layer\n");
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return ret;
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}
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/* mount -t vfat /dev/mtdblock0 /mnt/p0 */
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snprintf(partname, sizeof(partname), "/dev/mtdblock%d",
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CONFIG_SPARK_FLASH_MINOR);
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snprintf(mntpoint, sizeof(mntpoint)-1, CONFIG_SPARK_FLASH_MOUNT_POINT,
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CONFIG_SPARK_FLASH_MINOR);
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/* Mount the file system at /mnt/pn */
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ret = mount(partname, mntpoint, "vfat", 0, NULL);
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if (ret < 0)
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{
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fdbg("ERROR: Failed to mount the FAT volume: %d\n", errno);
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return ret;
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}
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#else
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{
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{
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int partno;
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int partno;
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int partsize;
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int partsize;
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@ -203,7 +238,7 @@ int nsh_archinitialize(void)
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/* Get the partition size */
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/* Get the partition size */
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partsize = atoi(ptr);
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partsize = atoi(ptr);
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mtd_part = mtd_partition(mtd, partoffset, (partsize>>2)*16);
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mtd_part = mtd_partition(mtd, partoffset, (partsize >> 2) * 16);
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partoffset += (partsize >> 2) * 16;
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partoffset += (partsize >> 2) * 16;
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/* Use the FTL layer to wrap the MTD driver as a block driver */
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/* Use the FTL layer to wrap the MTD driver as a block driver */
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@ -216,7 +251,8 @@ int nsh_archinitialize(void)
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}
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}
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snprintf(partname,sizeof(partname), "/dev/mtdblock%d", partno);
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snprintf(partname,sizeof(partname), "/dev/mtdblock%d", partno);
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snprintf(mntpoint,sizeof(mntpoint)-1,CONFIG_SPARK_FLASH_MOUNT_POINT,partno);
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snprintf(mntpoint,sizeof(mntpoint)-1, CONFIG_SPARK_FLASH_MOUNT_POINT,
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partno);
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/* Mount the file system at /mnt/pn */
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/* Mount the file system at /mnt/pn */
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