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STM32 FLASH pre-fetch is no long enabled unless it is so configured

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5388 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-11-26 13:22:51 +00:00
parent 2def0d877d
commit 4dcc80f24f
5 changed files with 23 additions and 3 deletions
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3
ChangeLog
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@ -3686,4 +3686,7 @@
* arch/arm/srch/stm32/stm32_otgfshost.c: Replace timeout handling; use
system tick instead of frame counter. The frame counter gets rset to
zero at 0x3fff making it error prone.
* arch/arm/src/stm32/stm32f20xx_rcc.c and stm32f40xx_rcc.c: Added option
CONFIG_STM32_FLASH_PREFETCH. FLASH prefetch will now only be enabled
if this option is selected.

6
Makefile.unix
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@ -34,9 +34,9 @@
############################################################################
TOPDIR := ${shell pwd | sed -e 's/ /\\ /g'}
-include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
-include ${TOPDIR}/Make.defs
-include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
-include $(TOPDIR)/Make.defs
# Control build verbosity

9
arch/arm/src/stm32/Kconfig
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@ -689,6 +689,15 @@ endchoice
endmenu
config STM32_FLASH_PREFETCH
bool "Enable FLASH Pre-fetch"
depends on STM32_STM32F20XX || STM32_STM32F40XX
default n
---help---
Enable FLASH prefetch and F2 and F4 parts (FLASH pre-fetch is always enabled
on F1 parts). Some early revisions of F4 parts do not support FLASH pre-fetch
properly and enabling this option may interfere with ADC accuracy.
choice
prompt "JTAG Configuration"
default STM32_JTAG_DISABLE

4
arch/arm/src/stm32/stm32f20xxx_rcc.c
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@ -631,7 +631,11 @@ static void stm32_stdclockconfig(void)
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
#ifdef STM32_FLASH_PREFETCH
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
#else
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
#endif
putreg32(regval, STM32_FLASH_ACR);
/* Select the main PLL as system clock source */

4
arch/arm/src/stm32/stm32f40xxx_rcc.c
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@ -633,7 +633,11 @@ static void stm32_stdclockconfig(void)
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
#ifdef STM32_FLASH_PREFETCH
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
#else
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
#endif
putreg32(regval, STM32_FLASH_ACR);
/* Select the main PLL as system clock source */