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Several changes (mostly graphics related) from Petteri Aimonen

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5385 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-11-23 15:49:06 +00:00
parent f99e55676b
commit 4e27a1a255
3 changed files with 7 additions and 6 deletions
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1
arch/arm/src/stm32/chip/stm32_flash.h
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@ -110,6 +110,7 @@
# define FLASH_ACR_HLFCYA (1 << 3) /* FLASH half cycle access */
# define FLASH_ACR_PRTFBE (1 << 4) /* FLASH prefetch enable */
#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define FLASH_ACR_PRFTEN (1 << 8) /* FLASH prefetch enable */
# define FLASH_ACR_ICEN (1 << 9) /* Bit 9: Instruction cache enable */
# define FLASH_ACR_DCEN (1 << 10) /* Bit 10: Data cache enable */
# define FLASH_ACR_ICRST (1 << 11) /* Bit 11: Instruction cache reset */

10
arch/arm/src/stm32/stm32_serial.c
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@ -101,11 +101,11 @@
*/
# if (defined(CONFIG_USART1_RXDMA) && defined(CONFIG_USART1_RS485)) || \
(defined(CONFIG_USART2_RXDMA) && defined(CONFIG_USART2_RS485)) || \
(defined(CONFIG_USART3_RXDMA) && defined(CONFIG_USART3_RS485)) || \
(defined(CONFIG_UART4_RXDMA) && defined(CONFIG_UART4_RS485)) || \
(defined(CONFIG_UART5_RXDMA) && defined(CONFIG_UART5_RS485)) || \
(defined(CONFIG_USART6_RXDMA) && defined(CONFIG_USART6_RS485)) \
(defined(CONFIG_USART2_RXDMA) && defined(CONFIG_USART2_RS485)) || \
(defined(CONFIG_USART3_RXDMA) && defined(CONFIG_USART3_RS485)) || \
(defined(CONFIG_UART4_RXDMA) && defined(CONFIG_UART4_RS485)) || \
(defined(CONFIG_UART5_RXDMA) && defined(CONFIG_UART5_RS485)) || \
(defined(CONFIG_USART6_RXDMA) && defined(CONFIG_USART6_RS485))
# error "RXDMA and RS-485 cannot be enabled at the same time for the same U[S]ART"
# endif

2
arch/arm/src/stm32/stm32f40xxx_rcc.c
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@ -633,7 +633,7 @@ static void stm32_stdclockconfig(void)
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
putreg32(regval, STM32_FLASH_ACR);
/* Select the main PLL as system clock source */