SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions
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@ -56,6 +56,7 @@
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/* These are bits maps of PIDs in the H64MX SPSELR registers. These are used by
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/* These are bits maps of PIDs in the H64MX SPSELR registers. These are used by
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* application code to quickly determine if a given PID is served by H32MX or H64MX
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* application code to quickly determine if a given PID is served by H32MX or H64MX
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* which, in turn, is needed to know if the peripheral secured in SPSELR).
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* which, in turn, is needed to know if the peripheral secured in SPSELR).
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* Reference: "In Matrix" column of "Table 9-1. Peripheral identifiers."
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*
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*
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* NOTE that these hard-code bit values must match the PID assignments in
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* NOTE that these hard-code bit values must match the PID assignments in
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* arch/arm/include/sama5/sama5*_irq.h.
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* arch/arm/include/sama5/sama5*_irq.h.
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@ -254,12 +254,14 @@
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#define SAM_BOOTMEM_MMUFLAGS MMU_ROMFLAGS
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#define SAM_BOOTMEM_MMUFLAGS MMU_ROMFLAGS
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#define SAM_ROM_MMUFLAGS MMU_ROMFLAGS
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#define SAM_ROM_MMUFLAGS MMU_ROMFLAGS
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#define SAM_ISRAM_MMUFLAGS MMU_MEMFLAGS
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#define SAM_ISRAM_MMUFLAGS MMU_MEMFLAGS
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#define SAM_SMD_MMUFLAGS MMU_MEMFLAGS
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#define SAM_VDEC_MMUFLAGS MMU_IOFLAGS
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#define SAM_UDPHSRAM_MMUFLAGS MMU_IOFLAGS
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#define SAM_UDPHSRAM_MMUFLAGS MMU_IOFLAGS
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#define SAM_UHPOHCI_MMUFLAGS MMU_IOFLAGS
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#define SAM_UHPOHCI_MMUFLAGS MMU_IOFLAGS
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#define SAM_UHPEHCI_MMUFLAGS MMU_IOFLAGS
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#define SAM_UHPEHCI_MMUFLAGS MMU_IOFLAGS
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#define SAM_AXIMX_MMUFLAGS MMU_IOFLAGS
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#define SAM_AXIMX_MMUFLAGS MMU_IOFLAGS
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#define SAM_DAP_MMUFLAGS MMU_IOFLAGS
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#define SAM_DAP_MMUFLAGS MMU_IOFLAGS
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#define SAM_SMD_MMUFLAGS MMU_MEMFLAGS
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#define SAM_L2CC_MMUFLAGS MMU_IOFLAGS
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/* If the NFC is not being used, the NFC SRAM can be used as general purpose
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/* If the NFC is not being used, the NFC SRAM can be used as general purpose
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* SRAM (cached). If the NFC is used, then the NFC SRAM should be treated
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* SRAM (cached). If the NFC is used, then the NFC SRAM should be treated
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@ -188,11 +188,21 @@ static const struct section_mapping_s section_mapping[] =
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{ SAM_NFCSRAM_PSECTION, SAM_NFCSRAM_VSECTION,
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{ SAM_NFCSRAM_PSECTION, SAM_NFCSRAM_VSECTION,
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SAM_NFCSRAM_MMUFLAGS, SAM_NFCSRAM_NSECTIONS
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SAM_NFCSRAM_MMUFLAGS, SAM_NFCSRAM_NSECTIONS
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},
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},
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#ifndef CONFIG_PAGING /* Internal SRAM is already fully mapped */
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#ifndef CONFIG_PAGING /* Internal SRAM is already fully mapped */
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{ SAM_ISRAM_PSECTION, SAM_ISRAM_VSECTION,
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{ SAM_ISRAM_PSECTION, SAM_ISRAM_VSECTION,
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SAM_ISRAM_MMUFLAGS, SAM_ISRAM_NSECTIONS
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SAM_ISRAM_MMUFLAGS, SAM_ISRAM_NSECTIONS
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},
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},
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#endif
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#endif
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#ifdef SAM_VDEC_PSECTION
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/* If the memory map supports a video decoder (VDEC), then map it */
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{ SAM_VDEC_PSECTION, SAM_VDEC_VSECTION,
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SAM_VDEC_MMUFLAGS, SAM_VDEC_NSECTIONS
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},
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#endif
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{ SAM_SMD_PSECTION, SAM_SMD_VSECTION,
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{ SAM_SMD_PSECTION, SAM_SMD_VSECTION,
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SAM_SMD_MMUFLAGS, SAM_SMD_NSECTIONS
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SAM_SMD_MMUFLAGS, SAM_SMD_NSECTIONS
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},
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},
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@ -212,6 +222,14 @@ static const struct section_mapping_s section_mapping[] =
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SAM_DAP_MMUFLAGS, SAM_DAP_NSECTIONS
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SAM_DAP_MMUFLAGS, SAM_DAP_NSECTIONS
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},
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},
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#ifdef SAM_L2CC_PSECTION
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/* If the memory map supports an L2 cache controller (L2CC), then map it */
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{ SAM_L2CC_PSECTION, SAM_L2CC_VSECTION,
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SAM_L2CC_MMUFLAGS, SAM_L2CC_NSECTIONS
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},
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#endif
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/* SAMA5 CS0 External Memories */
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/* SAMA5 CS0 External Memories */
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#ifdef CONFIG_SAMA5_EBICS0
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#ifdef CONFIG_SAMA5_EBICS0
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