Add basic support for the STM32F205RG. From SourceForge Ticket 40 (anonymous).
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@ -928,6 +928,44 @@
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/* STM32 F2 Family ******************************************************************/
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elif defined(CONFIG_ARCH_CHIP_STM32F205RG) /* UFBGA-176 1024Kb FLASH 128Kb SRAM */
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# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
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# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
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# undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */
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# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
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# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
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# undef CONFIG_STM32_MEDIUMPLUSDENSITY /* STM32L15xxC w/ 32/256 Kbytes */
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# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
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# undef CONFIG_STM32_VALUELINE /* STM32F100x */
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# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */
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# define CONFIG_STM32_STM32F20XX 1 /* STM32F205x and STM32F207x */
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# undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */
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# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */
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# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx */
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# define STM32_NFSMC 0 /* No FSMC */
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# define STM32_NATIM 2 /* Two advanced timers TIM1 and 8 */
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# define STM32_NGTIM 4 /* 16-bit general timers TIM3 and 4 with DMA
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* 32-bit general timers TIM2 and 5 with DMA */
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# define STM32_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */
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# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */
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# define STM32_NDMA 2 /* DMA1-2 */
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# define STM32_NSPI 3 /* SPI1-3 */
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# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */
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# define STM32_NUSART 6 /* USART1-3 and 6, UART 4-5 */
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# define STM32_NI2C 3 /* I2C1-3 */
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# define STM32_NCAN 2 /* CAN1-2 */
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# define STM32_NSDIO 1 /* SDIO */
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# define STM32_NLCD 0 /* No LCD */
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# define STM32_NUSBOTG 1 /* USB OTG FS/HS */
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# define STM32_NGPIO 51 /* GPIOA-I */
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# define STM32_NADC 3 /* 12-bit ADC1-3, 16 channels */
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# define STM32_NDAC 2 /* 12-bit DAC1-2 */
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# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
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# define STM32_NCRC 1 /* CRC */
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# define STM32_NETHERNET 0 /* No Ethernet MAC */
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# define STM32_NRNG 1 /* Random number generator (RNG) */
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# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
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#elif defined(CONFIG_ARCH_CHIP_STM32F207IG) /* UFBGA-176 1024Kb FLASH 128Kb SRAM */
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# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
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# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
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@ -394,6 +394,12 @@ config ARCH_CHIP_STM32F107VC
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select STM32_STM32F10XX
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select STM32_CONNECTIVITYLINE
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config ARCH_CHIP_STM32F205RG
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bool "STM32F205RG"
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select ARCH_CORTEXM3
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select STM32_STM32F20XX
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select STM32_STM32F205
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config ARCH_CHIP_STM32F207IG
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bool "STM32F207IG"
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select ARCH_CORTEXM3
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@ -871,6 +877,33 @@ config STM32_STM32F20XX
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bool
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default n
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config STM32_STM32F205
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bool
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default n
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select STM32_HAVE_OTGFS
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select STM32_HAVE_USART3
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select STM32_HAVE_UART4
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select STM32_HAVE_UART5
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select STM32_HAVE_USART6
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select STM32_HAVE_TIM1
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select STM32_HAVE_TIM5
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select STM32_HAVE_TIM6
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select STM32_HAVE_TIM7
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select STM32_HAVE_TIM8
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select STM32_HAVE_TIM9
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select STM32_HAVE_TIM10
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select STM32_HAVE_TIM11
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select STM32_HAVE_TIM12
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select STM32_HAVE_TIM13
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select STM32_HAVE_TIM14
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select STM32_HAVE_ADC2
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select STM32_HAVE_ADC3
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select STM32_HAVE_CAN1
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select STM32_HAVE_CAN2
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select STM32_HAVE_RNG
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select STM32_HAVE_SPI2
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select STM32_HAVE_SPI3
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config STM32_STM32F207
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bool
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default n
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