Fix issues on fe310 including interrupt handling (#46)
* arch: fe310: Fix comments * arch: fe310: Improve irq handling in fe310_serial.c * arch: fe310: Fix initial interrupt status (mstatus) Also, removed unnecessary up_enable_irq(FE310_IRQ_ECALLM)
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@ -46,6 +46,7 @@
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/* In mstatus register */
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/* In mstatus register */
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#define MSTATUS_MIE (0x1 << 3) /* Machine Interrupt Enable */
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#define MSTATUS_MIE (0x1 << 3) /* Machine Interrupt Enable */
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#define MSTATUS_MPIE (0x1 << 7) /* Machine Previous Interrupt Enable */
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/* In mie (machine interrupt enable) register */
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/* In mie (machine interrupt enable) register */
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@ -1,5 +1,5 @@
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/****************************************************************************
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/****************************************************************************
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* arch/arm/src/fe310/fe310_clockconfig.c
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* arch/risc-v/src/fe310/fe310_clockconfig.c
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*
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*
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* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
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* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
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* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
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* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
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@ -1,5 +1,5 @@
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/****************************************************************************
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/****************************************************************************
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* arch/arm/src/fe310/fe310_clockconfig.h
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* arch/risc-v/src/fe310/fe310_clockconfig.h
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*
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*
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* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
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* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
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* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
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* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
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@ -1,5 +1,5 @@
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/****************************************************************************
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/****************************************************************************
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* arch/arm/src/fe310/fe310_gpio.c
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* arch/risc-v/src/fe310/fe310_gpio.c
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*
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*
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* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
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* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
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* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
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* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
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@ -100,7 +100,6 @@ void up_irqinitialize(void)
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/* Attach the ecall interrupt handler */
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/* Attach the ecall interrupt handler */
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irq_attach(FE310_IRQ_ECALLM, up_swint, NULL);
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irq_attach(FE310_IRQ_ECALLM, up_swint, NULL);
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up_enable_irq(FE310_IRQ_ECALLM);
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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@ -188,13 +187,13 @@ void up_enable_irq(int irq)
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* Name: up_get_newintctx
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* Name: up_get_newintctx
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*
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*
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* Description:
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* Description:
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* Return a value for EPIC. But FE310 doesn't use EPIC for event control.
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* Return initial mstatus when a task is created.
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*
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*
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****************************************************************************/
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****************************************************************************/
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uint32_t up_get_newintctx(void)
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uint32_t up_get_newintctx(void)
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{
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{
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return 0;
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return (MSTATUS_MPIE | MSTATUS_MIE);
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}
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}
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/****************************************************************************
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/****************************************************************************
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@ -238,7 +237,7 @@ irqstate_t up_irq_save(void)
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void up_irq_restore(irqstate_t flags)
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void up_irq_restore(irqstate_t flags)
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{
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{
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/* Machine mode - mstatus */
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/* Write flags to mstatus */
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asm volatile("csrw mstatus, %0" : /* no output */ : "r" (flags));
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asm volatile("csrw mstatus, %0" : /* no output */ : "r" (flags));
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}
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}
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@ -398,6 +398,11 @@ static int up_interrupt(int irq, void *context, FAR void *arg)
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status = up_serialin(priv, UART_IP_OFFSET);
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status = up_serialin(priv, UART_IP_OFFSET);
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if (status == 0)
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{
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break;
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}
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if (status & UART_IP_RXWM)
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if (status & UART_IP_RXWM)
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{
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{
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/* Process incoming bytes */
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/* Process incoming bytes */
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@ -405,9 +410,12 @@ static int up_interrupt(int irq, void *context, FAR void *arg)
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uart_recvchars(dev);
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uart_recvchars(dev);
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}
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}
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/* Process outgoing bytes */
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if (status & UART_IP_TXWM)
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{
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/* Process outgoing bytes */
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uart_xmitchars(dev);
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uart_xmitchars(dev);
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}
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}
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}
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return OK;
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return OK;
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