diff --git a/arch/arm/src/efm32/chip/efm32_cmu.h b/arch/arm/src/efm32/chip/efm32_cmu.h index add85443dc..9822b553e3 100644 --- a/arch/arm/src/efm32/chip/efm32_cmu.h +++ b/arch/arm/src/efm32/chip/efm32_cmu.h @@ -611,8 +611,13 @@ /* Bit fields for CMU LFCLKSEL */ -#define _CMU_LFCLKSEL_RESETVALUE 0x00000005UL /* Default value for CMU_LFCLKSEL */ -#define _CMU_LFCLKSEL_MASK 0x0011000FUL /* Mask for CMU_LFCLKSEL */ +#if defined(CONFIG_EFM32_EFM32GG) +# define _CMU_LFCLKSEL_RESETVALUE 0x00000005UL /* Default value for CMU_LFCLKSEL */ +# define _CMU_LFCLKSEL_MASK 0x0011000FUL /* Mask for CMU_LFCLKSEL */ +#elif defined(CONFIG_EFM32_EFM32G) +# define _CMU_LFCLKSEL_RESETVALUE 0x00000005UL /* Default value for CMU_LFCLKSEL */ +# define _CMU_LFCLKSEL_MASK 0x0011000FUL /* Mask for CMU_LFCLKSEL */ +#endif #define _CMU_LFCLKSEL_LFA_SHIFT 0 /* Shift value for CMU_LFA */ #define _CMU_LFCLKSEL_LFA_MASK 0x3UL /* Bit mask for CMU_LFA */ @@ -638,24 +643,27 @@ #define CMU_LFCLKSEL_LFB_LFRCO (_CMU_LFCLKSEL_LFB_LFRCO << 2) /* Shifted mode LFRCO for CMU_LFCLKSEL */ #define CMU_LFCLKSEL_LFB_LFXO (_CMU_LFCLKSEL_LFB_LFXO << 2) /* Shifted mode LFXO for CMU_LFCLKSEL */ #define CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 (_CMU_LFCLKSEL_LFB_HFCORECLKLEDIV2 << 2) /* Shifted mode HFCORECLKLEDIV2 for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFAE (0x1UL << 16) /* Clock Select for LFA Extended */ -#define _CMU_LFCLKSEL_LFAE_SHIFT 16 /* Shift value for CMU_LFAE */ -#define _CMU_LFCLKSEL_LFAE_MASK 0x10000UL /* Bit mask for CMU_LFAE */ -#define _CMU_LFCLKSEL_LFAE_DEFAULT 0x00000000UL /* Mode DEFAULT for CMU_LFCLKSEL */ -#define _CMU_LFCLKSEL_LFAE_DISABLED 0x00000000UL /* Mode DISABLED for CMU_LFCLKSEL */ -#define _CMU_LFCLKSEL_LFAE_ULFRCO 0x00000001UL /* Mode ULFRCO for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFAE_DEFAULT (_CMU_LFCLKSEL_LFAE_DEFAULT << 16) /* Shifted mode DEFAULT for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFAE_DISABLED (_CMU_LFCLKSEL_LFAE_DISABLED << 16) /* Shifted mode DISABLED for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFAE_ULFRCO (_CMU_LFCLKSEL_LFAE_ULFRCO << 16) /* Shifted mode ULFRCO for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFBE (0x1UL << 20) /* Clock Select for LFB Extended */ -#define _CMU_LFCLKSEL_LFBE_SHIFT 20 /* Shift value for CMU_LFBE */ -#define _CMU_LFCLKSEL_LFBE_MASK 0x100000UL /* Bit mask for CMU_LFBE */ -#define _CMU_LFCLKSEL_LFBE_DEFAULT 0x00000000UL /* Mode DEFAULT for CMU_LFCLKSEL */ -#define _CMU_LFCLKSEL_LFBE_DISABLED 0x00000000UL /* Mode DISABLED for CMU_LFCLKSEL */ -#define _CMU_LFCLKSEL_LFBE_ULFRCO 0x00000001UL /* Mode ULFRCO for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFBE_DEFAULT (_CMU_LFCLKSEL_LFBE_DEFAULT << 20) /* Shifted mode DEFAULT for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFBE_DISABLED (_CMU_LFCLKSEL_LFBE_DISABLED << 20) /* Shifted mode DISABLED for CMU_LFCLKSEL */ -#define CMU_LFCLKSEL_LFBE_ULFRCO (_CMU_LFCLKSEL_LFBE_ULFRCO << 20) /* Shifted mode ULFRCO for CMU_LFCLKSEL */ + +#if defined(CONFIG_EFM32_EFM32GG) +# define CMU_LFCLKSEL_LFAE (0x1UL << 16) /* Clock Select for LFA Extended */ +# define _CMU_LFCLKSEL_LFAE_SHIFT 16 /* Shift value for CMU_LFAE */ +# define _CMU_LFCLKSEL_LFAE_MASK 0x10000UL /* Bit mask for CMU_LFAE */ +# define _CMU_LFCLKSEL_LFAE_DEFAULT 0x00000000UL /* Mode DEFAULT for CMU_LFCLKSEL */ +# define _CMU_LFCLKSEL_LFAE_DISABLED 0x00000000UL /* Mode DISABLED for CMU_LFCLKSEL */ +# define _CMU_LFCLKSEL_LFAE_ULFRCO 0x00000001UL /* Mode ULFRCO for CMU_LFCLKSEL */ +# define CMU_LFCLKSEL_LFAE_DEFAULT (_CMU_LFCLKSEL_LFAE_DEFAULT << 16) /* Shifted mode DEFAULT for CMU_LFCLKSEL */ +# define CMU_LFCLKSEL_LFAE_DISABLED (_CMU_LFCLKSEL_LFAE_DISABLED << 16) /* Shifted mode DISABLED for CMU_LFCLKSEL */ +# define CMU_LFCLKSEL_LFAE_ULFRCO (_CMU_LFCLKSEL_LFAE_ULFRCO << 16) /* Shifted mode ULFRCO for CMU_LFCLKSEL */ +# define CMU_LFCLKSEL_LFBE (0x1UL << 20) /* Clock Select for LFB Extended */ +# define _CMU_LFCLKSEL_LFBE_SHIFT 20 /* Shift value for CMU_LFBE */ +# define _CMU_LFCLKSEL_LFBE_MASK 0x100000UL /* Bit mask for CMU_LFBE */ +# define _CMU_LFCLKSEL_LFBE_DEFAULT 0x00000000UL /* Mode DEFAULT for CMU_LFCLKSEL */ +# define _CMU_LFCLKSEL_LFBE_DISABLED 0x00000000UL /* Mode DISABLED for CMU_LFCLKSEL */ +# define _CMU_LFCLKSEL_LFBE_ULFRCO 0x00000001UL /* Mode ULFRCO for CMU_LFCLKSEL */ +# define CMU_LFCLKSEL_LFBE_DEFAULT (_CMU_LFCLKSEL_LFBE_DEFAULT << 20) /* Shifted mode DEFAULT for CMU_LFCLKSEL */ +# define CMU_LFCLKSEL_LFBE_DISABLED (_CMU_LFCLKSEL_LFBE_DISABLED << 20) /* Shifted mode DISABLED for CMU_LFCLKSEL */ +# define CMU_LFCLKSEL_LFBE_ULFRCO (_CMU_LFCLKSEL_LFBE_ULFRCO << 20) /* Shifted mode ULFRCO for CMU_LFCLKSEL */ +#endif /* Bit fields for CMU STATUS */ diff --git a/arch/arm/src/efm32/efm32_clockconfig.c b/arch/arm/src/efm32/efm32_clockconfig.c index 53b7025928..d7f3631407 100644 --- a/arch/arm/src/efm32/efm32_clockconfig.c +++ b/arch/arm/src/efm32/efm32_clockconfig.c @@ -551,7 +551,6 @@ static inline uint32_t efm32_hfperclk_config(uint32_t hfperclkdiv, uint32_t hfclk) { uint32_t regval; - uint32_t hfperclk; unsigned int divider; DEBUGASSERT(hfperclkdiv <= _CMU_HFPERCLKDIV_HFPERCLKDIV_HFCLK512); @@ -659,11 +658,18 @@ static inline uint32_t efm32_lfaclk_config(uint32_t lfaclksel, bool ulfrco, /* Enable the LFA clock in the LFCLKSEL register */ regval = getreg32(EFM32_CMU_LFCLKSEL); - regval &= ~(_CMU_LFCLKSEL_LFA_MASK | _CMU_LFCLKSEL_LFAE_MASK); + +#ifdef CMU_LFCLKSEL_LFAE + regval &= ~_CMU_LFCLKSEL_LFAE_MASK; +#endif + + regval &= ~_CMU_LFCLKSEL_LFA_MASK; regval |= (lfaclksel << _CMU_LFCLKSEL_LFA_SHIFT); + #ifdef CMU_LFCLKSEL_LFAE_ULFRCO regval |= ((uint32_t)ulfrco << _CMU_LFCLKSEL_LFAE_SHIFT); #endif + putreg32(regval, EFM32_CMU_LFCLKSEL); return lfaclk; @@ -753,11 +759,18 @@ static inline uint32_t efm32_lfbclk_config(uint32_t lfbclksel, bool ulfrco, /* Enable the LFB clock in the LFCLKSEL register */ regval = getreg32(EFM32_CMU_LFCLKSEL); - regval &= ~(_CMU_LFCLKSEL_LFB_MASK | _CMU_LFCLKSEL_LFBE_MASK); + +#ifdef CMU_LFCLKSEL_LFBE + regval &= ~_CMU_LFCLKSEL_LFBE_MASK; +#endif + + regval &= ~_CMU_LFCLKSEL_LFB_MASK; regval |= (lfbclksel << _CMU_LFCLKSEL_LFB_SHIFT); + #ifdef CMU_LFCLKSEL_LFBE_ULFRCO regval |= ((uint32_t)ulfrco << _CMU_LFCLKSEL_LFBE_SHIFT); #endif + putreg32(regval, EFM32_CMU_LFCLKSEL); return lfbclk; diff --git a/arch/arm/src/efm32/efm32_leserial.c b/arch/arm/src/efm32/efm32_leserial.c index b40e3d2b00..8284a6410b 100644 --- a/arch/arm/src/efm32/efm32_leserial.c +++ b/arch/arm/src/efm32/efm32_leserial.c @@ -127,7 +127,6 @@ # define EFM32_RX_INTS LEUART_IEN_RXDATAV #endif - /**************************************************************************** * Private Types ****************************************************************************/ @@ -217,7 +216,7 @@ static char g_leuart1txbuffer[CONFIG_LEUART1_TXBUFSIZE]; /* This describes the state of the EFM32 LEUART0 port. */ #ifdef CONFIG_EFM32_LEUART0 -static const struct efm32_leuart_s g_leuart0config = +static const struct efm32_config_s g_leuart0config = { .uartbase = EFM32_LEUART0_BASE, .handler = efm32_leuart0_interrupt, diff --git a/arch/arm/src/efm32/efm32_lowputc.c b/arch/arm/src/efm32/efm32_lowputc.c index b8b2ecb7b2..4198288f5d 100644 --- a/arch/arm/src/efm32/efm32_lowputc.c +++ b/arch/arm/src/efm32/efm32_lowputc.c @@ -325,7 +325,7 @@ void efm32_lowsetup(void) #ifdef HAVE_LEUART_DEVICE /* Enable clocking to configured LEUART interfaces */ - regval = getreg32(EFM32_CMU_LFBCLKEN0); + regval = getreg32(EFM32_CMU_LFBCLKEN0); regval &= ~(CMU_LFBCLKEN0_LEUART0 #ifdef CONFIG_EFM32_LEUART1 | CMU_LFBCLKEN0_LEUART1