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configs: Add stm32l4r9ai-disco support.

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This commit is contained in:
Juha Niskanen 2018-08-13 07:16:33 -06:00 committed by Gregory Nutt
parent 2589fc943e
commit 4f17f71245
32 changed files with 4710 additions and 61 deletions
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12
configs/Kconfig
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@ -1337,6 +1337,17 @@ config ARCH_BOARD_STM32L476VG_DISCO
MCU. The STM32L476VG is a Cortex-M4 optimised for low-power operation
at up to 80MHz operation with 1024Kb Flash memory and 96+32Kb SRAM.
config ARCH_BOARD_STM32L4R9AI_DISCO
bool "STMicro STM32L4R9AI -Discovery board"
depends on ARCH_CHIP_STM32L4R9AI
select ARCH_HAVE_LEDS
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
STMicro STM32L4R9AI_DISCO development board featuring the STM32L4R9AI
MCU. The STM32L4R9AI is a Cortex-M4 optimised for low-power operation
at up to 120MHz operation with 2048Kb Flash memory and 192+64+384Kb SRAM.
config ARCH_BOARD_STM32L476_MDK
bool "Motorola Mods Development Kit (MDK)"
depends on ARCH_CHIP_STM32L476RG
@ -1783,6 +1794,7 @@ config ARCH_BOARD
default "b-l475e-iot01a" if ARCH_BOARD_B_L475E_IOT01A
default "stm32l476vg-disco" if ARCH_BOARD_STM32L476VG_DISCO
default "stm32l476-mdk" if ARCH_BOARD_STM32L476_MDK
default "stm32l4r9ai-disco" if ARCH_BOARD_STM32L4R9AI_DISCO
default "stm32ldiscovery" if ARCH_BOARD_STM32L_DISCOVERY
default "stm32vldiscovery" if ARCH_BOARD_STM32VL_DISCOVERY
default "mikroe-stm32f4" if ARCH_BOARD_MIKROE_STM32F4

2
configs/stm32l476vg-disco/README.txt
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@ -9,7 +9,7 @@ STM32L476VG Discovery board from ST Micro. See
STM32L476VG:
Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32F476VGT6
Microprocessor: 32-bit ARM Cortex M4 at 80MHz STM32L476VGT6
Memory: 1024 KB Flash and 96+32 KB SRAM
ADC: 3x12-bit, 2.4 MSPS A/D converter: up to 24 channels
DMA: 16-stream DMA controllers with FIFOs and burst support

103
configs/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h
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@ -158,34 +158,36 @@
/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
/* Timers driven from APB1 will be twice PCLK1 */
/* REVISIT : this can be configured */
/* The timer clock frequencies are automatically defined by hardware.
* If the APB prescaler equals 1, the timer clock frequencies are set to the
* same frequency as that of the APB domain. Otherwise they are set to twice.
*
* REVISIT : this can be configured
*/
#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM2_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (STM32L4_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK (80MHz) */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
/* Timers driven from APB2 will be twice PCLK2 */
/* REVISIT : this can be configured */
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
/* The timer clock frequencies are automatically defined by hardware.
* If the APB prescaler equals 1, the timer clock frequencies are set to the
* same frequency as that of the APB domain. Otherwise they are set to twice.
*
* REVISIT : this can be configured
*/
/* REVISIT : this can be configured */
#define STM32L4_APB2_TIM1_CLKIN (STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (STM32L4_PCLK2_FREQUENCY)
#elif defined(HSE_CLOCK_CONFIG)
@ -249,22 +251,22 @@
/* Configure the APB1 prescaler */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM2_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (STM32L4_PCLK1_FREQUENCY)
/* Configure the APB2 prescaler */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM1_CLKIN (STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (STM32L4_PCLK2_FREQUENCY)
#elif defined(MSI_CLOCK_CONFIG)
@ -329,43 +331,44 @@
/* Configure the APB1 prescaler */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM2_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (STM32L4_PCLK1_FREQUENCY)
/* Configure the APB2 prescaler */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM1_CLKIN (STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (STM32L4_PCLK2_FREQUENCY)
#endif
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
/* The timer clock frequencies are automatically defined by hardware.
* If the APB prescaler equals 1, the timer clock frequencies are set to the same
* frequency as that of the APB domain. Otherwise they are set to twice.
* Note: TIM1,8,15,16,17 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM3_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM4_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM5_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM6_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM7_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM2_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM3_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM4_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM5_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM6_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM7_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM8_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM15_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM16_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM17_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_LPTIM1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_LPTIM2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_LPTIM1_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_LPTIM2_FREQUENCY STM32L4_HCLK_FREQUENCY
/************************************************************************************
* Public Data

7
configs/stm32l476vg-disco/src/Makefile
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@ -1,5 +1,5 @@
############################################################################
# configs/nucleo-l476rg/src/Makefile
# configs/stm32l476vg-disco/src/Makefile
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: dev@ziggurat29.com
@ -53,14 +53,11 @@ CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_ADC),y)
#CSRCS += stm32_adc.c
ifeq ($(CONFIG_AJOYSTICK),y)
#CSRCS += stm32_ajoystick.c
endif
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)

3
configs/stm32l476vg-disco/src/stm32_buttons.c
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@ -97,9 +97,6 @@ static struct pm_callback_s g_buttonscb =
.notify = button_pm_notify,
.prepare = button_pm_prepare,
};
#ifndef CONFIG_PM_BUTTON_ACTIVITY
#define CONFIG_PM_BUTTON_ACTIVITY 10
#endif
#endif
/****************************************************************************

3
configs/stm32l476vg-disco/src/stm32_spi.c
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@ -78,8 +78,7 @@ struct spi_dev_s *g_spi3;
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Nucleo-F401RE and
* Nucleo-F411RE boards.
* Called to configure SPI chip select GPIO pins.
*
************************************************************************************/

8
configs/stm32l4r9ai-disco/Kconfig Normal file
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@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_STM32L4R9AI_DISCO
endif # ARCH_BOARD_STM32L4R9AI_DISCO

514
configs/stm32l4r9ai-disco/README.txt Normal file
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@ -0,0 +1,514 @@
XXX all this needs review and update
README
======
This README discusses issues unique to NuttX configurations for the ST
STM32L4R9AI Discovery board from ST Micro. See
https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-discovery-kits/32l4r9idiscovery.html
STM32L4R9AI:
Microprocessor: 32-bit ARM Cortex M4 at 120MHz STM32L4R9AI
Memory: 2048 KB Flash and 192+64+384 KB SRAM
ADC: 1x12-bit, 2.4 MSPS A/D converter: up to 24 channels
DMA: 16-stream DMA controllers with FIFOs and burst support
Timers: Up to 11 timers: up to eight 16-bit, two 32-bit timers, two
watchdog timers, and a SysTick timer
GPIO: Up to 51 I/O ports with interrupt capability
I2C: Up to 4 x I2C interfaces
USARTs: Up to 3 USARTs, 2 UARTs, 1 LPUART
SPIs: Up to 3 SPIs
SAIs: Up to 2 dual-channel audio interfaces
CAN interface
SDIO interface
OCTOSPI interface
USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY
CRC calculation unit
RTC
Board features:
Peripherals: 2 led, 1 d-pad joystick, 2 x LED, LCD, USC OTG FS, SAI stereo
Digital Microphone, MEMS Accelerometer, Magnetometer,
Gyroscope, 512 Mbit OCTOSPI Flash, current ammeter
Debug: Serial wire debug and JTAG interfaces
Uses a STM32F103 to provide a ST-Link for programming, debug similar to the
OpenOcd FTDI function - USB to JTAG front-end.
See http://mbed.org/platforms/ST-Nucleo-L476RG for more
information about these boards.
Contents
========
- mbed
- Hardware
- Button
- LED
- USARTs and Serial Consoles
- LQFP64
- mbed
- Shields
- Configurations
mbed
====
The Nucleo-F401RE includes boot loader from mbed:
https://mbed.org/platforms/ST-Nucleo-F401RE/
https://mbed.org/handbook/Homepage
Using the mbed loader:
1. Connect the Nucleo-F4x1RE to the host PC using the USB connector.
2. A new file system will appear called NUCLEO; open it with Windows
Explorer (assuming that you are using Windows).
3. Drag and drop nuttx.bin into the MBED window. This will load the
nuttx.bin binary into the Nucleo-F4x1RE. The NUCLEO window will
close then re-open and the Nucleo-F4x1RE will be running the new code.
Hardware
========
GPIO
----
SERIAL_TX=PA_2 USER_BUTTON=PC_13
SERIAL_RX=PA_3 LED1 =PA_5
A0=PA_0 USART2RX D0=PA_3 D8 =PA_9
A1=PA_1 USART2TX D1=PA_2 D9 =PC_7
A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS
A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI
A4=PC_1 SDCS=D4=PB_5 D12=PA_6 SPI_MISO
A5=PC_0 WIFI_EN=D5=PB_4 LED1=D13=PA_5 SPI_SCK
LED2=D6=PB_10 I2C1_SDA=D14=PB_9 Probe
D7=PA_8 I2C1_SCL=D15=PB_8 Probe
From: https://mbed.org/platforms/ST-Nucleo-F401RE/
Buttons
-------
B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32
microcontroller.
LEDs
----
The Nucleo F401RE and Nucleo F411RE provide a single user LED, LD2. LD2
is the green LED connected to Arduino signal D13 corresponding to MCU I/O
PA5 (pin 21) or PB13 (pin 34) depending on the STM32target.
- When the I/O is HIGH value, the LED is on.
- When the I/O is LOW, the LED is off.
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
events as follows when the red LED (PE24) is available:
SYMBOL Meaning LD2
------------------- ----------------------- -----------
LED_STARTED NuttX has been started OFF
LED_HEAPALLOCATE Heap has been allocated OFF
LED_IRQSENABLED Interrupts enabled OFF
LED_STACKCREATED Idle stack created ON
LED_INIRQ In an interrupt No change
LED_SIGNAL In a signal handler No change
LED_ASSERTION An assertion failed No change
LED_PANIC The system has crashed Blinking
LED_IDLE MCU is is sleep mode Not used
Thus if LD2, NuttX has successfully booted and is, apparently, running
normally. If LD2 is flashing at approximately 2Hz, then a fatal error
has been detected and the system has halted.
Serial Consoles
===============
USART1
------
Pins and Connectors:
RXD: PA11 CN10 pin 14
PB7 CN7 pin 21
TXD: PA10 CN9 pin 3, CN10 pin 33
PB6 CN5 pin 3, CN10 pin 17
NOTE: You may need to edit the include/board.h to select different USART1
pin selections.
TTL to RS-232 converter connection:
Nucleo CN10 STM32F4x1RE
----------- ------------
Pin 21 PA9 USART1_RX *Warning you make need to reverse RX/TX on
Pin 33 PA10 USART1_TX some RS-232 converters
Pin 20 GND
Pin 8 U5V
To configure USART1 as the console:
CONFIG_STM32_USART1=y
CONFIG_USART1_SERIALDRIVER=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART1_RXBUFSIZE=256
CONFIG_USART1_TXBUFSIZE=256
CONFIG_USART1_BAUD=115200
CONFIG_USART1_BITS=8
CONFIG_USART1_PARITY=0
CONFIG_USART1_2STOP=0
USART2
-----
Pins and Connectors:
RXD: PA3 CN9 pin 1 (See SB13, 14, 62, 63). CN10 pin 37
PD6
TXD: PA2 CN9 pin 2(See SB13, 14, 62, 63). CN10 pin 35
PD5
UART2 is the default in all of these configurations.
TTL to RS-232 converter connection:
Nucleo CN9 STM32F4x1RE
----------- ------------
Pin 1 PA3 USART2_RX *Warning you make need to reverse RX/TX on
Pin 2 PA2 USART2_TX some RS-232 converters
Solder Bridges. This configuration requires:
- SB62 and SB63 Closed: PA2 and PA3 on STM32 MCU are connected to D1 and D0
(pin 7 and pin 8) on Arduino connector CN9 and ST Morpho connector CN10
as USART signals. Thus SB13 and SB14 should be OFF.
- SB13 and SB14 Open: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are
disconnected to PA3 and PA2 on STM32 MCU.
To configure USART2 as the console:
CONFIG_STM32_USART2=y
CONFIG_USART2_SERIALDRIVER=y
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_RXBUFSIZE=256
CONFIG_USART2_TXBUFSIZE=256
CONFIG_USART2_BAUD=115200
CONFIG_USART2_BITS=8
CONFIG_USART2_PARITY=0
CONFIG_USART2_2STOP=0
USART6
------
Pins and Connectors:
RXD: PC7 CN5 pin2, CN10 pin 19
PA12 CN10, pin 12
TXD: PC6 CN10, pin 4
PA11 CN10, pin 14
To configure USART6 as the console:
CONFIG_STM32_USART6=y
CONFIG_USART6_SERIALDRIVER=y
CONFIG_USART6_SERIAL_CONSOLE=y
CONFIG_USART6_RXBUFSIZE=256
CONFIG_USART6_TXBUFSIZE=256
CONFIG_USART6_BAUD=115200
CONFIG_USART6_BITS=8
CONFIG_USART6_PARITY=0
CONFIG_USART6_2STOP=0
Virtual COM Port
----------------
Yet another option is to use UART2 and the USB virtual COM port. This
option may be more convenient for long term development, but is painful
to use during board bring-up.
Solder Bridges. This configuration requires:
- SB62 and SB63 Open: PA2 and PA3 on STM32 MCU are disconnected to D1
and D0 (pin 7 and pin 8) on Arduino connector CN9 and ST Morpho
connector CN10.
- SB13 and SB14 Closed: PA2 and PA3 on STM32F103C8T6 (ST-LINK MCU) are
connected to PA3 and PA2 on STM32 MCU to have USART communication
between them. Thus SB61, SB62 and SB63 should be OFF.
Configuring USART2 is the same as given above.
Question: What BAUD should be configure to interface with the Virtual
COM port? 115200 8N1?
Default
-------
As shipped, SB62 and SB63 are open and SB13 and SB14 closed, so the
virtual COM port is enabled.
Shields
=======
RS-232 from Cutedigi.com
------------------------
Supports a single RS-232 connected via
Nucleo CN9 STM32F4x1RE Cutedigi
----------- ------------ --------
Pin 1 PA3 USART2_RX RXD
Pin 2 PA2 USART2_TX TXD
Support for this shield is enabled by selecting USART2 and configuring
SB13, 14, 62, and 63 as described above under "Serial Consoles"
Itead Joystick Shield
---------------------
See http://imall.iteadstudio.com/im120417014.html for more information
about this joystick.
Itead Joystick Connection:
--------- ----------------- ---------------------------------
ARDUINO ITEAD NUCLEO-F4x1
PIN NAME SIGNAL SIGNAL
--------- ----------------- ---------------------------------
D3 Button E Output PB3
D4 Button D Output PB5
D5 Button C Output PB4
D6 Button B Output PB10
D7 Button A Output PA8
D8 Button F Output PA9
D9 Button G Output PC7
A0 Joystick Y Output PA0 ADC1_0
A1 Joystick X Output PA1 ADC1_1
--------- ----------------- ---------------------------------
All buttons are pulled on the shield. A sensed low value indicates
when the button is pressed.
NOTE: Button F cannot be used with the default USART1 configuration
because PA9 is configured for USART1_RX by default. Use select
different USART1 pins in the board.h file or select a different
USART or select CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS which will
eliminate all but buttons A, B, and C.
Itead Joystick Signal interpretation:
--------- ----------------------- ---------------------------
BUTTON TYPE NUTTX ALIAS
--------- ----------------------- ---------------------------
Button A Large button A JUMP/BUTTON 3
Button B Large button B FIRE/BUTTON 2
Button C Joystick select button SELECT/BUTTON 1
Button D Tiny Button D BUTTON 6
Button E Tiny Button E BUTTON 7
Button F Large Button F BUTTON 4
Button G Large Button G BUTTON 5
--------- ----------------------- ---------------------------
Itead Joystick configuration settings:
System Type -> STM32 Peripheral Support
CONFIG_STM32_ADC1=y : Enable ADC1 driver support
Drivers
CONFIG_ANALOG=y : Should be automatically selected
CONFIG_ADC=y : Should be automatically selected
CONFIG_INPUT=y : Select input device support
CONFIG_AJOYSTICK=y : Select analog joystick support
There is nothing in the configuration that currently uses the joystick.
For testing, you can add the following configuration options to enable the
analog joystick example at apps/examples/ajoystick:
CONFIG_NSH_ARCHINIT=y
CONFIG_EXAMPLES_AJOYSTICK=y
CONFIG_EXAMPLES_AJOYSTICK_DEVNAME="/dev/ajoy0"
CONFIG_EXAMPLES_AJOYSTICK_SIGNO=13
STATUS:
2014-12-04:
- Without ADC DMA support, it is not possible to sample both X and Y
with a single ADC. Right now, only one axis is being converted.
- There is conflicts with some of the Arduino data pins and the
default USART1 configuration. I am currently running with USART1
but with CONFIG_NUCLEO_F401RE_AJOY_MINBUTTONS to eliminate the
conflict.
- Current showstopper: I appear to be getting infinite interrupts as
soon as joystick button interrupts are enabled.
Configurations
==============
knsh:
----
This is identical to the nsh configuration below except that (1) NuttX
is built as a PROTECTED mode, monolithic module and the user applications
are built separately and, as a consequence, (2) some features that are
only availabled in the FLAT build are disabled.
It is recommends to use a special make command; not just 'make' but make
with the following two arguments:
make pass1 pass2
In the normal case (just 'make'), make will attempt to build both user-
and kernel-mode blobs more or less interleaved. That actual works!
However, for me it is very confusing so I prefer the above make command:
Make the user-space binaries first (pass1), then make the kernel-space
binaries (pass2)
NOTES:
1. At the end of the build, there will be several files in the top-level
NuttX build directory:
PASS1:
nuttx_user.elf - The pass1 user-space ELF file
nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig)
User.map - Symbols in the user-space ELF file
PASS2:
nuttx - The pass2 kernel-space ELF file
nuttx.hex - The pass2 Intel HEX file (selected in defconfig)
System.map - Symbols in the kernel-space ELF file
The J-Link programmer will except files in .hex, .mot, .srec, and .bin
formats.
2. Combining .hex files. If you plan to use the .hex files with your
debugger or FLASH utility, then you may need to combine the two hex
files into a single .hex file. Here is how you can do that.
a. The 'tail' of the nuttx.hex file should look something like this
(with my comments added):
$ tail nuttx.hex
# 00, data records
...
:10 9DC0 00 01000000000800006400020100001F0004
:10 9DD0 00 3B005A0078009700B500D400F300110151
:08 9DE0 00 30014E016D0100008D
# 05, Start Linear Address Record
:04 0000 05 0800 0419 D2
# 01, End Of File record
:00 0000 01 FF
Use an editor such as vi to remove the 05 and 01 records.
b. The 'head' of the nuttx_user.hex file should look something like
this (again with my comments added):
$ head nuttx_user.hex
# 04, Extended Linear Address Record
:02 0000 04 0801 F1
# 00, data records
:10 8000 00 BD89 01084C800108C8110208D01102087E
:10 8010 00 0010 00201C1000201C1000203C16002026
:10 8020 00 4D80 01085D80010869800108ED83010829
...
Nothing needs to be done here. The nuttx_user.hex file should
be fine.
c. Combine the edited nuttx.hex and un-edited nuttx_user.hex
file to produce a single combined hex file:
$ cat nuttx.hex nuttx_user.hex >combined.hex
Then use the combined.hex file with the to write the FLASH image.
If you do this a lot, you will probably want to invest a little time
to develop a tool to automate these steps.
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh for the
Nucleo-F401RE board. The Configuration enables the serial interfaces
on UART2. Support for builtin applications is enabled, but in the base
configuration no builtin applications are selected (see NOTES below).
NOTES:
1. This configuration uses the mconf-based configuration tool. To
change this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. By default, this configuration uses the Generic ARM EABI toolchain
for Linux. That can easily be reconfigured, of course.
CONFIG_HOST_LINUX=y : Builds under Linux
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : Generic EABI toolchain for Linux
3. Although the default console is USART2 (which would correspond to
the Virtual COM port) I have done all testing with the console
device configured for USART1 (see instruction above under "Serial
Consoles). I have been using a TTL-to-RS-232 converter.
4. This example has been used to verify the OTGFS functionality. USB is
not enabled in the default configuration but can be enabled with the
following settings:
CONFIG_STM32L4_OTGFS=y
CONFIG_USBDEV=y
CONFIG_USBDEV_SELFPOWERED=y
These will enable the USB CDC/ACM serial device
CONFIG_CDCACM=y
CONFIG_CDCACM_EP0MAXPACKET=64
CONFIG_CDCACM_EPINTIN=1
CONFIG_CDCACM_EPINTIN_FSSIZE=64
CONFIG_CDCACM_EPINTIN_HSSIZE=64
CONFIG_CDCACM_EPBULKOUT=3
CONFIG_CDCACM_EPBULKOUT_FSSIZE=64
CONFIG_CDCACM_EPBULKOUT_HSSIZE=512
CONFIG_CDCACM_EPBULKIN=2
CONFIG_CDCACM_EPBULKIN_FSSIZE=64
CONFIG_CDCACM_EPBULKIN_HSSIZE=512
CONFIG_CDCACM_NRDREQS=4
CONFIG_CDCACM_NWRREQS=4
CONFIG_CDCACM_BULKIN_REQLEN=96
CONFIG_CDCACM_RXBUFSIZE=257
CONFIG_CDCACM_TXBUFSIZE=193
CONFIG_CDCACM_VENDORID=0x0525
CONFIG_CDCACM_PRODUCTID=0xa4a7
CONFIG_CDCACM_VENDORSTR="NuttX"
CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial"
CONFIG_SERIAL_REMOVABLE=y
These will enable the USB serial example at apps/examples/usbserial
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_EXAMPLES_USBSERIAL=y
CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512
CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=y
CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=y
CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=y
CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=y
CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y
Optional USB debug features:
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_USB=y
CONFIG_ARCH_USBDUMP=y
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=128
CONFIG_USBDEV_TRACE_STRINGS=y
CONFIG_USBDEV_TRACE_INITIALIDSET=y
CONFIG_NSH_USBDEV_TRACE=y
CONFIG_NSH_USBDEV_TRACEINIT=y
CONFIG_NSH_USBDEV_TRACECLASS=y
CONFIG_NSH_USBDEV_TRACETRANSFERS=y
CONFIG_NSH_USBDEV_TRACECONTROLLER=y
CONFIG_NSH_USBDEV_TRACEINTERRUPTS=y

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/************************************************************************************
* configs/stm32l4r9ai-disco/include/board.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_BOARD_H
#define __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_BOARD_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include <stm32l4.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
#include <arch/board/stm32l4r9ai-disco-clocking.h>
/* DMA Channel/Stream Selections ****************************************************/
/* Stream selections are arbitrary for now but might become important in the future
* is we set aside more DMA channels/streams.
*/
/* Values defined in arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h */
/* XXX are these used on disco? */
#if 0
#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices * /
#define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices * /
#define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices * /
/* UART RX DMA configurations */
#define DMACHAN_USART1_RX DMACHAN_USART1_RX_2
#endif
/* ADC measurements
* Default is ADC1_IN9 (PA4) connected to STMod+ connector CN1 pin 13.
*/
#define ADC1_MEASURE_CHANNEL 9
#define GPIO_MEASURE_ADC (GPIO_ADC1_IN9)
/* Alternate function pin selections ************************************************/
/* USART1:
* RXD: PB7
* TXD: PA6
*
* these pins are shared with the I2C1, which is used for some onboard
* devices, so I am disabling USART1, however I'm leaving the declarations
* here for documentation for anyone who might want to use it instead of
* those onboard devices.
*/
#if 0
#define GPIO_USART1_RX GPIO_USART1_RX_2 / * PB7 * /
#define GPIO_USART1_TX GPIO_USART1_TX_2 / * PB6 * /
#endif
/* USART2: Connected to STLink Debug via PD5, PD6
* RXD: PD6
* TXD: PD5
*/
#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
/* UART4: Connected to PA0, PA1
* RXD: PA1 -> CN11 D5
* TXD: PA0 -> CN17 A4
*/
#define GPIO_UART4_RX GPIO_UART4_RX_1 /* PA1 */
#define GPIO_UART4_TX GPIO_UART4_TX_1 /* PA0 */
/* I2C
*
* The optional _GPIO configurations allow the I2C driver to manually
* reset the bus to clear stuck slaves. They match the pin configuration,
* but are normally-high GPIOs.
*
* I2C1 connects to devices on the Discovery board, including the
* CS43L22 (addr 0x94) stereo DAC and amplifier. It shares the
* pins with USART1, so that port is disabled so we can access the
* onboard device.
*
*/
#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET)
#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET)
#define GPIO_I2C1_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6)
#define GPIO_I2C1_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7)
/* XXX Is I2C2 used on Disco? */
#if 0
#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET)
#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET)
#define GPIO_I2C2_SCL_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10)
#define GPIO_I2C2_SDA_GPIO \
(GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11)
#endif
/* SPI */
/* XXX is SPI1 used on Disco? */
#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
/* SPI2 is used for several peripherals on the Discovery board, including
* L3GD20 - 3 axis Gyroscope
* LSM303CTR - eCompass, comprising an accelerometer and magnetometer
*/
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_3
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_3
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_3
/* PD7; gyroscope CS */
#define GPIO_SPI_CS_GYRO_OFF \
(GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
GPIO_PORTD | GPIO_PIN7)
#define GPIO_SPI_CS_GYRO \
(GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \
GPIO_OUTPUT_SET | GPIO_PORTD | GPIO_PIN7)
/* PE0; accelerometer CS */
#define GPIO_SPI_CS_ACCEL_OFF \
(GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
GPIO_PORTE | GPIO_PIN0)
#define GPIO_SPI_CS_ACCEL \
(GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \
GPIO_OUTPUT_SET | GPIO_PORTE | GPIO_PIN0)
/* PC0; magnetometer CS */
#define GPIO_SPI_CS_MAGNETO_OFF \
(GPIO_INPUT | GPIO_PULLDOWN | GPIO_SPEED_2MHz | \
GPIO_PORTC | GPIO_PIN0)
#define GPIO_SPI_CS_MAGNETO \
(GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_2MHz | \
GPIO_OUTPUT_SET | GPIO_PORTC | GPIO_PIN0)
/* XXX these will need to be set up when these get implemented:
* PD2 gyro INT1
* PB8 gyro INT2/DRDY
*
* PE1 accel INT
* PC2 magneto DRDY
* PC1 magneto INT
*/
/* LEDs
*
* The STM32L4R9AI-DISCO board provides two user LEDs, LD1 (orange) and LD2 (green).
*
* PB0 is LD1 (orange)
* PH4 is LD2 (green)
* - When the I/O is HIGH value, the LED is on.
* - When the I/O is LOW, the LED is off.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED_RED 0
#define BOARD_LED_GRN 1
#define BOARD_NLEDS 2
/* LED bits for use with board_userled_all() */
#define BOARD_LED_RED_BIT (1 << BOARD_LED_RED)
#define BOARD_LED_GRN_BIT (1 << BOARD_LED_GRN)
/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/stm32_autoleds.c. The LEDs are used to encode
* OS-related events as follows when the red and green LEDs are available:
*
* SYMBOL Meaning BOARD_LED_GRN BOARD_LED_RED
* ------------------- ----------------------- ----------- ------------
* LED_STARTED NuttX has been started
* LED_HEAPALLOCATE Heap has been allocated
* LED_IRQSENABLED Interrupts enabled
* LED_STACKCREATED Idle stack created
* LED_INIRQ In an interrupt
* LED_SIGNAL In a signal handler
* LED_ASSERTION An assertion failed
* LED_PANIC The system has crashed Blinking
* LED_IDLE MCU is is sleep mode ON
*
* Thus if BOARD_LED_GRN, NuttX has successfully booted and is, apparently, running
* normally. If BOARD_LED_RED is flashing at approximately 2Hz, then a fatal error
* has been detected and the system has halted.
*/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 1
#define LED_IRQSENABLED 2
#define LED_STACKCREATED 3
#define LED_INIRQ 4
#define LED_SIGNAL 5
#define LED_ASSERTION 6
#define LED_PANIC 7
#define LED_IDLE 8
/* Buttons
*
* There is a 4 way d-pad 'joystick' with center button
* connected to PA0,1,5,2,3
* C L D R U
*/
#define BUTTON_CENTER 0
#define BUTTON_LEFT 1
#define BUTTON_DOWN 2
#define BUTTON_RIGHT 3
#define BUTTON_UP 4
#define NUM_BUTTONS 5
#define BUTTON_CENTER_BIT (1 << BUTTON_CENTER)
#define BUTTON_LEFT_BIT (1 << BUTTON_LEFT)
#define BUTTON_DOWN_BIT (1 << BUTTON_DOWN)
#define BUTTON_RIGHT_BIT (1 << BUTTON_RIGHT)
#define BUTTON_UP_BIT (1 << BUTTON_UP)
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/************************************************************************************
* Name: stm32l4_board_initialize
*
* Description:
* All STM32L4 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32l4_board_initialize(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_BOARD_H */

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/************************************************************************************
* configs/stm32l4r9ai-disco/include/boardctl.h
*
* Copyright (C) 2016 dev@ziggurat29.com. All rights reserved.
* Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_BOARDCTL_H
#define __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_BOARDCTL_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <sys/boardctl.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define BIOC_ENTER_MEMMAP BOARDIOC_USER+1
#define BIOC_EXIT_MEMMAP BOARDIOC_USER+2
#endif /* __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_BOARDCTL_H */

89
configs/stm32l4r9ai-disco/include/nsh_romfsimg.h Normal file
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unsigned char romfs_img[] = {
0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x01, 0x80,
0x42, 0x56, 0x48, 0x93, 0x4e, 0x53, 0x48, 0x49, 0x6e, 0x69, 0x74, 0x56,
0x6f, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x49,
0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x97,
0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x20,
0x00, 0x00, 0x00, 0x00, 0xd1, 0xd1, 0xff, 0x80, 0x2e, 0x2e, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00,
0x68, 0x2d, 0x96, 0x03, 0x69, 0x6e, 0x69, 0x74, 0x2e, 0x64, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0,
0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0xd1, 0xff, 0xff, 0x00,
0x2e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x6a, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x9a, 0x8d, 0x9c, 0xaa, 0xfc, 0x72, 0x63, 0x53, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x23, 0x20, 0x73, 0x61, 0x6d, 0x70, 0x6c, 0x65, 0x20, 0x72, 0x63, 0x53,
0x20, 0x66, 0x69, 0x6c, 0x65, 0x3b, 0x20, 0x79, 0x6f, 0x75, 0x20, 0x6d,
0x75, 0x73, 0x74, 0x20, 0x72, 0x75, 0x6e, 0x20, 0x74, 0x6f, 0x6f, 0x6c,
0x73, 0x2f, 0x67, 0x65, 0x6e, 0x72, 0x6f, 0x6d, 0x66, 0x73, 0x20, 0x3c,
0x6e, 0x75, 0x74, 0x74, 0x78, 0x20, 0x64, 0x69, 0x72, 0x3e, 0x20, 0x66,
0x72, 0x6f, 0x6d, 0x20, 0x77, 0x69, 0x74, 0x68, 0x69, 0x6e, 0x20, 0x74,
0x68, 0x69, 0x73, 0x0a, 0x23, 0x20, 0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69,
0x6f, 0x6e, 0x20, 0x74, 0x6f, 0x20, 0x63, 0x6f, 0x6e, 0x76, 0x65, 0x72,
0x74, 0x20, 0x74, 0x68, 0x69, 0x73, 0x20, 0x66, 0x69, 0x6c, 0x65, 0x20,
0x74, 0x6f, 0x20, 0x6e, 0x73, 0x68, 0x5f, 0x72, 0x6f, 0x6d, 0x66, 0x73,
0x69, 0x6d, 0x67, 0x2e, 0x68, 0x20, 0x66, 0x6f, 0x72, 0x20, 0x69, 0x6e,
0x63, 0x6c, 0x75, 0x73, 0x69, 0x6f, 0x6e, 0x20, 0x69, 0x6e, 0x20, 0x74,
0x68, 0x65, 0x20, 0x62, 0x75, 0x69, 0x6c, 0x64, 0x0a, 0x0a, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20,
0x00, 0x00, 0x00, 0x00, 0xd1, 0xd1, 0xff, 0xe0, 0x2e, 0x2e, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00
};
unsigned int romfs_img_len = 1024;

3
configs/stm32l4r9ai-disco/include/rcS.template Normal file
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@ -0,0 +1,3 @@
# sample rcS file; you must run tools/genromfs <nuttx dir> from within this
# location to convert this file to nsh_romfsimg.h for inclusion in the build

394
configs/stm32l4r9ai-disco/include/stm32l4r9ai-disco-clocking.h Normal file
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@ -0,0 +1,394 @@
/************************************************************************************
* configs/stm32l4r9ai-disco/include/stm32l4r9ai-disco-clocking.h
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Juha Niskanen <juha.niskanen@haltian.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_STM32L4R9AI_DISCO_CLOCKING_H
#define __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_STM32L4R9AI_DISCO_CLOCKING_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Clocking *************************************************************************/
/* The stm32l4r9ai-disco supports both HSE and LSE crystals. As shipped, the HSE
* crystal is not populated. Therefore the stm32l4r9ai-disco will need to run off the
* 16MHz HSI clock, or the 32khz-synced MSI, unless you install the HSE xtal.
*/
/* HSI - 16 MHz RC factory-trimmed
* LSI - 32 KHz RC
* MSI - variable up to 48 MHz, synchronized to LSE
* HSE - not installed
* LSE - 32.768 kHz installed
*/
#define STM32L4_HSI_FREQUENCY 16000000ul
#define STM32L4_LSI_FREQUENCY 32000
#define STM32L4_LSE_FREQUENCY 32768
#define BOARD_AHB_FREQUENCY 80000000ul
/* XXX there needs to be independent selections for the System Clock Mux and
* the PLL Source Mux; currently System Clock Mux always is PLL, and PLL
* Source Mux is chosen by the following define. This is probably OK in many
* cases, but should be separated to support other power configurations.
*/
#if 0
# define HSI_CLOCK_CONFIG 1 /* HSI-16 clock configuration */
#elif 0
/* Make sure you actually installed one! */
# define HSE_CLOCK_CONFIG 1 /* HSE with 8 MHz xtal */
#else
# define MSI_CLOCK_CONFIG 1 /* MSI @ 4 MHz autotrimmed via LSE */
#endif
#if defined(HSI_CLOCK_CONFIG)
#define STM32L4_BOARD_USEHSI 1
/* Prescaler common to all PLL inputs; will be 1 (XXX source is implicitly
as per comment above HSI) */
#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1)
/* 'main' PLL config; we use this to generate our system clock via the R
* output. We set it up as 16 MHz / 1 * 10 / 2 = 80 MHz
*
* XXX NOTE: currently the main PLL is implicitly turned on and is implicitly
* the system clock; this should be configurable since not all applications may
* want things done this way.
*/
#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(10)
#define STM32L4_PLLCFG_PLLP 0
#undef STM32L4_PLLCFG_PLLP_ENABLED
#define STM32L4_PLLCFG_PLLQ RCC_PLLCFG_PLLQ_2
#define STM32L4_PLLCFG_PLLQ_ENABLED
#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2
#define STM32L4_PLLCFG_PLLR_ENABLED
/* 'SAIPLL1' is used to generate the 48 MHz clock, since we can't
* do that with the main PLL's N value. We set N = 13, and enable
* the Q output (ultimately for CLK48) with /4. So,
* 16 MHz / 1 * 12 / 4 = 48 MHz
*
* XXX NOTE: currently the SAIPLL /must/ be explicitly selected in the
* menuconfig, or else all this is a moot point, and the various 48 MHz
* peripherals will not work (RNG at present). I would suggest removing
* that option from Kconfig altogether, and simply making it an option
* that is selected via a #define here, like all these other params.
*/
#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(12)
#define STM32L4_PLLSAI1CFG_PLLP 0
#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED
#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_4
#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED
#define STM32L4_PLLSAI1CFG_PLLR 0
#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED
/* 'SAIPLL2' is not used in this application */
#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8)
#define STM32L4_PLLSAI2CFG_PLLP 0
#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED
#define STM32L4_PLLSAI2CFG_PLLR 0
#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED
#define STM32L4_SYSCLK_FREQUENCY 80000000ul
/* CLK48 will come from PLLSAI1 (implicitly Q) */
#define STM32L4_USE_CLK48 1
#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1
/* Enable the LSE oscillator, used automatically trim the MSI, and for RTC */
#define STM32L4_USE_LSE 1
/* AHB clock (HCLK) is SYSCLK (80MHz) */
#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY
#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */
/* APB1 clock (PCLK1) is HCLK/1 (80MHz) */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
/* Timers driven from APB1 will be twice PCLK1 */
/* REVISIT : this can be configured */
#define STM32L4_APB1_TIM2_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (2*STM32L4_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK (80MHz) */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
/* The timer clock frequencies are automatically defined by hardware.
* If the APB prescaler equals 1, the timer clock frequencies are set to the
* same frequency as that of the APB domain. Otherwise they are set to twice.
*
* REVISIT : this can be configured
*/
#define STM32L4_APB2_TIM1_CLKIN (STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (STM32L4_PCLK2_FREQUENCY)
#elif defined(HSE_CLOCK_CONFIG)
/* Use the HSE */
#define STM32L4_BOARD_USEHSE 1
/* XXX sysclk mux = pllclk */
/* XXX pll source mux = hse */
/* Prescaler common to all PLL inputs */
#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1)
/* 'main' PLL config; we use this to generate our system clock */
#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(20)
#define STM32L4_PLLCFG_PLLP 0
#undef STM32L4_PLLCFG_PLLP_ENABLED
#define STM32L4_PLLCFG_PLLQ 0
#undef STM32L4_PLLCFG_PLLQ_ENABLED
#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2
#define STM32L4_PLLCFG_PLLR_ENABLED
/* 'SAIPLL1' is used to generate the 48 MHz clock */
#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(12)
#define STM32L4_PLLSAI1CFG_PLLP 0
#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED
#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_2
#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED
#define STM32L4_PLLSAI1CFG_PLLR 0
#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED
/* 'SAIPLL2' is not used in this application */
#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8)
#define STM32L4_PLLSAI2CFG_PLLP 0
#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED
#define STM32L4_PLLSAI2CFG_PLLR 0
#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED
#define STM32L4_SYSCLK_FREQUENCY 80000000ul
/* Enable CLK48; get it from PLLSAI1 */
#define STM32L4_USE_CLK48
#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1
/* Enable LSE (for the RTC) */
#define STM32L4_USE_LSE 1
/* Configure the HCLK divisor (for the AHB bus, core, memory, and DMA */
#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY
#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */
/* Configure the APB1 prescaler */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB1_TIM2_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (STM32L4_PCLK1_FREQUENCY)
/* Configure the APB2 prescaler */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB2_TIM1_CLKIN (STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (STM32L4_PCLK2_FREQUENCY)
#elif defined(MSI_CLOCK_CONFIG)
/* Use the MSI; frequ = 4 MHz; autotrim from LSE */
#define STM32L4_BOARD_USEMSI 1
#define STM32L4_BOARD_MSIRANGE RCC_CR_MSIRANGE_4M
/* XXX sysclk mux = pllclk */
/* XXX pll source mux = msi */
/* Prescaler common to all PLL inputs */
#define STM32L4_PLLCFG_PLLM RCC_PLLCFG_PLLM(1)
/* 'main' PLL config; we use this to generate our system clock */
#define STM32L4_PLLCFG_PLLN RCC_PLLCFG_PLLN(40)
#define STM32L4_PLLCFG_PLLP 0
#undef STM32L4_PLLCFG_PLLP_ENABLED
#define STM32L4_PLLCFG_PLLQ 0
#undef STM32L4_PLLCFG_PLLQ_ENABLED
#define STM32L4_PLLCFG_PLLR RCC_PLLCFG_PLLR_2
#define STM32L4_PLLCFG_PLLR_ENABLED
/* 'SAIPLL1' is used to generate the 48 MHz clock */
#define STM32L4_PLLSAI1CFG_PLLN RCC_PLLSAI1CFG_PLLN(24)
#define STM32L4_PLLSAI1CFG_PLLP 0
#undef STM32L4_PLLSAI1CFG_PLLP_ENABLED
#define STM32L4_PLLSAI1CFG_PLLQ RCC_PLLSAI1CFG_PLLQ_2
#define STM32L4_PLLSAI1CFG_PLLQ_ENABLED
#define STM32L4_PLLSAI1CFG_PLLR 0
#undef STM32L4_PLLSAI1CFG_PLLR_ENABLED
/* 'SAIPLL2' is not used in this application */
#define STM32L4_PLLSAI2CFG_PLLN RCC_PLLSAI2CFG_PLLN(8)
#define STM32L4_PLLSAI2CFG_PLLP 0
#undef STM32L4_PLLSAI2CFG_PLLP_ENABLED
#define STM32L4_PLLSAI2CFG_PLLR 0
#undef STM32L4_PLLSAI2CFG_PLLR_ENABLED
#define STM32L4_SYSCLK_FREQUENCY 80000000ul
/* Enable CLK48; get it from PLLSAI1 */
#define STM32L4_USE_CLK48
#define STM32L4_CLK48_SEL RCC_CCIPR_CLK48SEL_PLLSAI1
/* Enable LSE (for the RTC) */
#define STM32L4_USE_LSE 1
/* Configure the HCLK divisor (for the AHB bus, core, memory, and DMA */
#define STM32L4_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32L4_HCLK_FREQUENCY STM32L4_SYSCLK_FREQUENCY
#define STM32L4_BOARD_HCLK STM32L4_HCLK_FREQUENCY /* Same as above, to satisfy compiler */
/* Configure the APB1 prescaler */
#define STM32L4_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK /* PCLK1 = HCLK / 1 */
#define STM32L4_PCLK1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB1_TIM2_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM3_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM4_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM5_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM6_CLKIN (STM32L4_PCLK1_FREQUENCY)
#define STM32L4_APB1_TIM7_CLKIN (STM32L4_PCLK1_FREQUENCY)
/* Configure the APB2 prescaler */
#define STM32L4_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK / 1 */
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 1)
#define STM32L4_APB2_TIM1_CLKIN (STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (STM32L4_PCLK2_FREQUENCY)
#endif
/* The timer clock frequencies are automatically defined by hardware.
* If the APB prescaler equals 1, the timer clock frequencies are set to the same
* frequency as that of the APB domain. Otherwise they are set to twice.
* Note: TIM1,8,15,16,17 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM3_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM4_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM5_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM6_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM7_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM8_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM15_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM16_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM17_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_LPTIM1_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_LPTIM2_FREQUENCY STM32L4_HCLK_FREQUENCY
/************************************************************************************
* Public Data
************************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_STM32L4R9AI_DISCO_INCLUDE_STM32L4R9AI_DISCO_CLOCKING_H */

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# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="stm32l4r9ai-disco"
CONFIG_ARCH_BOARD_STM32L4R9AI_DISCO=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP_STM32L4=y
CONFIG_ARCH_CHIP_STM32L4R9AI=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_IOCTL=y
CONFIG_BOARDCTL_UNIQUEID=y
CONFIG_BOARDCTL_UNIQUEID_SIZE=12
CONFIG_BOARD_LOOPSPERMSEC=8499
CONFIG_BUILTIN=y
CONFIG_DEV_LOOP=y
CONFIG_DEV_ZERO=y
CONFIG_DISABLE_POLL=y
CONFIG_EXAMPLES_ALARM=y
CONFIG_EXAMPLES_MEDIA=y
CONFIG_EXAMPLES_NSH=y
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_ROMFS=y
CONFIG_FS_TMPFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_MAX_WDOGPARMS=2
CONFIG_MM_REGIONS=3
CONFIG_MTD=y
CONFIG_MTD_PARTITION=y
CONFIG_NFILE_DESCRIPTORS=8
CONFIG_NFILE_STREAMS=8
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_ARCHROMFS=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_MQ_MSGS=4
CONFIG_PREALLOC_TIMERS=4
CONFIG_PREALLOC_WDOGS=8
CONFIG_RAM_SIZE=98304
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_RTC_ALARM=y
CONFIG_RTC_DATETIME=y
CONFIG_RTC_DRIVER=y
CONFIG_RTC_IOCTL=y
CONFIG_RTC_NALARMS=2
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_SPI=y
CONFIG_STM32L4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32L4_PWR=y
CONFIG_STM32L4_RNG=y
CONFIG_STM32L4_RTC=y
CONFIG_STM32L4_SAI1PLL=y
CONFIG_STM32L4_SRAM2_HEAP=y
CONFIG_STM32L4_UART4=y
CONFIG_STM32L4_USART2=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_UART4_BAUD=2000000
CONFIG_UART4_RXBUFSIZE=512
CONFIG_UART4_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WDOG_INTRESERVE=1

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############################################################################
# configs/stm32l4r9ai-disco/scripts/Make.defs
#
# Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved.
# Author: dev@ziggurat29.com
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = stm32l4r9ai-disco.ld
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
STRIP = $(CROSSDEV)strip --strip-unneeded
AR = $(ARCROSSDEV)ar rcs
NM = $(ARCROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
LDFLAGS += -Map=${TOPDIR}/nuttx.map
#CFLAGS += -Wa,-adhln
#CXXFLAGS += -Wa,-adhln
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

109
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/****************************************************************************
* configs/stm32l4r9ai-disco/scripts/kernel-space.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab : {
*(.ARM.extab*)
} > kflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

101
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/****************************************************************************
* configs/stm32l4r9ai-disco/scripts/memory.ld
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32L4R9AI has 2048Kb of FLASH beginning at address 0x0800:0000,
* 192Kb of SRAM beginning at address 0x2000:0000, and 64Kb of SRAM2 beginning
* at address 0x1000:0000, and 384Kb of SRAM3 at address 0x2004:0000.
*
* The SRAM2 has special properties (e.g. parity check, separate power domain for
* retention in low power modes, write protection). It is also aliased at address
* 0x2003:0000 to be contiguous with SRAM1 and SRAM3.
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 where
* the code expects to begin execution by jumping to the entry point in the
* 0x0800:0000 address range.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
* should fit into 64KB and, of course, can be optimized as needed (See
* also configs/stm32f4discovery/scripts/kernel-space.ld). Allowing the
* additional does permit addition debug instrumentation to be added to the
* kernel space without overflowing the partition.
*
* Alignment of the user space FLASH partition is also a critical factor:
* The user space FLASH partition will be spanned with a single region of
* size 2**n bytes. The alignment of the user-space region must be the same.
* As a consequence, as the user-space increases in size, the alignmment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 96KB SRAM region is as follows:
*
* 0x20000 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x20000 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x20000 2000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* 0x20000 4000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20001 8000: End+1 of CPU RAM
*/
MEMORY
{
/* 1024Kb FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
/* 96Kb of contiguous SRAM */
ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
usram (rwx) : ORIGIN = 0x20001000, LENGTH = 8K
xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 80K
}

128
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/****************************************************************************
* configs/stm32l4r9ai-disco/scripts/stm32l4r9ai-disco.ld
*
* Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Sebastien Lorquet <sebastien@lorquet.fr>
* Juha Niskanen <juha.niskanen@haltian.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The STM32L4R9AI has 2048Kb of FLASH beginning at address 0x0800:0000,
* 192Kb of SRAM beginning at address 0x2000:0000, and 64Kb of SRAM2 beginning
* at address 0x1000:0000, and 384Kb of SRAM3 at address 0x2004:0000.
*
* The SRAM2 has special properties (e.g. parity check, separate power domain for
* retention in low power modes, write protection). It is also aliased at address
* 0x2003:0000 to be contiguous with SRAM1 and SRAM3.
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 where
* the code expects to begin execution by jumping to the entry point in the
* 0x0800:0000 address range.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
sram2 (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
sram3 (rwx) : ORIGIN = 0x20040000, LENGTH = 384K
}
OUTPUT_ARCH(arm)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32L4R9AI has 192Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

111
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/****************************************************************************
* configs/stm32l4r9ai-disco/scripts/user-space.ld
*
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

2
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/.depend
/Make.dep

71
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############################################################################
# configs/stm32l4r9ai-disco/src/Makefile
#
# Copyright (C) 2014 Gregory Nutt. All rights reserved.
# Author: dev@ziggurat29.com
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
-include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = stm32_boot.c stm32_spi.c
ifeq ($(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG),y)
CSRCS += stm32_clockconfig.c
endif
ifeq ($(CONFIG_STM32L4_OTGFS),y)
CSRCS += stm32_usb.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
ifeq ($(CONFIG_DAC),y)
CSRCS += stm32_dac.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
include $(TOPDIR)/configs/Board.mk

321
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/*****************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_adc.c
*
* Copyright (C) 2017-2018 Haltian Ltd. All rights reserved.
* Authors: Juha Niskanen <juha.niskanen@haltian.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <nuttx/random.h>
#include <nuttx/board.h>
#include <nuttx/fs/fs.h>
#include <nuttx/analog/adc.h>
#include <nuttx/analog/ioctl.h>
#include "stm32l4_gpio.h"
#include "stm32l4_adc.h"
#include "stm32l4r9ai-disco.h"
#include <arch/board/board.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* STM32 chip specific calibration values *******************************************/
/* Voltage used for calibration of internal analog reference voltage (Vrefint) */
#if defined(CONFIG_ARCH_CHIP_STM32F7) \
|| defined(CONFIG_ARCH_CHIP_STM32F4) \
|| defined(CONFIG_ARCH_CHIP_STM32F0)
# define STM32_VREFINT_MVOLTS ((uint32_t)3300)
#elif defined(CONFIG_ARCH_CHIP_STM32L4) || defined(CONFIG_STM32L15XXX)
# define STM32_VREFINT_MVOLTS ((uint32_t)3000)
#endif
/* Internal reference voltage calibration value locations. Taken from
* https://github.com/micropython/micropython/commit/87215a0f0480dd0324a1b9c1d3fc3a5c2806249d
*
* F0 value from DM00115237 Rev 4 p. 19. for STM32F091xB and STM32F091xC
*
* Note: These seems to not vary between MCUs of a given family, but
* should nevertheless be verified from data-sheet when porting this
* file to a new chip.
*/
#if defined(CONFIG_ARCH_CHIP_STM32F7)
# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1ff0f44a))
#elif defined(CONFIG_ARCH_CHIP_STM32F4)
# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1fff7a2a))
#elif defined(CONFIG_ARCH_CHIP_STM32F0)
# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1ffff7ba))
#elif defined(CONFIG_ARCH_CHIP_STM32L4)
# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1fff75aa))
#elif defined(CONFIG_STM32L15XXX)
# define STM32_VREFINT_CAL (*(uint16_t *)((uint32_t)0x1ff800f8))
#endif
/* Internal temperature sensor calibration locations. Taken from
* STM32L4R9AI datasheet.
*/
#if defined(CONFIG_ARCH_CHIP_STM32L4)
/* TS ADC raw data acquired at a temperature of 30 °C (± 5 °C) */
# define STM32_TSENSE_TSCAL1 (*(int16_t *)((uint32_t)0x1fff75a8))
/* TS ADC raw data acquired at a temperature of 130 °C (± 5 °C) */
# define STM32_TSENSE_TSCAL2 (*(int16_t *)((uint32_t)0x1fff75ca))
#endif
/* Configuration ********************************************************************/
/* These are internal to STM32L4 */
#define ADC1_INTERNAL_VREFINT_CHANNEL 0
#define ADC1_INTERNAL_TSENSE_CHANNEL 17
#define ADC1_INTERNAL_VBATDIV3_CHANNEL 18
/* Application specific channel defined in board.h */
/* The number of ADC channels in the conversion list */
#define ADC1_NCHANNELS 4
#if ADC1_NCHANNELS > 1 && !defined(CONFIG_STM32L4_ADC1_DMA)
# warning "Reading multiple channels without DMA might cause overruns!"
#endif
/************************************************************************************
* Private Data
************************************************************************************/
static struct adc_dev_s *g_adc;
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
ADC1_INTERNAL_VREFINT_CHANNEL,
ADC1_INTERNAL_TSENSE_CHANNEL,
ADC1_INTERNAL_VBATDIV3_CHANNEL,
ADC1_MEASURE_CHANNEL,
};
/* Configurations of pins used by each ADC channel */
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
0xffffffffU,
0xffffffffU,
0xffffffffU,
GPIO_MEASURE_ADC,
};
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32l4_adc_measure_voltages
*
* Description:
* Read internal reference voltage, internal VBAT and one external voltage.
*
************************************************************************************/
int stm32l4_adc_measure_voltages(uint32_t *vrefint, uint32_t *vbat, uint32_t *vext)
{
ssize_t nbytes;
struct adc_msg_s sample[ADC1_NCHANNELS] = { 0 };
int nsamples;
int ret;
int fd;
fd = open("/dev/adc0", O_RDONLY);
if (fd < 0)
{
aerr("ERROR: Cannot open ADC converter\n");
ret = fd;
goto out;
}
ret = ioctl(fd, ANIOC_TRIGGER, 0);
if (ret < 0)
{
aerr("ERROR: Cannot trigger ADC conversion\n");
goto out_close;
}
nbytes = nx_read(fd, sample, sizeof(sample));
if (nbytes < 0)
{
if (nbytes != -EINTR)
{
aerr("ERROR: nx_read() failed: %d\n", nbytes);
ret = (int)nbytes;
goto out_close;
}
ainfo("Interrupted read...\n");
goto out_close;
}
else if (nbytes == 0)
{
aerr("ERROR: No data read\n");
ret = ERROR;
goto out_close;
}
nsamples = nbytes / sizeof(struct adc_msg_s);
if (nsamples * sizeof(struct adc_msg_s) != nbytes)
{
ainfo("Read size=%ld is not a multiple of sample size=%d, Ignoring\n",
(long)nbytes, sizeof(struct adc_msg_s));
}
else
{
int i;
int32_t tsense;
ainfo("Sample (nsamples = %d):\n", nsamples);
*vrefint = *vbat = *vext = 0;
for (i = 0; i < nsamples ; i++)
{
ainfo("%d: channel: %d value: %d\n",
i+1, sample[i].am_channel, sample[i].am_data);
/* Add the raw value to entropy pool. */
add_sensor_randomness(sample[i].am_data);
switch (sample[i].am_channel)
{
case ADC1_INTERNAL_VREFINT_CHANNEL:
/* Calculate corrected Vrefint with factory calibration value. */
*vrefint = STM32_VREFINT_MVOLTS * STM32_VREFINT_CAL / sample[i].am_data;
ainfo("VREFINT: %d -> %u mV\n", sample[i].am_data, *vrefint);
break;
case ADC1_INTERNAL_TSENSE_CHANNEL:
/* Calculate final temperature. Sensor precision is ±2 °C,
* so it does not matter much if we use integer type here.
*/
tsense = (110 - 30) * (sample[i].am_data - STM32_TSENSE_TSCAL1)
/ (STM32_TSENSE_TSCAL2 - STM32_TSENSE_TSCAL1) + 30;
ainfo("TSENSE: %d -> %d °C\n", sample[i].am_data, tsense);
UNUSED(tsense);
break;
case ADC1_INTERNAL_VBATDIV3_CHANNEL:
*vbat = 3 * sample[i].am_data;
ainfo("VBAT/3: %d -> %u mV\n", sample[i].am_data, *vbat);
break;
case ADC1_MEASURE_CHANNEL:
*vext = sample[i].am_data;
ainfo("External channel: %d\n", *vext);
break;
default:
aerr("ERROR: ADC got value from unknown channel %d\n", sample[i].am_channel);
break;
}
}
}
out_close:
close(fd);
out:
return ret;
}
/************************************************************************************
* Name: stm32l4_adc_setup
************************************************************************************/
int stm32l4_adc_setup(void)
{
static bool initialized = false;
if (!initialized)
{
#ifdef CONFIG_STM32L4_ADC1
int ret, i;
/* Configure the pins as analog inputs for the selected channels */
for (i = 0; i < ADC1_NCHANNELS; i++)
{
if (g_pinlist[i] != 0xffffffffU)
{
stm32l4_configgpio(g_pinlist[i]);
}
}
/* Call stm32l4_adc_initialize() to get an instance of the ADC interface */
g_adc = stm32l4_adc_initialize(1, g_chanlist, ADC1_NCHANNELS);
if (g_adc == NULL)
{
aerr("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
/* Register the ADC driver at "/dev/adc0" */
ret = adc_register("/dev/adc0", g_adc);
if (ret < 0)
{
aerr("ERROR: adc_register failed: %d\n", ret);
return ret;
}
#endif
initialized = true;
}
return OK;
}

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/****************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_appinit.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <sys/mount.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <debug.h>
#include <string.h>
#include <stdlib.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <stm32l4.h>
#include <stm32l4_uart.h>
#include <stm32l4_uid.h>
#include <arch/board/board.h>
#include <arch/board/boardctl.h>
#include <nuttx/drivers/drivers.h>
#include <nuttx/drivers/ramdisk.h>
#include <nuttx/i2c/i2c_master.h>
#include "stm32l4r9ai-disco.h"
/* Conditional logic in stm32l4r9ai-disco.h will determine if certain features
* are supported. Tests for these features need to be made after including
* stm32l4r9ai-disco.
*/
#ifdef HAVE_RTC_DRIVER
# include <nuttx/timers/rtc.h>
# include "stm32l4_rtc.h"
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initalization logic and the
* matching application logic. The value cold be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_LIB_BOARDCTL
int board_app_initialize(uintptr_t arg)
{
#ifdef HAVE_RTC_DRIVER
FAR struct rtc_lowerhalf_s *rtclower;
#endif
int ret;
(void)ret;
#ifdef HAVE_PROC
/* mount the proc filesystem */
syslog(LOG_INFO, "Mounting procfs to /proc\n");
ret = mount(NULL, CONFIG_NSH_PROC_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR,
"ERROR: Failed to mount the PROC filesystem: %d (%d)\n",
ret, errno);
return ret;
}
#endif
#ifdef HAVE_RTC_DRIVER
/* Instantiate the STM32 lower-half RTC driver */
rtclower = stm32l4_rtc_lowerhalf();
if (!rtclower)
{
serr("ERROR: Failed to instantiate the RTC lower-half driver\n");
return -ENOMEM;
}
else
{
/* Bind the lower half driver and register the combined RTC driver
* as /dev/rtc0
*/
ret = rtc_initialize(0, rtclower);
if (ret < 0)
{
serr("ERROR: Failed to bind/register the RTC driver: %d\n", ret);
return ret;
}
}
#endif
#ifdef HAVE_USBHOST
/* Initialize USB host operation. stm32l4_usbhost_initialize() starts a thread
* will monitor for USB connection and disconnection events.
*/
ret = stm32l4_usbhost_initialize();
if (ret != OK)
{
udbg("ERROR: Failed to initialize USB host: %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_USBMONITOR
/* Start the USB Monitor */
ret = usbmonitor_start(0, NULL);
if (ret != OK)
{
udbg("ERROR: Failed to start USB monitor: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ADC
ainfo("Initializing ADC\n");
(void)stm32l4_adc_setup();
#endif
#ifdef CONFIG_DAC
ainfo("Initializing DAC\n");
(void)stm32l4_dac_setup();
#endif
return OK;
}
#endif /* CONFIG_LIB_BOARDCTL */
#ifdef CONFIG_BOARDCTL_IOCTL
int board_ioctl(unsigned int cmd, uintptr_t arg)
{
switch(cmd)
{
default:
return -EINVAL;
break;
}
return OK;
}
#endif
#if defined(CONFIG_BOARDCTL_UNIQUEID)
int board_uniqueid(uint8_t *uniqueid)
{
if (uniqueid == 0)
{
return -EINVAL;
}
stm32l4_get_uniqueid(uniqueid);
return OK;
}
#endif

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/****************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_autoleds.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32l4.h"
#include "stm32l4r9ai-disco.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LD4,5 GPIO for output */
stm32l4_configgpio(GPIO_LED_RED);
stm32l4_configgpio(GPIO_LED_GRN);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
switch (led)
{
/* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED
*
* Since the LEDs were initially all OFF and since this state only
* occurs one time, nothing need be done.
*/
default:
case LED_STARTED:
case LED_HEAPALLOCATE:
case LED_IRQSENABLED:
break;
/* 1: LED_STACKCREATED
*
* This case will also occur only once.
*/
case LED_STACKCREATED:
break;
/* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION
*
* This case will occur many times.
*/
case LED_INIRQ:
case LED_SIGNAL:
case LED_ASSERTION:
stm32l4_gpiowrite(GPIO_LED_RED, true);
break;
/* 3: LED_PANIC: GPIO_LED_GRN=OFF RX=ON
*
* This case will also occur many times.
*/
case LED_PANIC:
stm32l4_gpiowrite(GPIO_LED_GRN, false);
stm32l4_gpiowrite(GPIO_LED_RED, true);
break;
case LED_IDLE:
stm32l4_gpiowrite(GPIO_LED_GRN, true);
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
/* 0: LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED:
* 1: LED_STACKCREATED:
*
* These cases should never happen.
*/
default:
case LED_STARTED:
case LED_HEAPALLOCATE:
case LED_IRQSENABLED:
case LED_STACKCREATED:
break;
/* 2: LED_INIRQ, LED_SIGNAL, LED_ASSERTION:
*
* This case will occur many times.
*/
case LED_INIRQ:
case LED_SIGNAL:
case LED_ASSERTION:
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
/* 3: LED_PANIC: GPIO_LED_GRN=OFF RX=OFF
*
* This case will also occur many times.
*/
case LED_PANIC:
stm32l4_gpiowrite(GPIO_LED_GRN, false);
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
case LED_IDLE:
stm32l4_gpiowrite(GPIO_LED_GRN, false);
stm32l4_gpiowrite(GPIO_LED_RED, false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */

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/************************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_boot.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Juha Niskanen <juha.niskanen@haltian.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "stm32l4r9ai-disco.h"
/************************************************************************************
* Name: stm32l4_board_initialize
*
* Description:
* All STM32L4 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
*
************************************************************************************/
void stm32l4_board_initialize(void)
{
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
board_autoled_initialize();
#endif
/* Configure SPI chip selects if 1) SP2 is not disabled, and 2) the weak function
* stm32_spiinitialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
stm32l4_spiinitialize();
#endif
#ifdef CONFIG_STM32L4_OTGFS
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build. Presumably either CONFIG_USBDEV or CONFIG_USBHOST is also
* selected.
*/
stm32l4_usbinitialize();
#endif
}
/****************************************************************************
* Name: board_initialize
*
* Description:
* If CONFIG_BOARD_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_initialize(). board_initialize() will be
* called immediately after up_intiialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_INITIALIZE
void board_initialize(void)
{
/* Perform NSH initialization here instead of from the NSH. This
* alternative NSH initialization is necessary when NSH is ran in user-space
* but the initialization function must run in kernel space.
*/
#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT)
board_app_initialize(0);
#endif
}
#endif

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/****************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_buttons.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include <nuttx/power/pm.h>
#include "stm32l4r9ai-disco.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_PM_BUTTON_ACTIVITY
# define CONFIG_PM_BUTTON_ACTIVITY 10
#endif
#define PM_IDLE_DOMAIN 0 /* Revisit */
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* Button Power Management */
#ifdef CONFIG_PM
static void button_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
static int button_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each STM32L476 Discovery button. This array is
* indexed by the BUTTON_* definitions in board.h
*/
static const uint32_t g_buttons[NUM_BUTTONS] =
{
GPIO_BTN_CENTER,
GPIO_BTN_LEFT,
GPIO_BTN_DOWN,
GPIO_BTN_RIGHT,
GPIO_BTN_UP
};
#ifdef CONFIG_PM
static struct pm_callback_s g_buttonscb =
{
.notify = button_pm_notify,
.prepare = button_pm_prepare,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: button_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
****************************************************************************/
#ifdef CONFIG_PM
static void button_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Restore normal buttons operation */
//XXX turn on any GPIO
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - buttons */
//XXX turn on any GPIO
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
//XXX turn off any GPIO
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
//XXX turn off any GPIO
}
break;
default:
{
/* Should not get here */
}
break;
}
}
#endif
/****************************************************************************
* Name: button_handler
*
* Description:
* Handle a button wake-up interrupt
*
****************************************************************************/
/* XXX it's not completely clear to me if this is appropriate; on the one
* hand, it seems to make sense that this would be the module to have the ISR
* for the buttons. On the other hand, it will conflict with things done in
* the buttons example, which registers it's own ISR, and warns if it sees
* one already there. I don't know if 'buttons' is overstepping it's bounds
* in the interst of providing a compact example, (like the I2C app directly
* talking to the bus), or if really that should be an expected thing to do.
*/
#if 0
#ifdef CONFIG_ARCH_IRQBUTTONS
static int button_handler(int irq, FAR void *context, FAR void *arg)
{
#ifdef CONFIG_PM
/* At this point the MCU should have already awakened. The state
* change will be handled in the IDLE loop when the system is re-awakened
* The button interrupt handler should be totally ignorant of the PM
* activities and should report button activity as if nothing
* special happened.
*/
pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY);
#endif
return OK;
}
#endif /* CONFIG_ARCH_IRQBUTTONS */
#endif
/****************************************************************************
* Name: button_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
****************************************************************************/
#ifdef CONFIG_PM
static int button_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
/* No preparation to change power modes is required by the Buttons driver.
* We always accept the state change by returning OK.
*/
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
void board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for all pins.
*/
for (i = 0; i < NUM_BUTTONS; i++)
{
stm32l4_configgpio(g_buttons[i]);
/* It's not clear if this is correct; I think so, but then there are
* conflicts with the 'buttons' sample app.
*/
#if 0
#ifdef CONFIG_ARCH_IRQBUTTONS
(void)board_button_irq(i, button_handler);
#endif
#endif
}
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
int i;
/* Check that state of each key */
for (i = 0; i < NUM_BUTTONS; i++)
{
/* A HIGH value means that the key is pressed. */
bool pressed = stm32l4_gpioread(g_buttons[i]);
/* Accumulate the set of depressed (not released) keys */
if (pressed)
{
ret |= (1 << i);
}
}
#ifdef CONFIG_PM
/* if the user pressed any buttons, notify power management system we are
* active
*/
if (0 != ret)
{
pm_activity(PM_IDLE_DOMAIN, CONFIG_PM_BUTTON_ACTIVITY);
}
#endif
return ret;
}
/************************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources. After
* that, board_buttons() may be called to collect the current state of all
* buttons or board_button_irq() may be called to register button interrupt
* handlers.
*
* After board_button_initialize() has been called, board_buttons() may be called to
* collect the state of all buttons. board_buttons() returns an 32-bit bit set
* with each bit associated with a button. See the BUTTON_*_BIT
* definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See the
* BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
************************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
int ret = -EINVAL;
/* The following should be atomic */
if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
{
ret = stm32l4_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
}
return ret;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */

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/************************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_clockconfig.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <arch/board/board.h>
#include <arch/board/stm32l4r9ai-disco-clocking.h>
#include "up_arch.h"
#include "stm32l4r9ai-disco.h"
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_board_clockconfig
*
* Description:
* I provided this module when I was doing some debugging of a problem I had with
* clocking (it was helpful to do A/B tests). I'm leaving it here in the config
* partially because I expect to have similar problems again as I develop more of
* the various peripheral support, but also because it may become necessary in the
* end for certain project configurations which have specialized clock configurations
* that aren't appropriate to expose in the 'arch' default code.
*
************************************************************************************/
#if defined(CONFIG_ARCH_BOARD_STM32L4_CUSTOM_CLOCKCONFIG)
void stm32l4_board_clockconfig(void)
{
uint32_t regval;
/* Enable Internal High-Speed Clock (HSI) */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_HSION; /* Enable HSI */
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the HSI is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_HSIRDY) == 0)
{
}
/* Set the HCLK source/divider */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_HPRE_MASK;
regval |= STM32L4_RCC_CFGR_HPRE;
putreg32(regval, STM32L4_RCC_CFGR);
/* Set the PCLK2 divider */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_PPRE2_MASK;
regval |= STM32L4_RCC_CFGR_PPRE2;
putreg32(regval, STM32L4_RCC_CFGR);
/* Set the PCLK1 divider */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_PPRE1_MASK;
regval |= STM32L4_RCC_CFGR_PPRE1;
putreg32(regval, STM32L4_RCC_CFGR);
/* Set the PLL source and main divider */
regval = getreg32(STM32L4_RCC_PLLCFG);
/* Configure Main PLL */
/* Set the PLL dividers and multipliers to configure the main PLL */
regval = (STM32L4_PLLCFG_PLLM | STM32L4_PLLCFG_PLLN | STM32L4_PLLCFG_PLLP
| STM32L4_PLLCFG_PLLQ | STM32L4_PLLCFG_PLLR);
regval |= RCC_PLLCFG_PLLQEN;
regval |= RCC_PLLCFG_PLLREN;
/* XXX The choice of clock source to PLL (all three) is independent
* of the sys clock source choice, review the STM32L4_BOARD_USEHSI
* name; probably split it into two, one for PLL source and one
* for sys clock source.
*/
regval |= RCC_PLLCFG_PLLSRC_HSI;
putreg32(regval, STM32L4_RCC_PLLCFG);
/* Enable the main PLL */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_PLLON;
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the PLL is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLRDY) == 0)
{
}
/* Configure SAI1 PLL */
regval = getreg32(STM32L4_RCC_PLLSAI1CFG);
/* Set the PLL dividers and multipliers to configure the SAI1 PLL */
regval = (STM32L4_PLLSAI1CFG_PLLN | STM32L4_PLLSAI1CFG_PLLP |
STM32L4_PLLSAI1CFG_PLLQ | STM32L4_PLLSAI1CFG_PLLR);
regval |= RCC_PLLSAI1CFG_PLLQEN;
putreg32(regval, STM32L4_RCC_PLLSAI1CFG);
/* Enable the SAI1 PLL */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_PLLSAI1ON;
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the PLL is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI1RDY) == 0)
{
}
/* Configure SAI2 PLL */
regval = getreg32(STM32L4_RCC_PLLSAI2CFG);
/* Enable the SAI2 PLL */
/* Set the PLL dividers and multipliers to configure the SAI2 PLL */
regval = (STM32L4_PLLSAI2CFG_PLLN | STM32L4_PLLSAI2CFG_PLLP |
STM32L4_PLLSAI2CFG_PLLR);
putreg32(regval, STM32L4_RCC_PLLSAI2CFG);
/* Enable the SAI1 PLL */
regval = getreg32(STM32L4_RCC_CR);
regval |= RCC_CR_PLLSAI2ON;
putreg32(regval, STM32L4_RCC_CR);
/* Wait until the PLL is ready */
while ((getreg32(STM32L4_RCC_CR) & RCC_CR_PLLSAI2RDY) == 0)
{
}
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
#ifdef CONFIG_STM32L4_FLASH_PREFETCH
regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN |
FLASH_ACR_PRFTEN);
#else
regval = (FLASH_ACR_LATENCY_4 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
#endif
putreg32(regval, STM32L4_FLASH_ACR);
/* Select the main PLL as system clock source */
regval = getreg32(STM32L4_RCC_CFGR);
regval &= ~RCC_CFGR_SW_MASK;
regval |= RCC_CFGR_SW_PLL;
putreg32(regval, STM32L4_RCC_CFGR);
/* Wait until the PLL source is used as the system clock source */
while ((getreg32(STM32L4_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
{
}
#if defined(CONFIG_STM32L4_IWDG) || defined(CONFIG_STM32L4_RTC_LSICLOCK)
/* Low speed internal clock source LSI */
stm32l4_rcc_enablelsi();
#endif
#if defined(STM32L4_USE_LSE)
/* Low speed external clock source LSE
*
* TODO: There is another case where the LSE needs to
* be enabled: if the MCO1 pin selects LSE as source.
*/
stm32l4_pwr_enableclk(true);
stm32l4_rcc_enablelse();
#endif
}
#endif

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/*****************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_dac.c
*
* Copyright (C) 2017-2018 Haltian Ltd. All rights reserved.
* Authors: Juha Niskanen <juha.niskanen@haltian.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/analog/dac.h>
#include "stm32l4_gpio.h"
#include "stm32l4_dac.h"
#include "stm32l4r9ai-disco.h"
#include <arch/board/board.h>
/************************************************************************************
* Private Data
************************************************************************************/
static struct dac_dev_s *g_dac;
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32l4_dac_setup
************************************************************************************/
int stm32l4_dac_setup(void)
{
static bool initialized = false;
if (!initialized)
{
#ifdef CONFIG_STM32L4_DAC1
int ret;
g_dac = stm32l4_dacinitialize(0);
if (g_dac == NULL)
{
aerr("ERROR: Failed to get DAC interface\n");
return -ENODEV;
}
/* Register the DAC driver at "/dev/dac0" */
ret = dac_register("/dev/dac0", g_dac);
if (ret < 0)
{
aerr("ERROR: dac_register failed: %d\n", ret);
return ret;
}
#endif
initialized = true;
}
return OK;
}

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/****************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_spi.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include <up_arch.h>
#include <chip.h>
#include <stm32l4.h>
#include "stm32l4r9ai-disco.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/************************************************************************************
* Public Data
************************************************************************************/
/* Global driver instances */
#ifdef CONFIG_STM32_SPI1
struct spi_dev_s *g_spi1;
#endif
#ifdef CONFIG_STM32_SPI2
struct spi_dev_s *g_spi2;
#endif
#ifdef CONFIG_STM32_SPI3
struct spi_dev_s *g_spi3;
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins.
*
************************************************************************************/
void weak_function stm32_spiinitialize(void)
{
#ifdef CONFIG_STM32_SPI1
/* Configure SPI-based devices on SPI1 */
g_spi1 = up_spiinitialize(1);
if (!g_spi1)
{
spierr("ERROR: [boot] FAILED to initialize SPI port 1\n");
}
#ifdef HAVE_MMCSD
stm32_configgpio(GPIO_SPI_CS_SD_CARD);
#endif
#endif
#ifdef CONFIG_STM32_SPI2
/* Configure SPI-based devices on SPI2 */
g_spi2 = up_spiinitialize(2);
if (!g_spi2)
{
spierr("ERROR: [boot] FAILED to initialize SPI port 2\n");
}
#warning No devices specified on SPI2
#endif
#ifdef CONFIG_STM32_SPI2
/* Configure SPI-based devices on SPI3 */
g_spi2 = up_spiinitialize(3);
if (!g_spi2)
{
spierr("ERROR: [boot] FAILED to initialize SPI port 3\n");
}
#warning No devices specified on SPI3
#endif
}
/****************************************************************************
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including up_spiinitialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to up_spiinitialize() in your low level application
* initialization logic
* 4. The handle returned by up_spiinitialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#ifdef HAVE_MMCSD
if (devid == SPIDEV_MMCSD(0))
{
stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected);
}
#endif
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
/****************************************************************************
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
*
* Input Parameters:
*
* spi - SPI device that controls the bus the device that requires the CMD/
* DATA selection.
* devid - If there are multiple devices on the bus, this selects which one
* to select cmd or data. NOTE: This design restricts, for example,
* one one SPI display per SPI bus.
* cmd - true: select command; false: select data
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return OK;
}
#endif
#endif /* CONFIG_SPI_CMDDATA */
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */

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/************************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_usb.c
*
* Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "up_arch.h"
#include "stm32l4.h"
#include "stm32l4_otgfs.h"
#include "stm32l4r9ai-disco.h"
#ifdef CONFIG_STM32L4_OTGFS
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
# define HAVE_USB 1
#else
# warning "CONFIG_STM32L4_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
# undef HAVE_USB
#endif
#ifndef CONFIG_STM32L4DISCO_USBHOST_PRIO
# define CONFIG_STM32L4DISCO_USBHOST_PRIO 100
#endif
#ifndef CONFIG_STM32L4DISCO_USBHOST_STACKSIZE
# define CONFIG_STM32L4DISCO_USBHOST_STACKSIZE 1024
#endif
/************************************************************************************
* Private Data
************************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/************************************************************************************
* Private Functions
************************************************************************************/
/************************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
************************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uvdbg("Running\n");
for (;;)
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uvdbg("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
(void)CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32l4_usbinitialize
*
* Description:
* Called from stm32l4_usbinitialize very early in initialization to setup USB-related
* GPIO pins for the STM32L4Discovery board.
*
************************************************************************************/
void stm32l4_usbinitialize(void)
{
/* The OTG FS has an internal soft pull-up. No GPIO configuration is required */
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Over current GPIOs */
#ifdef CONFIG_STM32L4_OTGFS
stm32l4_configgpio(GPIO_OTGFS_VBUS);
stm32l4_configgpio(GPIO_OTGFS_PWRON);
stm32l4_configgpio(GPIO_OTGFS_OVER);
#endif
}
/***********************************************************************************
* Name: stm32l4_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
int stm32l4_usbhost_initialize(void)
{
int pid;
#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \
defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
int ret;
#endif
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uvdbg("Register class drivers\n");
#ifdef CONFIG_USBHOST_HUB
/* Initialize USB hub class support */
ret = usbhost_hub_initialize();
if (ret < 0)
{
udbg("ERROR: usbhost_hub_initialize failed: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
udbg("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
udbg("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Initialize the HID keyboard class */
ret = usbhost_kbdinit();
if (ret != OK)
{
udbg("Failed to register the HID keyboard class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
udbg("Failed to register the HID mouse class\n");
}
#endif
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_usbconn = stm32l4_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uvdbg("Start usbhost_waiter\n");
pid = kthread_create("usbhost", CONFIG_STM32L4DISCO_USBHOST_PRIO,
CONFIG_STM32L4DISCO_USBHOST_STACKSIZE,
(main_t)usbhost_waiter, (FAR char * const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/***********************************************************************************
* Name: stm32l4_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided be
* each platform that implements the STM32 OTG FS host interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
* or, if 5 V are available on the application board, a basic power switch, must
* be added externally to drive the 5 V VBUS line. The external charge pump can
* be driven by any GPIO output. When the application decides to power on VBUS
* using the chosen GPIO, it must also set the port power bit in the host port
* control and status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port, and the core
* clears this bit on an over current condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
***********************************************************************************/
#ifdef CONFIG_USBHOST
void stm32l4_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
if (enable)
{
/* Enable the Power Switch by driving the enable pin low */
stm32l4_gpiowrite(GPIO_OTGFS_PWRON, false);
}
else
{
/* Disable the Power Switch by driving the enable pin high */
stm32l4_gpiowrite(GPIO_OTGFS_PWRON, true);
}
}
#endif
/************************************************************************************
* Name: stm32l4_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an over current condition is
* detected.
*
* Input Parameters:
* handler - New over current interrupt handler
*
* Returned Value:
* Old over current interrupt handler
*
************************************************************************************/
#ifdef CONFIG_USBHOST
xcpt_t stm32l4_setup_overcurrent(xcpt_t handler)
{
(void)stm32l4_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, NULL);
return NULL;
}
#endif
/************************************************************************************
* Name: stm32l4_usbsuspend
*
* Description:
* Board logic must provide the stm32l4_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
*
************************************************************************************/
#ifdef CONFIG_USBDEV
void stm32l4_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32L4_OTGFS */

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/****************************************************************************
* configs/stm32l4r9ai-disco/src/stm32_userleds.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/power/pm.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "stm32l4.h"
#include "stm32l4r9ai-disco.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* LED Power Management */
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
static int led_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_PM
static struct pm_callback_s g_ledscb =
{
.notify = led_pm_notify,
.prepare = led_pm_prepare,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: led_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
****************************************************************************/
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Restore normal LEDs operation */
//stm32l4_gpiowrite(GPIO_LED_RED, (ledset & BOARD_LED_RED_BIT) != 0);
//stm32l4_gpiowrite(GPIO_LED_GRN, (ledset & BOARD_LED_GRN_BIT) != 0);
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - Turn leds off */
stm32l4_gpiowrite(GPIO_LED_RED, 0);
stm32l4_gpiowrite(GPIO_LED_GRN, 0);
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
stm32l4_gpiowrite(GPIO_LED_RED, 0);
stm32l4_gpiowrite(GPIO_LED_GRN, 0);
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
stm32l4_gpiowrite(GPIO_LED_RED, 0);
stm32l4_gpiowrite(GPIO_LED_GRN, 0);
}
break;
default:
{
/* Should not get here */
}
break;
}
}
#endif
/****************************************************************************
* Name: led_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
****************************************************************************/
#ifdef CONFIG_PM
static int led_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
/* No preparation to change power modes is required by the LEDs driver.
* We always accept the state change by returning OK.
*/
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
void board_userled_initialize(void)
{
/* Configure LD4,5 GPIO for output */
stm32l4_configgpio(GPIO_LED_RED);
stm32l4_configgpio(GPIO_LED_GRN);
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
switch (led)
{
case BOARD_LED_RED:
stm32l4_gpiowrite(GPIO_LED_RED, ledon);
break;
case BOARD_LED_GRN:
stm32l4_gpiowrite(GPIO_LED_GRN, ledon);
break;
}
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint8_t ledset)
{
stm32l4_gpiowrite(GPIO_LED_RED, (ledset & BOARD_LED_RED_BIT) != 0);
stm32l4_gpiowrite(GPIO_LED_GRN, (ledset & BOARD_LED_GRN_BIT) != 0);
}
/****************************************************************************
* Name: stm32_led_pminitialize
****************************************************************************/
#ifdef CONFIG_PM
void stm32_led_pminitialize(void)
{
/* Register to receive power management callbacks */
int ret = pm_register(&g_ledscb);
DEBUGASSERT(ret == OK);
UNUSED(ret);
}
#endif /* CONFIG_PM */
#endif /* !CONFIG_ARCH_LEDS */

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/************************************************************************************
* configs/stm32l476vg-disco/src/stm32l476vg-disco.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Authors: Frank Bennett
* Gregory Nutt <gnutt@nuttx.org>
* Sebastien Lorquet <sebastien@lorquet.fr>
* dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __CONFIGS_STM32L4R9AI_DISCO_SRC_STM32L4R9AI_DISCO_H
#define __CONFIGS_STM32L4R9AI_DISCO_SRC_STM32L4R9AI_DISCO_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
#define HAVE_PROC 1
#define HAVE_RTC_DRIVER 1
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_USBMONITOR 1
#if !defined(CONFIG_FS_PROCFS)
# undef HAVE_PROC
#endif
#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT)
# warning Mountpoints disabled. No procfs support
# undef HAVE_PROC
#endif
/* Check if we can support the RTC driver */
#if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER)
# undef HAVE_RTC_DRIVER
#endif
/* This is the on-chip progmem memroy driver minor number */
#define PROGMEM_MTD_MINOR 1
/* Can't support USB host or device features if USB OTG FS is not enabled */
#ifndef CONFIG_STM32L4_OTGFS
# undef HAVE_USBDEV
# undef HAVE_USBHOST
# undef HAVE_USBMONITOR
#endif
/* Can't support USB device monitor if USB device is not enabled */
#ifndef CONFIG_USBDEV
# undef HAVE_USBDEV
# undef HAVE_USBMONITOR
#endif
/* Can't support USB host is USB host is not enabled */
#ifndef CONFIG_USBHOST
# undef HAVE_USBHOST
#endif
/* Check if we should enable the USB monitor before starting NSH */
#if !defined(CONFIG_USBDEV_TRACE) || !defined(CONFIG_SYSTEM_USBMONITOR)
# undef HAVE_USBMONITOR
#endif
/* USB OTG FS
*
* PA9 OTG_FS_VBUS VBUS sensing
* PB13 OTG_FS_PowerSwitchOn
* PB14 OTG_FS_Overcurrent
*/
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13)
#ifdef CONFIG_USBHOST
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
GPIO_PORTB|GPIO_PIN14)
#else
# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14)
#endif
/* LED.
* LD1: the orange LED on PB0
* LD2: the green LED on PH4
*
* - When the I/O is HIGH value, the LED is on.
* - When the I/O is LOW, the LED is off.
*/
#define GPIO_LED_RED \
(GPIO_PORTB | GPIO_PIN0 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \
GPIO_PULLUP | GPIO_SPEED_50MHz)
#define GPIO_LED_GRN \
(GPIO_PORTH | GPIO_PIN4 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PUSHPULL | \
GPIO_PULLUP | GPIO_SPEED_50MHz)
/* Buttons
*
* There is a 4 way d-pad 'joystick' with center button
* connected to PC13 and others to PB4,3,2,1
* C L D R U
*/
#define MIN_IRQBUTTON BUTTON_CENTER
#define MAX_IRQBUTTON BUTTON_UP
#define NUM_IRQBUTTONS 5
#define GPIO_BTN_CENTER \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
#define GPIO_BTN_LEFT \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTB | GPIO_PIN4)
#define GPIO_BTN_DOWN \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTB | GPIO_PIN2)
#define GPIO_BTN_RIGHT \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTB | GPIO_PIN3)
#define GPIO_BTN_UP \
(GPIO_INPUT |GPIO_PULLDOWN |GPIO_EXTI | GPIO_PORTB | GPIO_PIN1)
/* SPI1 off */
/* XXX is this used on disco? */
#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN15)
#define GPIO_SPI1_MISO_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN14)
#define GPIO_SPI1_SCK_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN13)
#define GPIO_SPI1_NSS_OFF (GPIO_INPUT | GPIO_PULLDOWN | \
GPIO_PORTE | GPIO_PIN12)
/* Devices on the onboard I2C bus. */
#define DISCO_I2C_OBDEV_DSI 0x70
#define DISCO_I2C_OBDEV_CS43L22 0x94
#define DISCO_I2C_OBDEV_CAMERA 0x60
#define DISCO_I2C_OBDEV_MFX_V3 0x84
/************************************************************************************
* Public Data
************************************************************************************/
/* Global driver instances */
#ifdef CONFIG_STM32_SPI1
extern struct spi_dev_s *g_spi1;
#endif
#ifdef CONFIG_STM32_SPI2
extern struct spi_dev_s *g_spi2;
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
/************************************************************************************
* Name: stm32l4_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
************************************************************************************/
int stm32l4_adc_setup(void);
/************************************************************************************
* Name: stm32l4_adc_measure_voltages
*
* Description:
* Read internal reference voltage, internal VBAT and one external voltage.
*
************************************************************************************/
int stm32l4_adc_measure_voltages(uint32_t *vrefint, uint32_t *vbat, uint32_t *vext);
/************************************************************************************
* Name: stm32l4_dac_setup
*
* Description:
* Initialize DAC and register the DAC driver.
*
************************************************************************************/
int stm32l4_dac_setup(void);
/************************************************************************************
* Name: stm32_spiinitialize
*
* Description:
* Called to configure SPI chip select GPIO pins.
*
************************************************************************************/
void stm32_spiinitialize(void);
/************************************************************************************
* Name: stm32l4_usbinitialize
*
* Description:
* Called to setup USB-related GPIO pins.
*
************************************************************************************/
void stm32l4_usbinitialize(void);
#endif /* __CONFIGS_STM32L4R9AI_DISCO_SRC_STM32L4R9AI_DISCO_H */