diff --git a/arch/arm/src/cxd56xx/cxd56_gnss.c b/arch/arm/src/cxd56xx/cxd56_gnss.c index a5c809f6d1..dba45bcb4f 100644 --- a/arch/arm/src/cxd56xx/cxd56_gnss.c +++ b/arch/arm/src/cxd56xx/cxd56_gnss.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/cxd56xx/cxd56_gnss.c * - * Copyright 2018,2019 Sony Semiconductor Solutions Corporation + * Copyright 2018, 2019 Sony Semiconductor Solutions Corporation * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -48,11 +48,14 @@ #include #include -#include #include +#include +#include #include + #include #include + #include "cxd56_gnss_api.h" #include "cxd56_cpu1signal.h" #include "cxd56_gnss.h" @@ -403,7 +406,7 @@ static int cxd56_gnss_start(FAR struct file *filep, unsigned long arg) { /* GNSS requires stable RTC */ - usleep(100 * 1000); + nxsig_usleep(100 * 1000); } ret = cxd56_gnss_cpufifo_api(filep, CXD56_GNSS_GD_GNSS_START, @@ -1311,7 +1314,7 @@ static int cxd56_gnss_start_test(FAR struct file *filep, unsigned long arg) { /* GNSS requires stable RTC */ - usleep(100 * 1000); + nxsig_usleep(100 * 1000); } /* set parameter */ diff --git a/arch/arm/src/cxd56xx/cxd56_sdhci.c b/arch/arm/src/cxd56xx/cxd56_sdhci.c index 94949533be..d991b96ce6 100644 --- a/arch/arm/src/cxd56xx/cxd56_sdhci.c +++ b/arch/arm/src/cxd56xx/cxd56_sdhci.c @@ -53,12 +53,13 @@ #include #include #include +#include #include #include #include #include - #include + #include #include "chip.h" @@ -4305,10 +4306,12 @@ static int cxd56_sdio_initialize(struct cxd56_sdiodev_s *priv) { cxd56_sdio_recvshort(&priv->dev, SDIO_CMD5, &response); } - usleep(4000); + + nxsig_usleep(4000); } while ((response == 0xffffffff) || ((response & 0x80000000) == 0)); + mcinfo("response = 0x%x, card is ready(MSB=1)\n", response); priv->sc.func_num = SDIO_OCR_NUM_FUNCTIONS(response) + 1; } @@ -4642,7 +4645,8 @@ void cxd56_sdhci_mediachange(FAR struct sdio_dev_s *dev) { break; } - usleep(100000); + + nxsig_usleep(100000); timeout -= 100000; } } diff --git a/arch/arm/src/lc823450/lc823450_i2s.c b/arch/arm/src/lc823450/lc823450_i2s.c index 9607f9ae6a..bfa63d8dde 100644 --- a/arch/arm/src/lc823450/lc823450_i2s.c +++ b/arch/arm/src/lc823450/lc823450_i2s.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/lc823450/lc823450_i2s.c * - * Copyright 2017,2018 Sony Video & Sound Products Inc. + * Copyright 2017, 2018 Sony Video & Sound Products Inc. * Author: Masayuki Ishikawa * * Redistribution and use in source and binary forms, with or without @@ -41,21 +41,17 @@ #include #include -#include #include #include #include #include +#include #include #include #include #include -#ifdef CONFIG_SMP -# include -#endif - #include "up_arch.h" #include "lc823450_dma.h" #include "lc823450_i2s.h" @@ -303,7 +299,7 @@ static void _setup_audio_pll(uint32_t freq) /* TODO: Wait */ - usleep(50 * 1000); + nxsig_usleep(50 * 1000); /* Switch to the PLL */ diff --git a/arch/arm/src/lc823450/lc823450_ipl2.c b/arch/arm/src/lc823450/lc823450_ipl2.c index 79db920c0f..8d528b973c 100644 --- a/arch/arm/src/lc823450/lc823450_ipl2.c +++ b/arch/arm/src/lc823450/lc823450_ipl2.c @@ -40,19 +40,6 @@ ****************************************************************************/ #include -#include - -#ifdef CONFIG_FS_EVFAT -# include -#endif - -#include -#include -#include - -#ifdef CONFIG_I2C -# include -#endif #include #include @@ -66,6 +53,21 @@ #include #include +#include +#include + +#ifdef CONFIG_FS_EVFAT +# include +#endif + +#include +#include +#include + +#ifdef CONFIG_I2C +# include +#endif + #ifdef CONFIG_LASTKMSG # include #endif /* CONFIG_LASTKMSG */ @@ -371,7 +373,7 @@ static int check_forceusbboot(void) modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_ADC_CLKEN); modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_ADC_RSTB); - usleep(10000); + nxsig_usleep(10000); /* start ADC0,1 */ @@ -430,7 +432,7 @@ static void sysreset(void) { /* workaround to flush eMMC cache */ - usleep(100000); + nxsig_usleep(100000); up_systemreset(); } @@ -534,7 +536,7 @@ static void chg_disable(void) } else { - usleep(20); + nxsig_usleep(20); } } @@ -581,7 +583,8 @@ static int msc_enable(int forced) usbmsc_uninitialize(handle); return 0; } - usleep(10000); + + nxsig_usleep(10000); } #else @@ -589,7 +592,7 @@ static int msc_enable(int forced) while (g_update_flag == 0) { - usleep(10000); + nxsig_usleep(10000); } #endif @@ -598,7 +601,7 @@ static int msc_enable(int forced) /* check recovery kernel update */ mount(CONFIG_MTD_CP_DEVPATH, "/mnt/sd0", "evfat", 0, NULL); - usleep(10000); + nxsig_usleep(10000); /* recovery kernel install from UPG.img */ @@ -671,7 +674,7 @@ void check_lastkmsg(void) /* XXX: workaround for logfile size = 0 */ - usleep(100000); + nxsig_usleep(100000); } #endif /* CONFIG_LASTKMSG */ @@ -740,7 +743,7 @@ int ipl2_main(int argc, char *argv[]) /* check recovery kernel update */ mount(CONFIG_MTD_CP_DEVPATH, "/mnt/sd0", "evfat", 0, NULL); - usleep(10000); + nxsig_usleep(10000); /* recovery kernel install from UPG.img */ diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c index 003eba909a..ac1e39f303 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c @@ -54,6 +54,7 @@ #include #include #include +#include #include #include #include @@ -2741,7 +2742,7 @@ static inline int lpc17_40_phyinit(struct lpc17_40_driver_s *priv) while ((lpc17_40_phyread(phyaddr, MII_DP83848C_STS) & 0x0001) == 0) { - usleep(40000); + nxsig_usleep(40000); } #endif diff --git a/arch/arm/src/stm32h7/stm32_sdmmc.c b/arch/arm/src/stm32h7/stm32_sdmmc.c index 708a0fdc12..824150a3d8 100644 --- a/arch/arm/src/stm32h7/stm32_sdmmc.c +++ b/arch/arm/src/stm32h7/stm32_sdmmc.c @@ -55,12 +55,13 @@ #include #include #include +#include #include - #include +#include + #include -#include #include "chip.h" #include "up_arch.h" @@ -1779,11 +1780,11 @@ static void stm32_reset(FAR struct sdio_dev_s *dev) regval = getreg32(regaddress); putreg32(regval | restval, regaddress); - usleep(2); + nxsig_usleep(2); putreg32(regval, regaddress); stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_CYCLE); - usleep(1000); + nxsig_usleep(1000); /* Put SDIO registers in their default, reset state */ @@ -1808,7 +1809,7 @@ static void stm32_reset(FAR struct sdio_dev_s *dev) /* Configure the SDIO peripheral */ stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_OFF); - usleep(1000); + nxsig_usleep(1000); stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_ON); stm32_setclkcr(priv, STM32_CLCKCR_INIT);