STR7: Correct some spacing issues
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7dbfae87ec
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4f2119b3f4
@ -108,13 +108,13 @@ void up_decodeirq(uint32_t *regs)
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if (irq < NR_IRQS)
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{
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uint32_t* savestate;
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uint32_t *savestate;
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/* Current regs non-zero indicates that we are processing an interrupt;
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* current_regs is also used to manage interrupt level context switches.
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*/
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savestate = (uint32_t*)current_regs;
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savestate = (uint32_t *)current_regs;
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current_regs = regs;
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/* Acknowledge the interrupt */
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@ -126,14 +126,18 @@
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# define STR71X_UART3_GPIO0_PC2BITS (0)
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#endif
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#define STR71X_UART_GPIO0_MASK (STR71X_UART0_GPIO0_MASK |STR71X_UART1_GPIO0_MASK|\
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STR71X_UART2_GPIO0_MASK |STR71X_UART3_GPIO0_MASK)
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#define STR71X_UART_GPIO0_PC0BITS (STR71X_UART0_GPIO0_PC0BITS|STR71X_UART1_GPIO0_PC0BITS|\
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STR71X_UART2_GPIO0_PC0BITS|STR71X_UART3_GPIO0_PC0BITS)
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#define STR71X_UART_GPIO0_PC1BITS (STR71X_UART0_GPIO0_PC1BITS|STR71X_UART1_GPIO0_PC1BITS|\
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STR71X_UART2_GPIO0_PC1BITS|STR71X_UART3_GPIO0_PC1BITS)
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#define STR71X_UART_GPIO0_PC2BITS (STR71X_UART0_GPIO0_PC2BITS|STR71X_UART1_GPIO0_PC2BITS|\
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STR71X_UART2_GPIO0_PC2BITS|STR71X_UART3_GPIO0_PC2BITS)
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#define STR71X_UART_GPIO0_MASK \
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(STR71X_UART0_GPIO0_MASK | STR71X_UART1_GPIO0_MASK | \
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STR71X_UART2_GPIO0_MASK | STR71X_UART3_GPIO0_MASK)
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#define STR71X_UART_GPIO0_PC0BITS \
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(STR71X_UART0_GPIO0_PC0BITS | STR71X_UART1_GPIO0_PC0BITS | \
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STR71X_UART2_GPIO0_PC0BITS | STR71X_UART3_GPIO0_PC0BITS)
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#define STR71X_UART_GPIO0_PC1BITS \
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(STR71X_UART0_GPIO0_PC1BITS | STR71X_UART1_GPIO0_PC1BITS | \
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STR71X_UART2_GPIO0_PC1BITS | STR71X_UART3_GPIO0_PC1BITS)
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#define STR71X_UART_GPIO0_PC2BITS \
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(STR71X_UART0_GPIO0_PC2BITS | STR71X_UART1_GPIO0_PC2BITS | \
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STR71X_UART2_GPIO0_PC2BITS | STR71X_UART3_GPIO0_PC2BITS)
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/* Select UART parameters for the selected console */
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@ -203,8 +207,9 @@
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# define STR71X_UARTCR_STOP STR71X_UARTCR_STOPBIT10
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#endif
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#define STR71X_UARTCR_VALUE (STR71X_UARTCR_MODE|STR71X_UARTCR_PARITY|STR71X_UARTCR_STOP|\
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STR71X_UARTCR_RUN|STR71X_UARTCR_RXENABLE|STR71X_UARTCR_FIFOENABLE)
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#define STR71X_UARTCR_VALUE \
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(STR71X_UARTCR_MODE | STR71X_UARTCR_PARITY | STR71X_UARTCR_STOP | \
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STR71X_UARTCR_RUN | STR71X_UARTCR_RXENABLE | STR71X_UARTCR_FIFOENABLE)
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/* Calculate BAUD rate from PCLK1:
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*
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@ -157,9 +157,10 @@
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# define APB1EN_HDLC (0)
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#endif
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#define APB1EN_ALL (APB1EN_I2C0|APB1EN_I2C1|APB1EN_UART0|APB1EN_UART1|\
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APB1EN_UART2|APB1EN_UART3|APB1EN_USB|APB1EN_CAN|\
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APB1EN_BSPI0|APB1EN_BSPI1|APB1EN_HDLC)
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#define APB1EN_ALL \
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(APB1EN_I2C0 | APB1EN_I2C1 | APB1EN_UART0 | APB1EN_UART1 | \
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APB1EN_UART2 | APB1EN_UART3 | APB1EN_USB | APB1EN_CAN | \
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APB1EN_BSPI0 | APB1EN_BSPI1 | APB1EN_HDLC)
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/* APB2 Peripherals */
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@ -227,9 +228,10 @@
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#define APB2EN_EIC (0) /* Interrupt controller always enabled */
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#define APB2EN_ALL (APB2EN_XTI|APB2EN_GPIO0|APB2EN_GPIO1|APB2EN_GPIO2|\
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APB2EN_ADC12|APB2EN_CKOUT|APB2EN_TIM0|APB2EN_TIM1|\
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APB2EN_TIM2|APB2EN_TIM3|APB2EN_RTC|APB2EN_EIC)
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#define APB2EN_ALL \
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(APB2EN_XTI | APB2EN_GPIO0 | APB2EN_GPIO1 | APB2EN_GPIO2 | \
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APB2EN_ADC12 | APB2EN_CKOUT | APB2EN_TIM0 | APB2EN_TIM1 | \
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APB2EN_TIM2 | APB2EN_TIM3 | APB2EN_RTC | APB2EN_EIC)
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#if STR71X_PLL1OUT_MUL == 12
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@ -367,8 +369,8 @@ void str71x_prccuinit(void)
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*/
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reg16 = getreg16(STR71X_PCU_PDIVR);
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reg16 &= ~(STR71X_PCUPDIVR_FACT1MASK|STR71X_PCUPDIVR_FACT2MASK);
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reg16 |= (APB1DIV|APB2DIV);
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reg16 &= ~(STR71X_PCUPDIVR_FACT1MASK | STR71X_PCUPDIVR_FACT2MASK);
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reg16 |= (APB1DIV | APB2DIV);
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putreg16(reg16, STR71X_PCU_PDIVR);
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/* Configure the main system clock (MCLK) divider with value from board.h */
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@ -388,9 +390,10 @@ void str71x_prccuinit(void)
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*/
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#if STR71X_CLK2 > 3000000
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putreg32(PLL1MUL|PLL1DIV, STR71X_RCCU_PLL1CR);
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putreg32(PLL1MUL | PLL1DIV, STR71X_RCCU_PLL1CR);
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#else
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putreg32(PLL1MUL|PLL1DIV|STR71X_RCCUPLL1CR_FREFRANGE, STR71X_RCCU_PLL1CR);
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putreg32(PLL1MUL | PLL1DIV | STR71X_RCCUPLL1CR_FREFRANGE,
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STR71X_RCCU_PLL1CR);
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#endif
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/* Wait for the PLL to lock */
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@ -437,8 +440,8 @@ void str71x_prccuinit(void)
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#if defined(CONFIG_STR71X_HDLC) || (defined(CONFIG_STR71X_USB) && defined(STR71X_USBIN_PLL2))
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reg16 = getreg16(STR71X_PCU_PLL2CR);
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reg16 &= ~(STR71X_PCUPPL2CR_MXMASK|STR71X_PCUPPL2CR_DXMASK);
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reg16 |= (PLL2MUL|PLL2DIV);
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reg16 &= ~(STR71X_PCUPPL2CR_MXMASK | STR71X_PCUPPL2CR_DXMASK);
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reg16 |= (PLL2MUL | PLL2DIV);
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/* Set the PLL2 FRQRNG bit according to the PLL2 input frequency */
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@ -510,7 +510,7 @@ static inline void up_waittxnotfull(struct up_dev_s *priv)
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static int up_setup(struct uart_dev_s *dev)
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{
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#ifndef CONFIG_SUPPRESS_UART_CONFIG
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint32_t divisor;
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uint32_t baud;
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uint16_t cr;
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@ -523,7 +523,7 @@ static int up_setup(struct uart_dev_s *dev)
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/* Get mode setting */
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cr = STR71X_UARTCR_RUN|STR71X_UARTCR_RXENABLE|STR71X_UARTCR_FIFOENABLE;
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cr = STR71X_UARTCR_RUN | STR71X_UARTCR_RXENABLE | STR71X_UARTCR_FIFOENABLE;
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if (priv->bits == 7)
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{
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@ -592,7 +592,7 @@ static int up_setup(struct uart_dev_s *dev)
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static void up_shutdown(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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up_disableuartint(priv, NULL);
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}
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@ -613,7 +613,7 @@ static void up_shutdown(struct uart_dev_s *dev)
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static int up_attach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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int ret;
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/* Attach and enable the IRQ */
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@ -621,16 +621,16 @@ static int up_attach(struct uart_dev_s *dev)
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ret = irq_attach(priv->irq, up_interrupt);
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if (ret == OK)
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{
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/* Enable the interrupt (RX and TX interrupts are still disabled
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* in the UART
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*/
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/* Enable the interrupt (RX and TX interrupts are still disabled
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* in the UART
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*/
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up_enable_irq(priv->irq);
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up_enable_irq(priv->irq);
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#ifdef CONFIG_ARCH_IRQPRIO
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/* Set the uart interrupt priority (the default value is one) */
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/* Set the uart interrupt priority (the default value is one) */
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up_prioritize_irq(priv->irq, CONFIG_UART_PRI);
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up_prioritize_irq(priv->irq, CONFIG_UART_PRI);
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#endif
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}
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@ -649,7 +649,7 @@ static int up_attach(struct uart_dev_s *dev)
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static void up_detach(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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up_disable_irq(priv->irq);
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irq_detach(priv->irq);
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}
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@ -706,7 +706,7 @@ static int up_interrupt(int irq, void *context)
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PANIC();
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}
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priv = (struct up_dev_s*)dev->priv;
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priv = (struct up_dev_s *)dev->priv;
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DEBUGASSERT(priv && dev);
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/* Loop until there are no characters to be transferred or,
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@ -727,10 +727,10 @@ static int up_interrupt(int irq, void *context)
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if ((priv->sr & RXAVAILABLE_BITS) != 0 && /* Data available in Rx FIFO */
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(priv->ier & RXENABLE_BITS) != 0) /* Rx FIFO interrupts enabled */
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{
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/* Rx buffer not empty ... process incoming bytes */
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/* Rx buffer not empty ... process incoming bytes */
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uart_recvchars(dev);
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handled = true;
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uart_recvchars(dev);
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handled = true;
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}
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/* Handle outgoing, transmit bytes */
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@ -738,10 +738,10 @@ static int up_interrupt(int irq, void *context)
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if ((priv->sr & STR71X_UARTSR_TF) == 0 && /* Tx FIFO not full */
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(priv->ier & STR71X_UARTIER_THE) != 0) /* Tx Half empty interrupt enabled */
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{
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/* Tx FIFO not full ... process outgoing bytes */
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/* Tx FIFO not full ... process outgoing bytes */
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uart_xmitchars(dev);
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handled = true;
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uart_xmitchars(dev);
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handled = true;
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}
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}
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@ -769,7 +769,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
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case TIOCSERGSTRUCT:
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{
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struct up_dev_s *user = (struct up_dev_s*)arg;
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struct up_dev_s *user = (struct up_dev_s *)arg;
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if (!user)
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{
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ret = -EINVAL;
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@ -802,7 +802,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
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static int up_receive(struct uart_dev_s *dev, uint32_t *status)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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uint16_t rxbufr;
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rxbufr = up_serialin(priv, STR71X_UART_RXBUFR_OFFSET);
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@ -820,7 +820,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
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static void up_rxint(struct uart_dev_s *dev, bool enable)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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if (enable)
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{
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/* Receive an interrupt when the Rx FIFO is half full (or if a timeout
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@ -848,7 +848,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
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static bool up_rxavailable(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & RXAVAILABLE_BITS) != 0);
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}
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@ -862,7 +862,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
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static void up_send(struct uart_dev_s *dev, int ch)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)ch);
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}
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@ -876,7 +876,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
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static void up_txint(struct uart_dev_s *dev, bool enable)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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if (enable)
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{
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/* Set to receive an interrupt when the TX fifo is half emptied */
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@ -904,7 +904,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
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static bool up_txready(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & STR71X_UARTSR_TF) == 0);
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}
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@ -918,7 +918,7 @@ static bool up_txready(struct uart_dev_s *dev)
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static bool up_txempty(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
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return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & STR71X_UARTSR_TE) != 0);
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}
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@ -1005,7 +1005,7 @@ void up_serialinit(void)
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int up_putc(int ch)
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{
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#ifdef HAVE_CONSOLE
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struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
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struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
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uint16_t ier;
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up_disableuartint(priv, &ier);
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