From 4f2119b3f4b538b761d987fb23edd555386520a4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 7 Oct 2015 14:22:01 -0600 Subject: [PATCH] STR7: Correct some spacing issues --- arch/arm/src/str71x/str71x_decodeirq.c | 4 +- arch/arm/src/str71x/str71x_lowputc.c | 25 +++++++----- arch/arm/src/str71x/str71x_prccu.c | 27 +++++++------ arch/arm/src/str71x/str71x_serial.c | 54 +++++++++++++------------- 4 files changed, 59 insertions(+), 51 deletions(-) diff --git a/arch/arm/src/str71x/str71x_decodeirq.c b/arch/arm/src/str71x/str71x_decodeirq.c index a87f5f059b..363590f266 100644 --- a/arch/arm/src/str71x/str71x_decodeirq.c +++ b/arch/arm/src/str71x/str71x_decodeirq.c @@ -108,13 +108,13 @@ void up_decodeirq(uint32_t *regs) if (irq < NR_IRQS) { - uint32_t* savestate; + uint32_t *savestate; /* Current regs non-zero indicates that we are processing an interrupt; * current_regs is also used to manage interrupt level context switches. */ - savestate = (uint32_t*)current_regs; + savestate = (uint32_t *)current_regs; current_regs = regs; /* Acknowledge the interrupt */ diff --git a/arch/arm/src/str71x/str71x_lowputc.c b/arch/arm/src/str71x/str71x_lowputc.c index 5262894e2d..e80429576f 100644 --- a/arch/arm/src/str71x/str71x_lowputc.c +++ b/arch/arm/src/str71x/str71x_lowputc.c @@ -126,14 +126,18 @@ # define STR71X_UART3_GPIO0_PC2BITS (0) #endif -#define STR71X_UART_GPIO0_MASK (STR71X_UART0_GPIO0_MASK |STR71X_UART1_GPIO0_MASK|\ - STR71X_UART2_GPIO0_MASK |STR71X_UART3_GPIO0_MASK) -#define STR71X_UART_GPIO0_PC0BITS (STR71X_UART0_GPIO0_PC0BITS|STR71X_UART1_GPIO0_PC0BITS|\ - STR71X_UART2_GPIO0_PC0BITS|STR71X_UART3_GPIO0_PC0BITS) -#define STR71X_UART_GPIO0_PC1BITS (STR71X_UART0_GPIO0_PC1BITS|STR71X_UART1_GPIO0_PC1BITS|\ - STR71X_UART2_GPIO0_PC1BITS|STR71X_UART3_GPIO0_PC1BITS) -#define STR71X_UART_GPIO0_PC2BITS (STR71X_UART0_GPIO0_PC2BITS|STR71X_UART1_GPIO0_PC2BITS|\ - STR71X_UART2_GPIO0_PC2BITS|STR71X_UART3_GPIO0_PC2BITS) +#define STR71X_UART_GPIO0_MASK \ + (STR71X_UART0_GPIO0_MASK | STR71X_UART1_GPIO0_MASK | \ + STR71X_UART2_GPIO0_MASK | STR71X_UART3_GPIO0_MASK) +#define STR71X_UART_GPIO0_PC0BITS \ + (STR71X_UART0_GPIO0_PC0BITS | STR71X_UART1_GPIO0_PC0BITS | \ + STR71X_UART2_GPIO0_PC0BITS | STR71X_UART3_GPIO0_PC0BITS) +#define STR71X_UART_GPIO0_PC1BITS \ + (STR71X_UART0_GPIO0_PC1BITS | STR71X_UART1_GPIO0_PC1BITS | \ + STR71X_UART2_GPIO0_PC1BITS | STR71X_UART3_GPIO0_PC1BITS) +#define STR71X_UART_GPIO0_PC2BITS \ + (STR71X_UART0_GPIO0_PC2BITS | STR71X_UART1_GPIO0_PC2BITS | \ + STR71X_UART2_GPIO0_PC2BITS | STR71X_UART3_GPIO0_PC2BITS) /* Select UART parameters for the selected console */ @@ -203,8 +207,9 @@ # define STR71X_UARTCR_STOP STR71X_UARTCR_STOPBIT10 #endif -#define STR71X_UARTCR_VALUE (STR71X_UARTCR_MODE|STR71X_UARTCR_PARITY|STR71X_UARTCR_STOP|\ - STR71X_UARTCR_RUN|STR71X_UARTCR_RXENABLE|STR71X_UARTCR_FIFOENABLE) +#define STR71X_UARTCR_VALUE \ + (STR71X_UARTCR_MODE | STR71X_UARTCR_PARITY | STR71X_UARTCR_STOP | \ + STR71X_UARTCR_RUN | STR71X_UARTCR_RXENABLE | STR71X_UARTCR_FIFOENABLE) /* Calculate BAUD rate from PCLK1: * diff --git a/arch/arm/src/str71x/str71x_prccu.c b/arch/arm/src/str71x/str71x_prccu.c index 74f7f8f0b2..0a6a5c3094 100644 --- a/arch/arm/src/str71x/str71x_prccu.c +++ b/arch/arm/src/str71x/str71x_prccu.c @@ -157,9 +157,10 @@ # define APB1EN_HDLC (0) #endif -#define APB1EN_ALL (APB1EN_I2C0|APB1EN_I2C1|APB1EN_UART0|APB1EN_UART1|\ - APB1EN_UART2|APB1EN_UART3|APB1EN_USB|APB1EN_CAN|\ - APB1EN_BSPI0|APB1EN_BSPI1|APB1EN_HDLC) +#define APB1EN_ALL \ + (APB1EN_I2C0 | APB1EN_I2C1 | APB1EN_UART0 | APB1EN_UART1 | \ + APB1EN_UART2 | APB1EN_UART3 | APB1EN_USB | APB1EN_CAN | \ + APB1EN_BSPI0 | APB1EN_BSPI1 | APB1EN_HDLC) /* APB2 Peripherals */ @@ -227,9 +228,10 @@ #define APB2EN_EIC (0) /* Interrupt controller always enabled */ -#define APB2EN_ALL (APB2EN_XTI|APB2EN_GPIO0|APB2EN_GPIO1|APB2EN_GPIO2|\ - APB2EN_ADC12|APB2EN_CKOUT|APB2EN_TIM0|APB2EN_TIM1|\ - APB2EN_TIM2|APB2EN_TIM3|APB2EN_RTC|APB2EN_EIC) +#define APB2EN_ALL \ + (APB2EN_XTI | APB2EN_GPIO0 | APB2EN_GPIO1 | APB2EN_GPIO2 | \ + APB2EN_ADC12 | APB2EN_CKOUT | APB2EN_TIM0 | APB2EN_TIM1 | \ + APB2EN_TIM2 | APB2EN_TIM3 | APB2EN_RTC | APB2EN_EIC) #if STR71X_PLL1OUT_MUL == 12 @@ -367,8 +369,8 @@ void str71x_prccuinit(void) */ reg16 = getreg16(STR71X_PCU_PDIVR); - reg16 &= ~(STR71X_PCUPDIVR_FACT1MASK|STR71X_PCUPDIVR_FACT2MASK); - reg16 |= (APB1DIV|APB2DIV); + reg16 &= ~(STR71X_PCUPDIVR_FACT1MASK | STR71X_PCUPDIVR_FACT2MASK); + reg16 |= (APB1DIV | APB2DIV); putreg16(reg16, STR71X_PCU_PDIVR); /* Configure the main system clock (MCLK) divider with value from board.h */ @@ -388,9 +390,10 @@ void str71x_prccuinit(void) */ #if STR71X_CLK2 > 3000000 - putreg32(PLL1MUL|PLL1DIV, STR71X_RCCU_PLL1CR); + putreg32(PLL1MUL | PLL1DIV, STR71X_RCCU_PLL1CR); #else - putreg32(PLL1MUL|PLL1DIV|STR71X_RCCUPLL1CR_FREFRANGE, STR71X_RCCU_PLL1CR); + putreg32(PLL1MUL | PLL1DIV | STR71X_RCCUPLL1CR_FREFRANGE, + STR71X_RCCU_PLL1CR); #endif /* Wait for the PLL to lock */ @@ -437,8 +440,8 @@ void str71x_prccuinit(void) #if defined(CONFIG_STR71X_HDLC) || (defined(CONFIG_STR71X_USB) && defined(STR71X_USBIN_PLL2)) reg16 = getreg16(STR71X_PCU_PLL2CR); - reg16 &= ~(STR71X_PCUPPL2CR_MXMASK|STR71X_PCUPPL2CR_DXMASK); - reg16 |= (PLL2MUL|PLL2DIV); + reg16 &= ~(STR71X_PCUPPL2CR_MXMASK | STR71X_PCUPPL2CR_DXMASK); + reg16 |= (PLL2MUL | PLL2DIV); /* Set the PLL2 FRQRNG bit according to the PLL2 input frequency */ diff --git a/arch/arm/src/str71x/str71x_serial.c b/arch/arm/src/str71x/str71x_serial.c index 54ac8e54e8..d36b1202ee 100644 --- a/arch/arm/src/str71x/str71x_serial.c +++ b/arch/arm/src/str71x/str71x_serial.c @@ -510,7 +510,7 @@ static inline void up_waittxnotfull(struct up_dev_s *priv) static int up_setup(struct uart_dev_s *dev) { #ifndef CONFIG_SUPPRESS_UART_CONFIG - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; uint32_t divisor; uint32_t baud; uint16_t cr; @@ -523,7 +523,7 @@ static int up_setup(struct uart_dev_s *dev) /* Get mode setting */ - cr = STR71X_UARTCR_RUN|STR71X_UARTCR_RXENABLE|STR71X_UARTCR_FIFOENABLE; + cr = STR71X_UARTCR_RUN | STR71X_UARTCR_RXENABLE | STR71X_UARTCR_FIFOENABLE; if (priv->bits == 7) { @@ -592,7 +592,7 @@ static int up_setup(struct uart_dev_s *dev) static void up_shutdown(struct uart_dev_s *dev) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; up_disableuartint(priv, NULL); } @@ -613,7 +613,7 @@ static void up_shutdown(struct uart_dev_s *dev) static int up_attach(struct uart_dev_s *dev) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; int ret; /* Attach and enable the IRQ */ @@ -621,16 +621,16 @@ static int up_attach(struct uart_dev_s *dev) ret = irq_attach(priv->irq, up_interrupt); if (ret == OK) { - /* Enable the interrupt (RX and TX interrupts are still disabled - * in the UART - */ + /* Enable the interrupt (RX and TX interrupts are still disabled + * in the UART + */ - up_enable_irq(priv->irq); + up_enable_irq(priv->irq); #ifdef CONFIG_ARCH_IRQPRIO - /* Set the uart interrupt priority (the default value is one) */ + /* Set the uart interrupt priority (the default value is one) */ - up_prioritize_irq(priv->irq, CONFIG_UART_PRI); + up_prioritize_irq(priv->irq, CONFIG_UART_PRI); #endif } @@ -649,7 +649,7 @@ static int up_attach(struct uart_dev_s *dev) static void up_detach(struct uart_dev_s *dev) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; up_disable_irq(priv->irq); irq_detach(priv->irq); } @@ -706,7 +706,7 @@ static int up_interrupt(int irq, void *context) PANIC(); } - priv = (struct up_dev_s*)dev->priv; + priv = (struct up_dev_s *)dev->priv; DEBUGASSERT(priv && dev); /* Loop until there are no characters to be transferred or, @@ -727,10 +727,10 @@ static int up_interrupt(int irq, void *context) if ((priv->sr & RXAVAILABLE_BITS) != 0 && /* Data available in Rx FIFO */ (priv->ier & RXENABLE_BITS) != 0) /* Rx FIFO interrupts enabled */ { - /* Rx buffer not empty ... process incoming bytes */ + /* Rx buffer not empty ... process incoming bytes */ - uart_recvchars(dev); - handled = true; + uart_recvchars(dev); + handled = true; } /* Handle outgoing, transmit bytes */ @@ -738,10 +738,10 @@ static int up_interrupt(int irq, void *context) if ((priv->sr & STR71X_UARTSR_TF) == 0 && /* Tx FIFO not full */ (priv->ier & STR71X_UARTIER_THE) != 0) /* Tx Half empty interrupt enabled */ { - /* Tx FIFO not full ... process outgoing bytes */ + /* Tx FIFO not full ... process outgoing bytes */ - uart_xmitchars(dev); - handled = true; + uart_xmitchars(dev); + handled = true; } } @@ -769,7 +769,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) #ifdef CONFIG_SERIAL_TIOCSERGSTRUCT case TIOCSERGSTRUCT: { - struct up_dev_s *user = (struct up_dev_s*)arg; + struct up_dev_s *user = (struct up_dev_s *)arg; if (!user) { ret = -EINVAL; @@ -802,7 +802,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) static int up_receive(struct uart_dev_s *dev, uint32_t *status) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; uint16_t rxbufr; rxbufr = up_serialin(priv, STR71X_UART_RXBUFR_OFFSET); @@ -820,7 +820,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status) static void up_rxint(struct uart_dev_s *dev, bool enable) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; if (enable) { /* Receive an interrupt when the Rx FIFO is half full (or if a timeout @@ -848,7 +848,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) static bool up_rxavailable(struct uart_dev_s *dev) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & RXAVAILABLE_BITS) != 0); } @@ -862,7 +862,7 @@ static bool up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; up_serialout(priv, STR71X_UART_TXBUFR_OFFSET, (uint16_t)ch); } @@ -876,7 +876,7 @@ static void up_send(struct uart_dev_s *dev, int ch) static void up_txint(struct uart_dev_s *dev, bool enable) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; if (enable) { /* Set to receive an interrupt when the TX fifo is half emptied */ @@ -904,7 +904,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) static bool up_txready(struct uart_dev_s *dev) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & STR71X_UARTSR_TF) == 0); } @@ -918,7 +918,7 @@ static bool up_txready(struct uart_dev_s *dev) static bool up_txempty(struct uart_dev_s *dev) { - struct up_dev_s *priv = (struct up_dev_s*)dev->priv; + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; return ((up_serialin(priv, STR71X_UART_SR_OFFSET) & STR71X_UARTSR_TE) != 0); } @@ -1005,7 +1005,7 @@ void up_serialinit(void) int up_putc(int ch) { #ifdef HAVE_CONSOLE - struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; + struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv; uint16_t ier; up_disableuartint(priv, &ier);