From 4f64634694c03fc5c6786a51837f697ccfe60529 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 1 Jul 2016 12:36:09 -0600 Subject: [PATCH] arch/arm/kinetis: Still moving register header files to kinetis/chip directory; still incorporating K64 differences. --- arch/arm/src/kinetis/chip/kinetis_fmc.h | 75 +++++ arch/arm/src/kinetis/chip/kinetis_ftfe.h | 159 ++++++++++ arch/arm/src/kinetis/{ => chip}/kinetis_ftm.h | 54 +++- .../arm/src/kinetis/{ => chip}/kinetis_gpio.h | 0 arch/arm/src/kinetis/{ => chip}/kinetis_i2c.h | 23 +- arch/arm/src/kinetis/{ => chip}/kinetis_i2s.h | 10 +- .../kinetis_k20k40k60fmc.h} | 22 +- arch/arm/src/kinetis/chip/kinetis_k64fmc.h | 293 ++++++++++++++++++ .../arm/src/kinetis/{ => chip}/kinetis_llwu.h | 10 +- .../src/kinetis/{ => chip}/kinetis_lptmr.h | 10 +- arch/arm/src/kinetis/{ => chip}/kinetis_mcg.h | 22 +- arch/arm/src/kinetis/kinetis_clockconfig.c | 6 +- arch/arm/src/kinetis/kinetis_ftfl.h | 159 ---------- arch/arm/src/kinetis/kinetis_pin.c | 14 +- arch/arm/src/kinetis/kinetis_pindump.c | 2 +- arch/arm/src/kinetis/kinetis_pingpio.c | 14 +- arch/arm/src/kinetis/kinetis_pwm.c | 6 +- arch/arm/src/kinetis/kinetis_usbdev.c | 2 +- 18 files changed, 647 insertions(+), 234 deletions(-) create mode 100644 arch/arm/src/kinetis/chip/kinetis_fmc.h create mode 100644 arch/arm/src/kinetis/chip/kinetis_ftfe.h rename arch/arm/src/kinetis/{ => chip}/kinetis_ftm.h (90%) rename arch/arm/src/kinetis/{ => chip}/kinetis_gpio.h (100%) rename arch/arm/src/kinetis/{ => chip}/kinetis_i2c.h (89%) rename arch/arm/src/kinetis/{ => chip}/kinetis_i2s.h (98%) rename arch/arm/src/kinetis/{kinetis_fmc.h => chip/kinetis_k20k40k60fmc.h} (97%) create mode 100644 arch/arm/src/kinetis/chip/kinetis_k64fmc.h rename arch/arm/src/kinetis/{ => chip}/kinetis_llwu.h (98%) rename arch/arm/src/kinetis/{ => chip}/kinetis_lptmr.h (96%) rename arch/arm/src/kinetis/{ => chip}/kinetis_mcg.h (94%) delete mode 100644 arch/arm/src/kinetis/kinetis_ftfl.h diff --git a/arch/arm/src/kinetis/chip/kinetis_fmc.h b/arch/arm/src/kinetis/chip/kinetis_fmc.h new file mode 100644 index 0000000000..37e6dfda8d --- /dev/null +++ b/arch/arm/src/kinetis/chip/kinetis_fmc.h @@ -0,0 +1,75 @@ +/******************************************************************************************** + * arch/arm/src/kinetis/chip/kinetis_fmc.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include + +#include "chip.h" + +/* This file is just a wrapper around pin muxing header files for the Kinetis family selected + * by the logic in chip.h. + */ + +#if defined(KINETIS_K20) || defined(KINETIS_K40) || defined(KINETIS_K60) +# include "kinetis_k20k40k60fmc.h" +#elif defined(KINETIS_K64) +# include "kinetis_k64fmc.h" +#else +# error "No pin multiplexing for this Kinetis part" +#endif + +/******************************************************************************************** + * Pre-processor Definitions + ********************************************************************************************/ + +/******************************************************************************************** + * Public Types + ********************************************************************************************/ + +/******************************************************************************************** + * Public Data + ********************************************************************************************/ + +/******************************************************************************************** + * Public Functions + ********************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FMC_H */ diff --git a/arch/arm/src/kinetis/chip/kinetis_ftfe.h b/arch/arm/src/kinetis/chip/kinetis_ftfe.h new file mode 100644 index 0000000000..13794d97db --- /dev/null +++ b/arch/arm/src/kinetis/chip/kinetis_ftfe.h @@ -0,0 +1,159 @@ +/************************************************************************************ + * arch/arm/src/kinetis/chip/kinetis_ftfe.h + * + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "chip.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define KINETIS_FTFE_FSTAT_OFFSET 0x0000 /* Flash Status Register */ +#define KINETIS_FTFE_FCNFG_OFFSET 0x0001 /* Flash Configuration Register */ +#define KINETIS_FTFE_FSEC_OFFSET 0x0002 /* Flash Security Register */ +#define KINETIS_FTFE_FOPT_OFFSET 0x0003 /* Flash Option Register */ + +#define KINETIS_FTFE_FCCOB3_OFFSET 0x0004 /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB2_OFFSET 0x0005 /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB1_OFFSET 0x0006 /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB0_OFFSET 0x0007 /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB7_OFFSET 0x0008 /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB6_OFFSET 0x0009 /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB5_OFFSET 0x000a /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB4_OFFSET 0x000b /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOBB_OFFSET 0x000c /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOBA_OFFSET 0x000d /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB9_OFFSET 0x000e /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FCCOB8_OFFSET 0x000f /* Flash Common Command Object Registers */ +#define KINETIS_FTFE_FPROT3_OFFSET 0x0010 /* Program Flash Protection Registers */ +#define KINETIS_FTFE_FPROT2_OFFSET 0x0011 /* Program Flash Protection Registers */ +#define KINETIS_FTFE_FPROT1_OFFSET 0x0012 /* Program Flash Protection Registers */ +#define KINETIS_FTFE_FPROT0_OFFSET 0x0013 /* Program Flash Protection Registers */ +#define KINETIS_FTFE_FEPROT_OFFSET 0x0016 /* EEPROM Protection Register */ +#define KINETIS_FTFE_FDPROT_OFFSET 0x0017 /* Data Flash Protection Register */ + +/* Register Addresses ***************************************************************/ + +#define KINETIS_FTFE_FSTAT (KINETIS_FTFE_BASE+KINETIS_FTFE_FSTAT_OFFSET) +#define KINETIS_FTFE_FCNFG (KINETIS_FTFE_BASE+KINETIS_FTFE_FCNFG_OFFSET) +#define KINETIS_FTFE_FSEC (KINETIS_FTFE_BASE+KINETIS_FTFE_FSEC_OFFSET) +#define KINETIS_FTFE_FOPT (KINETIS_FTFE_BASE+KINETIS_FTFE_FOPT_OFFSET) +#define KINETIS_FTFE_FCCOB3 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB3_OFFSET) +#define KINETIS_FTFE_FCCOB2 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB2_OFFSET) +#define KINETIS_FTFE_FCCOB1 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB1_OFFSET) +#define KINETIS_FTFE_FCCOB0 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB0_OFFSET) +#define KINETIS_FTFE_FCCOB7 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB7_OFFSET) +#define KINETIS_FTFE_FCCOB6 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB6_OFFSET) +#define KINETIS_FTFE_FCCOB5 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB5_OFFSET) +#define KINETIS_FTFE_FCCOB4 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB4_OFFSET) +#define KINETIS_FTFE_FCCOBB (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOBB_OFFSET) +#define KINETIS_FTFE_FCCOBA (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOBA_OFFSET) +#define KINETIS_FTFE_FCCOB9 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB9_OFFSET) +#define KINETIS_FTFE_FCCOB8 (KINETIS_FTFE_BASE+KINETIS_FTFE_FCCOB8_OFFSET) +#define KINETIS_FTFE_FPROT3 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT3_OFFSET) +#define KINETIS_FTFE_FPROT2 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT2_OFFSET) +#define KINETIS_FTFE_FPROT1 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT1_OFFSET) +#define KINETIS_FTFE_FPROT0 (KINETIS_FTFE_BASE+KINETIS_FTFE_FPROT0_OFFSET) +#define KINETIS_FTFE_FEPROT (KINETIS_FTFE_BASE+KINETIS_FTFE_FEPROT_OFFSET) +#define KINETIS_FTFE_FDPROT (KINETIS_FTFE_BASE+KINETIS_FTFE_FDPROT_OFFSET) + +/* Register Bit Definitions *********************************************************/ + +/* Flash Status Register */ + +#define FTFE_FSTAT_MGSTAT0 (1 << 0) /* Bit 0: Memory Controller Command Completion Status Flag */ + /* Bits 1-3: Reserved */ +#define FTFE_FSTAT_FPVIOL (1 << 4) /* Bit 4: Flash Protection Violation Flag */ +#define FTFE_FSTAT_ACCERR (1 << 5) /* Bit 5: Flash Access Error Flag */ +#define FTFE_FSTAT_RDCOLERR (1 << 6) /* Bit 6: FTFE Read Collision Error Flag */ +#define FTFE_FSTAT_CCIF (1 << 7) /* Bit 7: Command Complete Interrupt Flag */ + +/* Flash Configuration Register */ + +#define FTFE_FCNFG_EEERDY (1 << 0) /* Bit 0: FEEPROM backup data copied to FlexRAM */ +#define FTFE_FCNFG_RAMRDY (1 << 1) /* Bit 1: RAM Ready */ +#define FTFE_FCNFG_PFLSH (1 << 2) /* Bit 2: FTFE configuration */ +#define FTFE_FCNFG_SWAP (1 << 3) /* Bit 3: Swap */ +#define FTFE_FCNFG_ERSSUSP (1 << 4) /* Bit 4: Erase Suspend */ +#define FTFE_FCNFG_ERSAREQ (1 << 5) /* Bit 5: Erase All Request */ +#define FTFE_FCNFG_RDCOLLIE (1 << 6) /* Bit 6: Read Collision Error Interrupt Enable */ +#define FTFE_FCNFG_CCIE (1 << 7) /* Bit 7: Command Complete Interrupt Enable */ + +/* Flash Security Register */ + +#define FTFE_FSEC_SEC_SHIFT (0) /* Bits 0-1: Flash Security */ +#define FTFE_FSEC_SEC_MASK (3 << FTFE_FSEC_SEC_SHIFT) +# define FTFE_FSEC_SEC_SECURE (0 << FTFE_FSEC_SEC_SHIFT) /* 00,01,11: status is secure */ +# define FTFE_FSEC_SEC_UNSECURE (2 << FTFE_FSEC_SEC_SHIFT) /* 10: status is insecure */ +#define FTFE_FSEC_FSLACC_SHIFT (2) /* Bits 2-3: Freescale Failure Analysis Access Code */ +#define FTFE_FSEC_FSLACC_MASK (3 << FTFE_FSEC_FSLACC_SHIFT) +# define FTFE_FSEC_FSLACC_GRANTED (0 << FTFE_FSEC_FSLACC_SHIFT) /* 00 or 11: Access granted */ +# define FTFE_FSEC_FSLACC_DENIED (1 << FTFE_FSEC_FSLACC_SHIFT) /* 01 or 10: Access denied */ +#define FTFE_FSEC_MEEN_SHIFT (4) /* Bits 4-5: Mass Erase Enable Bits */ +#define FTFE_FSEC_MEEN_MASK (3 << FTFE_FSEC_MEEN_SHIFT) +# define FTFE_FSEC_MEEN_ENABLED (0 << FTFE_FSEC_MEEN_SHIFT) /* All values are enabled */ +#define FTFE_FSEC_KEYEN_SHIFT (6) /* Bits 6-7: Backdoor Key Security Enable */ +#define FTFE_FSEC_KEYEN_MASK (3 << FTFE_FSEC_KEYEN_SHIFT) +# define FTFE_FSEC_KEYEN_DISABLED (1 << FTFE_FSEC_KEYEN_SHIFT) /* All values are disabled */ + +/* Flash Option Register (32-bits, see Chip Configuration details) */ +/* Flash Common Command Object Registers (8-bit flash command data) */ +/* Program Flash Protection Registers (8-bit flash protection data) */ +/* EEPROM Protection Register (8-bit eeprom protection data) */ +/* Data Flash Protection Register (8-bit data flash protection data) */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTFE_H */ diff --git a/arch/arm/src/kinetis/kinetis_ftm.h b/arch/arm/src/kinetis/chip/kinetis_ftm.h similarity index 90% rename from arch/arm/src/kinetis/kinetis_ftm.h rename to arch/arm/src/kinetis/chip/kinetis_ftm.h index 2f031b5dd9..1402f5e8d8 100644 --- a/arch/arm/src/kinetis/kinetis_ftm.h +++ b/arch/arm/src/kinetis/chip/kinetis_ftm.h @@ -1,7 +1,7 @@ /******************************************************************************************** - * arch/arm/src/kinetis/kinetis_ftm.h + * arch/arm/src/kinetis/chip/kinetis_ftm.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ********************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H /******************************************************************************************** * Included Files @@ -228,6 +228,50 @@ #define KINETIS_FTM2_SWOCTRL (KINETIS_FTM2_BASE+KINETIS_FTM_SWOCTRL_OFFSET) #define KINETIS_FTM2_PWMLOAD (KINETIS_FTM2_BASE+KINETIS_FTM_PWMLOAD_OFFSET) +#define KINETIS_FTM3_SC (KINETIS_FTM3_BASE+KINETIS_FTM_SC_OFFSET) +#define KINETIS_FTM3_CNT (KINETIS_FTM3_BASE+KINETIS_FTM_CNT_OFFSET) +#define KINETIS_FTM3_MOD (KINETIS_FTM3_BASE+KINETIS_FTM_MOD_OFFSET) + +#define KINETIS_FTM3_CSC(n) (KINETIS_FTM3_BASE+KINETIS_FTM_CSC_OFFSET(n)) +#define KINETIS_FTM3_CV(n) (KINETIS_FTM3_BASE+KINETIS_FTM_CV_OFFSET(n)) +#define KINETIS_FTM3_C0SC (KINETIS_FTM3_BASE+KINETIS_FTM_C0SC_OFFSET) +#define KINETIS_FTM3_C0V (KINETIS_FTM3_BASE+KINETIS_FTM_C0V_OFFSET) +#define KINETIS_FTM3_C1SC (KINETIS_FTM3_BASE+KINETIS_FTM_C1SC_OFFSET) +#define KINETIS_FTM3_C1V (KINETIS_FTM3_BASE+KINETIS_FTM_C1V_OFFSET) +#define KINETIS_FTM3_C2SC (KINETIS_FTM3_BASE+KINETIS_FTM_C2SC_OFFSET) +#define KINETIS_FTM3_C2V (KINETIS_FTM3_BASE+KINETIS_FTM_C2V_OFFSET) +#define KINETIS_FTM3_C3SC (KINETIS_FTM3_BASE+KINETIS_FTM_C3SC_OFFSET) +#define KINETIS_FTM3_C3V (KINETIS_FTM3_BASE+KINETIS_FTM_C3V_OFFSET) +#define KINETIS_FTM3_C4SC (KINETIS_FTM3_BASE+KINETIS_FTM_C4SC_OFFSET) +#define KINETIS_FTM3_C4V (KINETIS_FTM3_BASE+KINETIS_FTM_C4V_OFFSET) +#define KINETIS_FTM3_C5SC (KINETIS_FTM3_BASE+KINETIS_FTM_C5SC_OFFSET) +#define KINETIS_FTM3_C5V (KINETIS_FTM3_BASE+KINETIS_FTM_C5V_OFFSET) +#define KINETIS_FTM3_C6SC (KINETIS_FTM3_BASE+KINETIS_FTM_C6SC_OFFSET) +#define KINETIS_FTM3_C6V (KINETIS_FTM3_BASE+KINETIS_FTM_C6V_OFFSET) +#define KINETIS_FTM3_C7SC (KINETIS_FTM3_BASE+KINETIS_FTM_C7SC_OFFSET) +#define KINETIS_FTM3_C7V (KINETIS_FTM3_BASE+KINETIS_FTM_C7V_OFFSET) + +#define KINETIS_FTM3_CNTIN (KINETIS_FTM3_BASE+KINETIS_FTM_CNTIN_OFFSET) +#define KINETIS_FTM3_STATUS (KINETIS_FTM3_BASE+KINETIS_FTM_STATUS_OFFSET) +#define KINETIS_FTM3_MODE (KINETIS_FTM3_BASE+KINETIS_FTM_MODE_OFFSET) +#define KINETIS_FTM3_SYNC (KINETIS_FTM3_BASE+KINETIS_FTM_SYNC_OFFSET) +#define KINETIS_FTM3_OUTINIT (KINETIS_FTM3_BASE+KINETIS_FTM_OUTINIT_OFFSET) +#define KINETIS_FTM3_OUTMASK (KINETIS_FTM3_BASE+KINETIS_FTM_OUTMASK_OFFSET) +#define KINETIS_FTM3_COMBINE (KINETIS_FTM3_BASE+KINETIS_FTM_COMBINE_OFFSET) +#define KINETIS_FTM3_DEADTIME (KINETIS_FTM3_BASE+KINETIS_FTM_DEADTIME_OFFSET) +#define KINETIS_FTM3_EXTTRIG (KINETIS_FTM3_BASE+KINETIS_FTM_EXTTRIG_OFFSET) +#define KINETIS_FTM3_POL (KINETIS_FTM3_BASE+KINETIS_FTM_POL_OFFSET) +#define KINETIS_FTM3_FMS (KINETIS_FTM3_BASE+KINETIS_FTM_FMS_OFFSET) +#define KINETIS_FTM3_FILTER (KINETIS_FTM3_BASE+KINETIS_FTM_FILTER_OFFSET) +#define KINETIS_FTM3_FLTCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_FLTCTRL_OFFSET) +#define KINETIS_FTM3_QDCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_QDCTRL_OFFSET) +#define KINETIS_FTM3_CONF (KINETIS_FTM3_BASE+KINETIS_FTM_CONF_OFFSET) +#define KINETIS_FTM3_FLTPOL (KINETIS_FTM3_BASE+KINETIS_FTM_FLTPOL_OFFSET) +#define KINETIS_FTM3_SYNCONF (KINETIS_FTM3_BASE+KINETIS_FTM_SYNCONF_OFFSET) +#define KINETIS_FTM3_INVCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_INVCTRL_OFFSET) +#define KINETIS_FTM3_SWOCTRL (KINETIS_FTM3_BASE+KINETIS_FTM_SWOCTRL_OFFSET) +#define KINETIS_FTM3_PWMLOAD (KINETIS_FTM3_BASE+KINETIS_FTM_PWMLOAD_OFFSET) + /* Register Bit Definitions *****************************************************************/ /* Status and Control */ @@ -525,4 +569,4 @@ * Public Functions ********************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FTM_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_FTM_H */ diff --git a/arch/arm/src/kinetis/kinetis_gpio.h b/arch/arm/src/kinetis/chip/kinetis_gpio.h similarity index 100% rename from arch/arm/src/kinetis/kinetis_gpio.h rename to arch/arm/src/kinetis/chip/kinetis_gpio.h diff --git a/arch/arm/src/kinetis/kinetis_i2c.h b/arch/arm/src/kinetis/chip/kinetis_i2c.h similarity index 89% rename from arch/arm/src/kinetis/kinetis_i2c.h rename to arch/arm/src/kinetis/chip/kinetis_i2c.h index bee9ef92db..94d071727b 100644 --- a/arch/arm/src/kinetis/kinetis_i2c.h +++ b/arch/arm/src/kinetis/chip/kinetis_i2c.h @@ -1,7 +1,7 @@ /******************************************************************************************** - * arch/arm/src/kinetis/kinetis_i2c.h + * arch/arm/src/kinetis/chip/kinetis_i2c.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ********************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H /******************************************************************************************** * Included Files @@ -91,6 +91,19 @@ #define KINETIS_I2C1_SLTH (KINETIS_I2C1_BASE+KINETIS_I2C_SLTH_OFFSET) #define KINETIS_I2C1_SLTL (KINETIS_I2C1_BASE+KINETIS_I2C_SLTL_OFFSET) +#define KINETIS_I2C2_A1 (KINETIS_I2C2_BASE+KINETIS_I2C_A1_OFFSET) +#define KINETIS_I2C2_F (KINETIS_I2C2_BASE+KINETIS_I2C_F_OFFSET) +#define KINETIS_I2C2_C1 (KINETIS_I2C2_BASE+KINETIS_I2C_C1_OFFSET) +#define KINETIS_I2C2_S (KINETIS_I2C2_BASE+KINETIS_I2C_S_OFFSET) +#define KINETIS_I2C2_D (KINETIS_I2C2_BASE+KINETIS_I2C_D_OFFSET) +#define KINETIS_I2C2_C2 (KINETIS_I2C2_BASE+KINETIS_I2C_C2_OFFSET) +#define KINETIS_I2C2_FLT (KINETIS_I2C2_BASE+KINETIS_I2C_FLT_OFFSET) +#define KINETIS_I2C2_RA (KINETIS_I2C2_BASE+KINETIS_I2C_RA_OFFSET) +#define KINETIS_I2C2_SMB (KINETIS_I2C2_BASE+KINETIS_I2C_SMB_OFFSET) +#define KINETIS_I2C2_A2 (KINETIS_I2C2_BASE+KINETIS_I2C_A2_OFFSET) +#define KINETIS_I2C2_SLTH (KINETIS_I2C2_BASE+KINETIS_I2C_SLTH_OFFSET) +#define KINETIS_I2C2_SLTL (KINETIS_I2C2_BASE+KINETIS_I2C_SLTL_OFFSET) + /* Register Bit Definitions *****************************************************************/ /* I2C Address Register 1 (8-bit) */ @@ -182,4 +195,4 @@ * Public Functions ********************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2CE_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2CE_H */ diff --git a/arch/arm/src/kinetis/kinetis_i2s.h b/arch/arm/src/kinetis/chip/kinetis_i2s.h similarity index 98% rename from arch/arm/src/kinetis/kinetis_i2s.h rename to arch/arm/src/kinetis/chip/kinetis_i2s.h index 11bcc09955..5de08843bb 100644 --- a/arch/arm/src/kinetis/kinetis_i2s.h +++ b/arch/arm/src/kinetis/chip/kinetis_i2s.h @@ -1,7 +1,7 @@ /**************************************************************************************************** - * arch/arm/src/kinetis/kinetis_i2s.h + * arch/arm/src/kinetis/chip/kinetis_i2s.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ****************************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H /**************************************************************************************************** * Included Files @@ -294,4 +294,4 @@ * Public Functions ****************************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_I2S_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_I2S_H */ diff --git a/arch/arm/src/kinetis/kinetis_fmc.h b/arch/arm/src/kinetis/chip/kinetis_k20k40k60fmc.h similarity index 97% rename from arch/arm/src/kinetis/kinetis_fmc.h rename to arch/arm/src/kinetis/chip/kinetis_k20k40k60fmc.h index 66f3a39092..8dce4d682e 100644 --- a/arch/arm/src/kinetis/kinetis_fmc.h +++ b/arch/arm/src/kinetis/chip/kinetis_k20k40k60fmc.h @@ -1,7 +1,7 @@ /************************************************************************************ - * arch/arm/src/kinetis/kinetis_fmc.h + * arch/arm/src/kinetis/kinetis_k20k40k60fmc.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H /************************************************************************************ * Included Files @@ -50,13 +50,13 @@ /* Register Offsets *****************************************************************/ -#define KINETIS_FMC_PFAPR_OFFSET 0x0000 /* Flash Access Protection Register */ -#define KINETIS_FMC_PFB0CR_OFFSET 0x0004 /* Flash Bank 0 Control Register */ -#define KINETIS_FMC_PFB1CR_OFFSET 0x0008 /* Flash Bank 1 Control Register */ +#define KINETIS_FMC_PFAPR_OFFSET 0x0000 /* Flash Access Protection Register */ +#define KINETIS_FMC_PFB0CR_OFFSET 0x0004 /* Flash Bank 0 Control Register */ +#define KINETIS_FMC_PFB1CR_OFFSET 0x0008 /* Flash Bank 1 Control Register */ /* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */ -#define KINETIS_FMC_TAGVD_OFFSET(w,s) (0x100+((w)<<5)+((s)<<2)) +#define KINETIS_FMC_TAGVD_OFFSET(w,s) (0x100 + ((w) << 5) + ((s) << 2)) #define KINETIS_FMC_TAGVDW0S0_OFFSET 0x0100 /* Cache Directory Storage */ #define KINETIS_FMC_TAGVDW0S1_OFFSET 0x0104 /* Cache Directory Storage */ @@ -96,8 +96,8 @@ /* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */ -#define KINETIS_FMC_DATAU_OFFSET(w,s) (0x200+((w)<<6)+((s)<<2)) -#define KINETIS_FMC_DATAL_OFFSET(w,s) (0x204+((w)<<6)+((s)<<2)) +#define KINETIS_FMC_DATAU_OFFSET(w,s) (0x200 + ((w) << 6) + ((s) << 2)) +#define KINETIS_FMC_DATAL_OFFSET(w,s) (0x204 + ((w) << 6) + ((s) << 2)) #define KINETIS_FMC_DATAW0S0U_OFFSET 0x0200 /* Cache Data Storage (upper word) */ #define KINETIS_FMC_DATAW0S0L_OFFSET 0x0204 /* Cache Data Storage (lower word) */ @@ -386,4 +386,4 @@ * Public Functions ************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FMC_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K20K40K60FMC_H */ diff --git a/arch/arm/src/kinetis/chip/kinetis_k64fmc.h b/arch/arm/src/kinetis/chip/kinetis_k64fmc.h new file mode 100644 index 0000000000..036e38f129 --- /dev/null +++ b/arch/arm/src/kinetis/chip/kinetis_k64fmc.h @@ -0,0 +1,293 @@ +/************************************************************************************ + * arch/arm/src/kinetis/kinetis_k64fmc.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "chip.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define KINETIS_FMC_PFAPR_OFFSET 0x0000 /* Flash Access Protection Register */ +#define KINETIS_FMC_PFB0CR_OFFSET 0x0004 /* Flash Bank 0 Control Register */ +#define KINETIS_FMC_PFB1CR_OFFSET 0x0008 /* Flash Bank 1 Control Register */ + +/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */ + +#define KINETIS_FMC_TAGVD_OFFSET(w,s) (0x100 + ((w) << 5) + ((s) << 2)) + +#define KINETIS_FMC_TAGVDW0S0_OFFSET 0x0100 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW0S1_OFFSET 0x0104 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW0S2_OFFSET 0x0108 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW0S3_OFFSET 0x010c /* Cache Directory Storage */ + +#define KINETIS_FMC_TAGVDW1S0_OFFSET 0x0110 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW1S1_OFFSET 0x0114 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW1S2_OFFSET 0x0118 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW1S3_OFFSET 0x011c /* Cache Directory Storage */ + +#define KINETIS_FMC_TAGVDW2S0_OFFSET 0x0120 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW2S1_OFFSET 0x0124 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW2S2_OFFSET 0x0128 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW2S3_OFFSET 0x012c /* Cache Directory Storage */ + +#define KINETIS_FMC_TAGVDW3S0_OFFSET 0x0130 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW3S1_OFFSET 0x0134 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW3S2_OFFSET 0x0138 /* Cache Directory Storage */ +#define KINETIS_FMC_TAGVDW3S3_OFFSET 0x013c /* Cache Directory Storage */ + +/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */ + +#define KINETIS_FMC_DATAU_OFFSET(w,s) (0x200 + ((w) << 6) + ((s) << 2)) +#define KINETIS_FMC_DATAL_OFFSET(w,s) (0x204 + ((w) << 6) + ((s) << 2)) + +#define KINETIS_FMC_DATAW0S0U_OFFSET 0x0200 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW0S0L_OFFSET 0x0204 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW0S1U_OFFSET 0x0208 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW0S1L_OFFSET 0x020c /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW0S2U_OFFSET 0x0210 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW0S2L_OFFSET 0x0214 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW0S3U_OFFSET 0x0218 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW0S3L_OFFSET 0x021c /* Cache Data Storage (lower word) */ + +#define KINETIS_FMC_DATAW1S0U_OFFSET 0x0220 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW1S0L_OFFSET 0x0224 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW1S1U_OFFSET 0x0228 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW1S1L_OFFSET 0x022c /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW1S2U_OFFSET 0x0230 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW1S2L_OFFSET 0x0234 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW1S3U_OFFSET 0x0238 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW1S3L_OFFSET 0x023c /* Cache Data Storage (lower word) */ + +#define KINETIS_FMC_DATAW2S0U_OFFSET 0x0240 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW2S0L_OFFSET 0x0244 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW2S1U_OFFSET 0x0248 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW2S1L_OFFSET 0x024c /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW2S2U_OFFSET 0x0250 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW2S2L_OFFSET 0x0254 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW2S3U_OFFSET 0x0258 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW2S3L_OFFSET 0x025c /* Cache Data Storage (lower word) */ + +#define KINETIS_FMC_DATAW3S0U_OFFSET 0x0260 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW3S0L_OFFSET 0x0264 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW3S1U_OFFSET 0x0268 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW3S1L_OFFSET 0x026c /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW3S2U_OFFSET 0x0270 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW3S2L_OFFSET 0x0274 /* Cache Data Storage (lower word) */ +#define KINETIS_FMC_DATAW3S3U_OFFSET 0x0278 /* Cache Data Storage (upper word) */ +#define KINETIS_FMC_DATAW3S3L_OFFSET 0x027c /* Cache Data Storage (lower word) */ + +/* Register Addresses ***************************************************************/ + +#define KINETIS_FMC_PFAPR (KINETIS_FMC_BASE+KINETIS_FMC_PFAPR_OFFSET) +#define KINETIS_FMC_PFB0CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB0CR_OFFSET) +#define KINETIS_FMC_PFB1CR (KINETIS_FMC_BASE+KINETIS_FMC_PFB1CR_OFFSET) + +/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */ + +#define KINETIS_FMC_TAGVD(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_TAGVD_OFFSET(w,s)) + +#define KINETIS_FMC_TAGVDW0S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S0_OFFSET) +#define KINETIS_FMC_TAGVDW0S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S1_OFFSET) +#define KINETIS_FMC_TAGVDW0S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S2_OFFSET) +#define KINETIS_FMC_TAGVDW0S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW0S3_OFFSET) + +#define KINETIS_FMC_TAGVDW1S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S0_OFFSET) +#define KINETIS_FMC_TAGVDW1S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S1_OFFSET) +#define KINETIS_FMC_TAGVDW1S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S2_OFFSET) +#define KINETIS_FMC_TAGVDW1S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW1S3_OFFSET) + +#define KINETIS_FMC_TAGVDW2S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S0_OFFSET) +#define KINETIS_FMC_TAGVDW2S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S1_OFFSET) +#define KINETIS_FMC_TAGVDW2S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S2_OFFSET) +#define KINETIS_FMC_TAGVDW2S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW2S3_OFFSET) + +#define KINETIS_FMC_TAGVDW3S0 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S0_OFFSET) +#define KINETIS_FMC_TAGVDW3S1 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S1_OFFSET) +#define KINETIS_FMC_TAGVDW3S2 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S2_OFFSET) +#define KINETIS_FMC_TAGVDW3S3 (KINETIS_FMC_BASE+KINETIS_FMC_TAGVDW3S3_OFFSET) + +/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7 */ + +#define KINETIS_FMC_DATAU(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_DATAU_OFFSET(w,s)) +#define KINETIS_FMC_DATAL(w,s) (KINETIS_FMC_BASE+KINETIS_FMC_DATAL_OFFSET(w,s)) + +#define KINETIS_FMC_DATAW0S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0U_OFFSET) +#define KINETIS_FMC_DATAW0S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S0L_OFFSET) +#define KINETIS_FMC_DATAW0S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1U_OFFSET) +#define KINETIS_FMC_DATAW0S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S1L_OFFSET) +#define KINETIS_FMC_DATAW0S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2U_OFFSET) +#define KINETIS_FMC_DATAW0S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S2L_OFFSET) +#define KINETIS_FMC_DATAW0S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3U_OFFSET) +#define KINETIS_FMC_DATAW0S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW0S3L_OFFSET) + +#define KINETIS_FMC_DATAW1S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0U_OFFSET) +#define KINETIS_FMC_DATAW1S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S0L_OFFSET) +#define KINETIS_FMC_DATAW1S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1U_OFFSET) +#define KINETIS_FMC_DATAW1S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S1L_OFFSET) +#define KINETIS_FMC_DATAW1S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2U_OFFSET) +#define KINETIS_FMC_DATAW1S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S2L_OFFSET) +#define KINETIS_FMC_DATAW1S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3U_OFFSET) +#define KINETIS_FMC_DATAW1S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW1S3L_OFFSET) + +#define KINETIS_FMC_DATAW2S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0U_OFFSET) +#define KINETIS_FMC_DATAW2S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S0L_OFFSET) +#define KINETIS_FMC_DATAW2S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1U_OFFSET) +#define KINETIS_FMC_DATAW2S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S1L_OFFSET) +#define KINETIS_FMC_DATAW2S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2U_OFFSET) +#define KINETIS_FMC_DATAW2S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S2L_OFFSET) +#define KINETIS_FMC_DATAW2S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3U_OFFSET) +#define KINETIS_FMC_DATAW2S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW2S3L_OFFSET) + +#define KINETIS_FMC_DATAW3S0U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0U_OFFSET) +#define KINETIS_FMC_DATAW3S0L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S0L_OFFSET) +#define KINETIS_FMC_DATAW3S1U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1U_OFFSET) +#define KINETIS_FMC_DATAW3S1L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S1L_OFFSET) +#define KINETIS_FMC_DATAW3S2U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2U_OFFSET) +#define KINETIS_FMC_DATAW3S2L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S2L_OFFSET) +#define KINETIS_FMC_DATAW3S3U (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3U_OFFSET) +#define KINETIS_FMC_DATAW3S3L (KINETIS_FMC_BASE+KINETIS_FMC_DATAW3S3L_OFFSET) + +/* Register Bit Definitions *********************************************************/ + +/* Flash Access Protection Register */ +/* Access protection bits (all masters) */ + +#define FMC_PFAPR_NONE 0 /* No access may be performed by this master */ +#define FMC_PFAPR_RDONLY 1 /* Only read accesses may be performed by this master */ +#define FMC_PFAPR_WRONLY 2 /* Only write accesses may be performed by this master */ +#define FMC_PFAPR_RDWR 3 /* Both read and write accesses may be performed by this master */ + +#define FMC_PFAPR_M0AP_SHIFT (0) /* Bits 0-1: Master 0 Access Protection */ +#define FMC_PFAPR_M0AP_MASK (3 << FMC_PFAPR_M0AP_SHIFT) +#define FMC_PFAPR_M1AP_SHIFT (2) /* Bits 2-3: Master 1 Access Protection */ +#define FMC_PFAPR_M1AP_MASK (3 << FMC_PFAPR_M1AP_SHIFT) +#define FMC_PFAPR_M2AP_SHIFT (4) /* Bits 4-5: Master 2 Access Protection */ +#define FMC_PFAPR_M2AP_MASK (3 << FMC_PFAPR_M2AP_SHIFT) +#define FMC_PFAPR_M3AP_SHIFT (6) /* Bits 6-7: Master 3 Access Protection */ +#define FMC_PFAPR_M3AP_MASK (3 << FMC_PFAPR_M3AP_SHIFT) +#define FMC_PFAPR_M4AP_SHIFT (8) /* Bits 8-9: Master 4 Access Protection */ +#define FMC_PFAPR_M4AP_MASK (3 << FMC_PFAPR_M4AP_SHIFT) +#define FMC_PFAPR_M5AP_SHIFT (10) /* Bits 10-11: Master 5 Access Protection */ +#define FMC_PFAPR_M5AP_MASK (3 << FMC_PFAPR_M5AP_SHIFT) +#define FMC_PFAPR_M6AP_SHIFT (12) /* Bits 12-13: Master 6 Access Protection */ +#define FMC_PFAPR_M6AP_MASK (3 << FMC_PFAPR_M6AP_SHIFT) +#define FMC_PFAPR_M7AP_SHIFT (14) /* Bits 14-15: Master 7 Access Protection */ +#define FMC_PFAPR_M7AP_MASK (3 << FMC_PFAPR_M7AP_SHIFT) +#define FMC_PFAPR_M0PFD (1 << 16) /* Bit 16: Master 0 Prefetch Disable */ +#define FMC_PFAPR_M1PFD (1 << 17) /* Bit 17: Master 1 Prefetch Disable */ +#define FMC_PFAPR_M2PFD (1 << 18) /* Bit 18: Master 2 Prefetch Disable */ +#define FMC_PFAPR_M3PFD (1 << 19) /* Bit 19: Master 3 Prefetch Disable */ +#define FMC_PFAPR_M4PFD (1 << 20) /* Bit 20: Master 4 Prefetch Disable */ +#define FMC_PFAPR_M5PFD (1 << 21) /* Bit 21: Master 5 Prefetch Disable */ +#define FMC_PFAPR_M6PFD (1 << 22) /* Bit 22: Master 6 Prefetch Disable */ +#define FMC_PFAPR_M7PFD (1 << 23) /* Bit 23: Master 7 Prefetch Disable */ + /* Bits 24-31: Reserved */ +/* Flash Bank 0 Control Register */ + +#define FMC_PFB0CR_B0SEBE (1 << 0) /* Bit 0: Bank 0 Single Entry Buffer Enable */ +#define FMC_PFB0CR_B0IPE (1 << 1) /* Bit 1: Bank 0 Instruction Prefetch Enable */ +#define FMC_PFB0CR_B0DPE (1 << 2) /* Bit 2: Bank 0 Data Prefetch Enable */ +#define FMC_PFB0CR_B0ICE (1 << 3) /* Bit 3: Bank 0 Instruction Cache Enable */ +#define FMC_PFB0CR_B0DCE (1 << 4) /* Bit 4: Bank 0 Data Cache Enable */ +#define FMC_PFB0CR_CRC_SHIFT (5) /* Bits 5-7: Cache Replacement Control */ +#define FMC_PFB0CR_CRC_MASK (7 << FMC_PFB0CR_CRC_SHIFT) +# define FMC_PFB0CR_CRC_ALL (0 << FMC_PFB0CR_CRC_SHIFT) /* LRU all four ways */ +# define FMC_PFB0CR_CRC_I01D23 (2 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-1 data 2-3 */ +# define FMC_PFB0CR_CRC_I012D3 (3 << FMC_PFB0CR_CRC_SHIFT) /* LRU ifetches 0-3 data 3 */ + /* Bits 8-16: Reserved */ +#define FMC_PFB0CR_B0MW_SHIFT (17) /* Bits 17-18: Bank 0 Memory Width */ +#define FMC_PFB0CR_B0MW_MASK (3 << FMC_PFB0CR_B0MW_SHIFT) +# define FMC_PFB0CR_B0MW_32BITS (0 << FMC_PFB0CR_B0MW_SHIFT) /* 32 bits */ +# define FMC_PFB0CR_B0MW_64BITS (1 << FMC_PFB0CR_B0MW_SHIFT) /* 64 bits */ +#define FMC_PFB0CR_S_B_INV (1 << 19) /* Bit 19: Invalidate Prefetch Speculation Buffer */ +#define FMC_PFB0CR_CINV_WAY_SHIFT (20) /* Bits 20-23: Cache Invalidate Way x */ +#define FMC_PFB0CR_CINV_WAY_MASK (15 << FMC_PFB0CR_CINV_WAY_SHIFT) +#define FMC_PFB0CR_CLCK_WAY_SHIFT (24) /* Bits 24-27: Cache Lock Way x */ +#define FMC_PFB0CR_CLCK_WAY_MASK (15 << FMC_PFB0CR_CLCK_WAY_SHIFT) +#define FMC_PFB0CR_B0RWSC_SHIFT (28) /* Bits 28-31: Bank 0 Read Wait State Control */ +#define FMC_PFB0CR_B0RWSC_MASK (15 << FMC_PFB0CR_B0RWSC_SHIFT) + +/* Flash Bank 1 Control Register */ + +#define FMC_PFB1CR_B1SEBE (1 << 0) /* Bit 0: Bank 1 Single Entry Buffer Enable */ +#define FMC_PFB1CR_B1IPE (1 << 1) /* Bit 1: Bank 1 Instruction Prefetch Enable */ +#define FMC_PFB1CR_B1DPE (1 << 2) /* Bit 2: Bank 1 Data Prefetch Enable */ +#define FMC_PFB1CR_B1ICE (1 << 3) /* Bit 3: Bank 1 Instruction Cache Enable */ +#define FMC_PFB1CR_B1DCE (1 << 4) /* Bit 4: Bank 1 Data Cache Enable */ + /* Bits 5-16: Reserved */ +#define FMC_PFB1CR_B1MW_SHIFT (17) /* Bits 17-18: Bank 1 Memory Width */ +#define FMC_PFB1CR_B1MW_MASK (3 << FMC_PFB1CR_B1MW_SHIFT) +# define FMC_PFB1CR_B1MW_32BITS (0 << FMC_PFB1CR_B1MW_SHIFT) /* 32 bits */ +# define FMC_PFB1CR_B1MW_64BITS (1 << FMC_PFB1CR_B1MW_SHIFT) /* 64 bits */ + /* Bits 19-27: Reserved */ +#define FMC_PFB1CR_B1RWSC_SHIFT (28) /* Bits 28-31: Bank 1 Read Wait State Control */ +#define FMC_PFB1CR_B1RWSC_MASK (15 << FMC_PFB1CR_B0RWSC_SHIFT) + +/* Cache Directory Storage for way=w and set=s, w=0..3, s=0..7 */ + +#define FMC_TAGVD_VALID (1 << 0) /* Bit 0: 1-bit valid for cache entry */ + /* Bits 1-4: Reserved */ +#define FMC_TAGVD_TAG_SHIFT (5) /* Bits 5-18: 13-bit tag for cache entry */ +#define FMC_TAGVD_TAG_MASK (0x1fff << FMC_TAGVD_TAG_SHIFT) + /* Bits 19-31: Reserved */ + +/* Cache Data Storage (upper and lower) for way=w and set=s, w=0..3, s=0..7. + * 64-bit data in two 32-bit registers. + */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_K64FMC_H */ diff --git a/arch/arm/src/kinetis/kinetis_llwu.h b/arch/arm/src/kinetis/chip/kinetis_llwu.h similarity index 98% rename from arch/arm/src/kinetis/kinetis_llwu.h rename to arch/arm/src/kinetis/chip/kinetis_llwu.h index 4324a76251..ae5c6c8b04 100644 --- a/arch/arm/src/kinetis/kinetis_llwu.h +++ b/arch/arm/src/kinetis/chip/kinetis_llwu.h @@ -1,7 +1,7 @@ /************************************************************************************ - * arch/arm/src/kinetis/kinetis_llwu.h + * arch/arm/src/kinetis/chip/kinetis_llwu.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H /************************************************************************************ * Included Files @@ -249,4 +249,4 @@ * Public Functions ************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_LLWU_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LLWU_H */ diff --git a/arch/arm/src/kinetis/kinetis_lptmr.h b/arch/arm/src/kinetis/chip/kinetis_lptmr.h similarity index 96% rename from arch/arm/src/kinetis/kinetis_lptmr.h rename to arch/arm/src/kinetis/chip/kinetis_lptmr.h index 863b24108e..15aeb4a561 100644 --- a/arch/arm/src/kinetis/kinetis_lptmr.h +++ b/arch/arm/src/kinetis/chip/kinetis_lptmr.h @@ -1,7 +1,7 @@ /**************************************************************************************************** - * arch/arm/src/kinetis/kinetis_lptmr.h + * arch/arm/src/kinetis/chip/kinetis_lptmr.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ****************************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H /**************************************************************************************************** * Included Files @@ -130,4 +130,4 @@ * Public Functions ****************************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_LPTMR_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_LPTMR_H */ diff --git a/arch/arm/src/kinetis/kinetis_mcg.h b/arch/arm/src/kinetis/chip/kinetis_mcg.h similarity index 94% rename from arch/arm/src/kinetis/kinetis_mcg.h rename to arch/arm/src/kinetis/chip/kinetis_mcg.h index 60f13cd2a0..e426b02e58 100644 --- a/arch/arm/src/kinetis/kinetis_mcg.h +++ b/arch/arm/src/kinetis/chip/kinetis_mcg.h @@ -1,7 +1,7 @@ /************************************************************************************ - * arch/arm/src/kinetis/kinetis_mcg.h + * arch/arm/src/kinetis/chip/kinetis_mcg.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -33,8 +33,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_MCG_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_MCG_H +#ifndef __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCG_H +#define __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCG_H /************************************************************************************ * Included Files @@ -60,6 +60,10 @@ #define KINETIS_MCG_ATC_OFFSET 0x0008 /* MCG Auto Trim Control Register */ #define KINETIS_MCG_ATCVH_OFFSET 0x000a /* MCG Auto Trim Compare Value High Register */ #define KINETIS_MCG_ATCVL_OFFSET 0x000b /* MCG Auto Trim Compare Value Low Register */ +#ifdef KINETIS_K64 +# define KINETIS_MCG_C7_OFFSET 0x000c /* MCG Control 7 Register */ +# define KINETIS_MCG_C8_OFFSET 0x000d /* MCG Control 8 Register */ +#endif /* Register Addresses ***************************************************************/ @@ -73,6 +77,10 @@ #define KINETIS_MCG_ATC (KINETIS_MCG_BASE+KINETIS_MCG_ATC_OFFSET) #define KINETIS_MCG_ATCVH (KINETIS_MCG_BASE+KINETIS_MCG_ATCVH_OFFSET) #define KINETIS_MCG_ATCVL (KINETIS_MCG_BASE+KINETIS_MCG_ATCVL_OFFSET) +#ifdef KINETIS_K64 +# define KINETIS_MCG_C7 (KINETIS_MCG_BASE+KINETIS_MCG_C7_OFFSET) +# define KINETIS_MCG_C8 (KINETIS_MCG_BASE+KINETIS_MCG_C8_OFFSET) +#endif /* Register Bit Definitions *********************************************************/ @@ -171,6 +179,10 @@ /* MCG Auto Trim Compare Value High/Low Registers (8-bit compare value) */ +/* MCG Control 7 Register */ + +/* MCG Control 8 Register */ + /************************************************************************************ * Public Types ************************************************************************************/ @@ -183,4 +195,4 @@ * Public Functions ************************************************************************************/ -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_MCG_H */ +#endif /* __ARCH_ARM_SRC_KINETIS_CHIP_KINETIS_MCG_H */ diff --git a/arch/arm/src/kinetis/kinetis_clockconfig.c b/arch/arm/src/kinetis/kinetis_clockconfig.c index 22f840a4dd..eddaafc53e 100644 --- a/arch/arm/src/kinetis/kinetis_clockconfig.c +++ b/arch/arm/src/kinetis/kinetis_clockconfig.c @@ -44,10 +44,10 @@ #include "up_arch.h" #include "kinetis.h" -#include "kinetis_mcg.h" +#include "chip/kinetis_mcg.h" #include "kinetis_sim.h" -#include "kinetis_fmc.h" -#include "kinetis_llwu.h" +#include "chip/kinetis_fmc.h" +#include "chip/kinetis_llwu.h" #include "chip/kinetis_pinmux.h" /**************************************************************************** diff --git a/arch/arm/src/kinetis/kinetis_ftfl.h b/arch/arm/src/kinetis/kinetis_ftfl.h deleted file mode 100644 index 92e53b650d..0000000000 --- a/arch/arm/src/kinetis/kinetis_ftfl.h +++ /dev/null @@ -1,159 +0,0 @@ -/************************************************************************************ - * arch/arm/src/kinetis/kinetis_ftfl.h - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ************************************************************************************/ - -#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_FTFL_H -#define __ARCH_ARM_SRC_KINETIS_KINETIS_FTFL_H - -/************************************************************************************ - * Included Files - ************************************************************************************/ - -#include - -#include "chip.h" - -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/* Register Offsets *****************************************************************/ - -#define KINETIS_FTFL_FSTAT_OFFSET 0x0000 /* Flash Status Register */ -#define KINETIS_FTFL_FCNFG_OFFSET 0x0001 /* Flash Configuration Register */ -#define KINETIS_FTFL_FSEC_OFFSET 0x0002 /* Flash Security Register */ -#define KINETIS_FTFL_FOPT_OFFSET 0x0003 /* Flash Option Register */ - -#define KINETIS_FTFL_FCCOB3_OFFSET 0x0004 /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB2_OFFSET 0x0005 /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB1_OFFSET 0x0006 /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB0_OFFSET 0x0007 /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB7_OFFSET 0x0008 /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB6_OFFSET 0x0009 /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB5_OFFSET 0x000a /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB4_OFFSET 0x000b /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOBB_OFFSET 0x000c /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOBA_OFFSET 0x000d /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB9_OFFSET 0x000e /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FCCOB8_OFFSET 0x000f /* Flash Common Command Object Registers */ -#define KINETIS_FTFL_FPROT3_OFFSET 0x0010 /* Program Flash Protection Registers */ -#define KINETIS_FTFL_FPROT2_OFFSET 0x0011 /* Program Flash Protection Registers */ -#define KINETIS_FTFL_FPROT1_OFFSET 0x0012 /* Program Flash Protection Registers */ -#define KINETIS_FTFL_FPROT0_OFFSET 0x0013 /* Program Flash Protection Registers */ -#define KINETIS_FTFL_FEPROT_OFFSET 0x0016 /* EEPROM Protection Register */ -#define KINETIS_FTFL_FDPROT_OFFSET 0x0017 /* Data Flash Protection Register */ - -/* Register Addresses ***************************************************************/ - -#define KINETIS_FTFL_FSTAT (KINETIS_FTFL_BASE+KINETIS_FTFL_FSTAT_OFFSET) -#define KINETIS_FTFL_FCNFG (KINETIS_FTFL_BASE+KINETIS_FTFL_FCNFG_OFFSET) -#define KINETIS_FTFL_FSEC (KINETIS_FTFL_BASE+KINETIS_FTFL_FSEC_OFFSET) -#define KINETIS_FTFL_FOPT (KINETIS_FTFL_BASE+KINETIS_FTFL_FOPT_OFFSET) -#define KINETIS_FTFL_FCCOB3 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB3_OFFSET) -#define KINETIS_FTFL_FCCOB2 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB2_OFFSET) -#define KINETIS_FTFL_FCCOB1 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB1_OFFSET) -#define KINETIS_FTFL_FCCOB0 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB0_OFFSET) -#define KINETIS_FTFL_FCCOB7 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB7_OFFSET) -#define KINETIS_FTFL_FCCOB6 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB6_OFFSET) -#define KINETIS_FTFL_FCCOB5 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB5_OFFSET) -#define KINETIS_FTFL_FCCOB4 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB4_OFFSET) -#define KINETIS_FTFL_FCCOBB (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOBB_OFFSET) -#define KINETIS_FTFL_FCCOBA (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOBA_OFFSET) -#define KINETIS_FTFL_FCCOB9 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB9_OFFSET) -#define KINETIS_FTFL_FCCOB8 (KINETIS_FTFL_BASE+KINETIS_FTFL_FCCOB8_OFFSET) -#define KINETIS_FTFL_FPROT3 (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT3_OFFSET) -#define KINETIS_FTFL_FPROT2 (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT2_OFFSET) -#define KINETIS_FTFL_FPROT1 (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT1_OFFSET) -#define KINETIS_FTFL_FPROT0 (KINETIS_FTFL_BASE+KINETIS_FTFL_FPROT0_OFFSET) -#define KINETIS_FTFL_FEPROT (KINETIS_FTFL_BASE+KINETIS_FTFL_FEPROT_OFFSET) -#define KINETIS_FTFL_FDPROT (KINETIS_FTFL_BASE+KINETIS_FTFL_FDPROT_OFFSET) - -/* Register Bit Definitions *********************************************************/ - -/* Flash Status Register */ - -#define FTFL_FSTAT_MGSTAT0 (1 << 0) /* Bit 0: Memory Controller Command Completion Status Flag */ - /* Bits 1-3: Reserved */ -#define FTFL_FSTAT_FPVIOL (1 << 4) /* Bit 4: Flash Protection Violation Flag */ -#define FTFL_FSTAT_ACCERR (1 << 5) /* Bit 5: Flash Access Error Flag */ -#define FTFL_FSTAT_RDCOLERR (1 << 6) /* Bit 6: FTFL Read Collision Error Flag */ -#define FTFL_FSTAT_CCIF (1 << 7) /* Bit 7: Command Complete Interrupt Flag */ - -/* Flash Configuration Register */ - -#define FTFL_FCNFG_EEERDY (1 << 0) /* Bit 0: FEEPROM backup data copied to FlexRAM */ -#define FTFL_FCNFG_RAMRDY (1 << 1) /* Bit 1: RAM Ready */ -#define FTFL_FCNFG_PFLSH (1 << 2) /* Bit 2: FTFL configuration */ -#define FTFL_FCNFG_SWAP (1 << 3) /* Bit 3: Swap */ -#define FTFL_FCNFG_ERSSUSP (1 << 4) /* Bit 4: Erase Suspend */ -#define FTFL_FCNFG_ERSAREQ (1 << 5) /* Bit 5: Erase All Request */ -#define FTFL_FCNFG_RDCOLLIE (1 << 6) /* Bit 6: Read Collision Error Interrupt Enable */ -#define FTFL_FCNFG_CCIE (1 << 7) /* Bit 7: Command Complete Interrupt Enable */ - -/* Flash Security Register */ - -#define FTFL_FSEC_SEC_SHIFT (0) /* Bits 0-1: Flash Security */ -#define FTFL_FSEC_SEC_MASK (3 << FTFL_FSEC_SEC_SHIFT) -# define FTFL_FSEC_SEC_SECURE (0 << FTFL_FSEC_SEC_SHIFT) /* 00,01,11: status is secure */ -# define FTFL_FSEC_SEC_UNSECURE (2 << FTFL_FSEC_SEC_SHIFT) /* 10: status is insecure */ -#define FTFL_FSEC_FSLACC_SHIFT (2) /* Bits 2-3: Freescale Failure Analysis Access Code */ -#define FTFL_FSEC_FSLACC_MASK (3 << FTFL_FSEC_FSLACC_SHIFT) -# define FTFL_FSEC_FSLACC_GRANTED (0 << FTFL_FSEC_FSLACC_SHIFT) /* 00 or 11: Access granted */ -# define FTFL_FSEC_FSLACC_DENIED (1 << FTFL_FSEC_FSLACC_SHIFT) /* 01 or 10: Access denied */ -#define FTFL_FSEC_MEEN_SHIFT (4) /* Bits 4-5: Mass Erase Enable Bits */ -#define FTFL_FSEC_MEEN_MASK (3 << FTFL_FSEC_MEEN_SHIFT) -# define FTFL_FSEC_MEEN_ENABLED (0 << FTFL_FSEC_MEEN_SHIFT) /* All values are enabled */ -#define FTFL_FSEC_KEYEN_SHIFT (6) /* Bits 6-7: Backdoor Key Security Enable */ -#define FTFL_FSEC_KEYEN_MASK (3 << FTFL_FSEC_KEYEN_SHIFT) -# define FTFL_FSEC_KEYEN_DISABLED (1 << FTFL_FSEC_KEYEN_SHIFT) /* All values are disabled */ - -/* Flash Option Register (32-bits, see Chip Configuration details) */ -/* Flash Common Command Object Registers (8-bit flash command data) */ -/* Program Flash Protection Registers (8-bit flash protection data) */ -/* EEPROM Protection Register (8-bit eeprom protection data) */ -/* Data Flash Protection Register (8-bit data flash protection data) */ - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_FTFL_H */ diff --git a/arch/arm/src/kinetis/kinetis_pin.c b/arch/arm/src/kinetis/kinetis_pin.c index 851d0c9d9c..680d2079cf 100644 --- a/arch/arm/src/kinetis/kinetis_pin.c +++ b/arch/arm/src/kinetis/kinetis_pin.c @@ -51,19 +51,7 @@ #include "kinetis_memorymap.h" #include "kinetis.h" #include "kinetis_port.h" -#include "kinetis_gpio.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ +#include "chip/kinetis_gpio.h" /**************************************************************************** * Public Functions diff --git a/arch/arm/src/kinetis/kinetis_pindump.c b/arch/arm/src/kinetis/kinetis_pindump.c index 579c01bb4d..02367ded7a 100644 --- a/arch/arm/src/kinetis/kinetis_pindump.c +++ b/arch/arm/src/kinetis/kinetis_pindump.c @@ -46,7 +46,7 @@ #include "up_arch.h" #include "kinetis.h" -#include "kinetis_gpio.h" +#include "chip/kinetis_gpio.h" #include "kinetis_port.h" #ifdef CONFIG_DEBUG_GPIO_INFO diff --git a/arch/arm/src/kinetis/kinetis_pingpio.c b/arch/arm/src/kinetis/kinetis_pingpio.c index 3663a92399..e92336e64c 100644 --- a/arch/arm/src/kinetis/kinetis_pingpio.c +++ b/arch/arm/src/kinetis/kinetis_pingpio.c @@ -50,19 +50,7 @@ #include "kinetis_memorymap.h" #include "kinetis.h" -#include "kinetis_gpio.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ +#include "chip/kinetis_gpio.h" /**************************************************************************** * Public Functions diff --git a/arch/arm/src/kinetis/kinetis_pwm.c b/arch/arm/src/kinetis/kinetis_pwm.c index 0730bf8dd8..ac48a4af02 100644 --- a/arch/arm/src/kinetis/kinetis_pwm.c +++ b/arch/arm/src/kinetis/kinetis_pwm.c @@ -58,9 +58,9 @@ #include "chip.h" #include "kinetis.h" -#include "kinetis_pwm.h" -#include "kinetis_gpio.h" -#include "kinetis_ftm.h" +#include "chip/kinetis_pwm.h" +#include "chip/kinetis_gpio.h" +#include "chip/kinetis_ftm.h" #include "kinetis_sim.h" /* This module then only compiles if there is at least one enabled timer diff --git a/arch/arm/src/kinetis/kinetis_usbdev.c b/arch/arm/src/kinetis/kinetis_usbdev.c index 8deedb7603..7eeaf8ec15 100644 --- a/arch/arm/src/kinetis/kinetis_usbdev.c +++ b/arch/arm/src/kinetis/kinetis_usbdev.c @@ -68,7 +68,7 @@ #include "kinetis.h" #include "kinetis_usbotg.h" #include "kinetis_sim.h" -#include "kinetis_fmc.h" +#include "chip/kinetis_fmc.h" #if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USBOTG)