diff --git a/arch/arm/include/stm32/chip.h b/arch/arm/include/stm32/chip.h index 2bf1d79b45..d01929e1ca 100644 --- a/arch/arm/include/stm32/chip.h +++ b/arch/arm/include/stm32/chip.h @@ -56,6 +56,8 @@ * the chip datasheet. */ +/* STM32 F100 Value Line ************************************************************/ + #if defined(CONFIG_ARCH_CHIP_STM32F100C8) || defined(CONFIG_ARCH_CHIP_STM32F100CB) \ || defined(CONFIG_ARCH_CHIP_STM32F100R8) || defined(CONFIG_ARCH_CHIP_STM32F100RB) \ || defined(CONFIG_ARCH_CHIP_STM32F100V8) || defined(CONFIG_ARCH_CHIP_STM32F100VB) @@ -87,34 +89,10 @@ # define STM32_NRNG 0 /* No random number generator (RNG) */ # define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ -#elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6) -# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ -# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ -# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ -# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */ -# undef CONFIG_STM32_VALUELINE /* STM32F100x */ -# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ -# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ -# define STM32_NFSMC 1 /* FSMC */ -# define STM32_NATIM 1 /* One advanced timer TIM1 */ -# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */ -# define STM32_NBTIM 0 /* No basic timers */ -# define STM32_NDMA 2 /* DMA1-2 */ -# define STM32_NSPI 2 /* SPI1-2 */ -# define STM32_NI2S 0 /* No I2S (?) */ -# define STM32_NUSART 3 /* USART1-3 */ -# define STM32_NI2C 2 /* I2C1-2 */ -# define STM32_NCAN 1 /* CAN1 */ -# define STM32_NSDIO 1 /* SDIO */ -# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ -# define STM32_NGPIO 112 /* GPIOA-G */ -# define STM32_NADC 1 /* ADC1 */ -# define STM32_NDAC 0 /* No DAC */ -# define STM32_NCRC 0 /* No CRC */ -# define STM32_NETHERNET 0 /* No ethernet */ -# define STM32_NRNG 0 /* No random number generator (RNG) */ -# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ +/* STM32 F103 High Density Family ***************************************************/ +/* STM32F103RC, STM32F103RD, and STM32F103RE are all provided in 64 pin packages and differ + * only in the available FLASH and SRAM. + */ #elif defined(CONFIG_ARCH_CHIP_STM32F103RET6) # define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ @@ -145,7 +123,11 @@ # define STM32_NRNG 0 /* No random number generator (RNG) */ # define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ -#elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) +/* STM32F103VC, STM32F103VD, and STM32F103VE are all provided in 100 pin packages and differ + * only in the available FLASH and SRAM. + */ + +#elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) || defined(CONFIG_ARCH_CHIP_STM32F103VET6) # define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ # undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ # undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ @@ -174,6 +156,40 @@ # define STM32_NRNG 0 /* No random number generator (RNG) */ # define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ +/* STM32F103ZC, STM32F103ZD, and STM32F103ZE are all provided in 144 pin packages and differ + * only in the available FLASH and SRAM. + */ + +#elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6) +# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ +# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ +# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ +# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */ +# undef CONFIG_STM32_VALUELINE /* STM32F100x */ +# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ +# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ +# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ +# define STM32_NFSMC 1 /* FSMC */ +# define STM32_NATIM 1 /* One advanced timer TIM1 */ +# define STM32_NGTIM 4 /* 16-bit generall timers TIM2,3,4,5 with DMA */ +# define STM32_NBTIM 0 /* No basic timers */ +# define STM32_NDMA 2 /* DMA1-2 */ +# define STM32_NSPI 2 /* SPI1-2 */ +# define STM32_NI2S 0 /* No I2S (?) */ +# define STM32_NUSART 3 /* USART1-3 */ +# define STM32_NI2C 2 /* I2C1-2 */ +# define STM32_NCAN 1 /* CAN1 */ +# define STM32_NSDIO 1 /* SDIO */ +# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ +# define STM32_NGPIO 112 /* GPIOA-G */ +# define STM32_NADC 1 /* ADC1 */ +# define STM32_NDAC 0 /* No DAC */ +# define STM32_NCRC 0 /* No CRC */ +# define STM32_NETHERNET 0 /* No ethernet */ +# define STM32_NRNG 0 /* No random number generator (RNG) */ +# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ + +/* STM32 F105/F107 Connectivity Line *******************************************************/ #elif defined(CONFIG_ARCH_CHIP_STM32F105VBT7) # define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ # undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ @@ -232,6 +248,7 @@ # define STM32_NRNG 0 /* No random number generator (RNG) */ # define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ +/* STM32 F2 Family ******************************************************************/ #elif defined(CONFIG_ARCH_CHIP_STM32F207IG) /* UFBGA-176 1024Kb FLASH 128Kb SRAM */ # undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ # undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ @@ -263,6 +280,7 @@ # define STM32_NRNG 1 /* Random number generator (RNG) */ # define STM32_NDCMI 1 /* Digital camera interface (DCMI) */ +/* STM23 F4 Family ******************************************************************/ #elif defined(CONFIG_ARCH_CHIP_STM32F405RG) /* LQFP 64 10x10x1.4 1024Kb FLASH 192Kb SRAM */ # undef CONFIG_STM32_STM32F10XX /* STM32F10xxx family */ # undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h index cc3ee1f96b..3fac597ef2 100644 --- a/arch/arm/src/stm32/chip.h +++ b/arch/arm/src/stm32/chip.h @@ -48,24 +48,51 @@ /* Include the chip pin configuration file */ +/* STM32 F1 Family ******************************************************************/ #if defined(CONFIG_STM32_STM32F10XX) + +/* STM32F100 Value Line */ + # if defined(CONFIG_STM32_VALUELINE) # include "chip/stm32f100_pinmap.h" -# elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6) -# include "chip/stm32f103ze_pinmap.h" + +/* STM32 F103 High Density Family */ +/* STM32F103RC, STM32F103RD, and STM32F103RE are all provided in 64 pin packages and differ + * only in the available FLASH and SRAM. + */ + # elif defined(CONFIG_ARCH_CHIP_STM32F103RET6) # include "chip/stm32f103re_pinmap.h" -# elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) + +/* STM32F103VC, STM32F103VD, and STM32F103VE are all provided in 100 pin packages and differ + * only in the available FLASH and SRAM. + */ + +# elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) || defined(CONFIG_ARCH_CHIP_STM32F103VET6) # include "chip/stm32f103vc_pinmap.h" + +/* STM32F103ZC, STM32F103ZD, and STM32F103ZE are all provided in 144 pin packages and differ + * only in the available FLASH and SRAM. + */ +# elif defined(CONFIG_ARCH_CHIP_STM32F103ZET6) +# include "chip/stm32f103ze_pinmap.h" + +/* STM32 F105/F107 Connectivity Line */ + # elif defined(CONFIG_ARCH_CHIP_STM32F105VBT7) # include "chip/stm32f105vb_pinmap.h" + # elif defined(CONFIG_ARCH_CHIP_STM32F107VC) # include "chip/stm32f107vc_pinmap.h" # else # error "Unsupported STM32F10XXX chip" # endif + +/* STM32 F2 Family ******************************************************************/ #elif defined(CONFIG_STM32_STM32F20XX) # include "chip/stm32f20xxx_pinmap.h" + +/* STM32 F4 Family ******************************************************************/ #elif defined(CONFIG_STM32_STM32F40XX) # include "chip/stm32f40xxx_pinmap.h" #else