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Big, very risky change: Remove all occurrences of up_maskack_irq() that disable and enable interrupts with up_ack_irq() that only acknowledges the interrupts. This is only used in interrupt decoding logic. Also remove the logic that unconditionally re-enables interrupts with the interrupt exits. This interferes with the drivers ability to control the interrupt state. This is a necessary, sweeping, global change and unfortunately impossible to test.

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This commit is contained in:
Gregory Nutt 2015-02-09 16:12:11 -06:00
parent 3080ed6549
commit 4f9998b4a8
26 changed files with 60 additions and 198 deletions
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19
arch/arm/src/a1x/a1x_irq.c
View File

@ -417,25 +417,6 @@ void up_enable_irq(int irq)
#endif
}
/****************************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
****************************************************************************/
void up_maskack_irq(int irq)
{
/* Disable the interrupt */
up_disable_irq(irq);
/* There is no need to acknowledge the interrupt. The pending interrupt
* was cleared in arm_decodeirq() when the PEND register was read.
*/
}
/****************************************************************************
* Name: up_prioritize_irq
*

8
arch/arm/src/arm/up_doirq.c
View File

@ -87,9 +87,9 @@ void up_doirq(int irq, uint32_t *regs)
current_regs = regs;
/* Mask and acknowledge the interrupt */
/* Acknowledge the interrupt */
up_maskack_irq(irq);
up_ack_irq(irq);
/* Deliver the IRQ */
@ -128,10 +128,6 @@ void up_doirq(int irq, uint32_t *regs)
*/
current_regs = NULL;
/* Unmask the last interrupt (global interrupts are still disabled) */
up_enable_irq(irq);
#endif
board_led_off(LED_INIRQ);
}

2
arch/arm/src/armv7-a/arm_doirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_doirq.c
*
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without

11
arch/arm/src/c5471/c5471_irq.c
View File

@ -218,22 +218,17 @@ void up_enable_irq(int irq)
}
/****************************************************************************
* Name: up_maskack_irq
* Name: up_ack_irq
*
* Description:
* Mask the IRQ and acknowledge it
* Acknowledge the interrupt
*
****************************************************************************/
void up_maskack_irq(int irq)
void up_ack_irq(int irq)
{
uint32_t reg;
/* Mask the interrupt */
reg = getreg32(MASK_IT_REG);
putreg32(reg | (1 << irq), MASK_IT_REG);
/* Set the NEW_IRQ_AGR bit. This clears the IRQ src register
* enables generation of a new IRQ.
*/

3
arch/arm/src/common/up_internal.h
View File

@ -354,7 +354,6 @@ int up_memfault(int irq, FAR void *context);
/* Interrupt acknowledge and dispatch */
void up_maskack_irq(int irq);
uint32_t *arm_doirq(int irq, uint32_t *regs);
/* Paging support */
@ -379,7 +378,7 @@ uint32_t *arm_undefinedinsn(uint32_t *regs);
/* Interrupt acknowledge and dispatch */
void up_maskack_irq(int irq);
void up_ack_irq(int irq);
void up_doirq(int irq, uint32_t *regs);
/* Paging support (and exception handlers) */

10
arch/arm/src/dm320/dm320_decodeirq.c
View File

@ -94,9 +94,9 @@ void up_decodeirq(uint32_t* regs)
if ((unsigned)irq < NR_IRQS)
{
/* Mask and acknowledge the interrupt */
/* Acknowledge the interrupt */
up_maskack_irq(irq);
up_ack_irq(irq);
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
@ -144,12 +144,6 @@ void up_decodeirq(uint32_t* regs)
*/
current_regs = NULL;
/* Unmask the last interrupt (global interrupts are still
* disabled).
*/
up_enable_irq(irq);
}
}
#endif

29
arch/arm/src/dm320/dm320_irq.c
View File

@ -201,48 +201,35 @@ void up_enable_irq(int irq)
}
/************************************************************************
* Name: up_maskack_irq
* Name: up_ack_irq
*
* Description:
* Mask the IRQ and acknowledge it
* Acknowledge the interupt
*
************************************************************************/
void up_maskack_irq(int irq)
void up_ack_irq(int irq)
{
/* Disable the interrupt by clearing the corresponding bit in
* the IRQ enable register. And acknowlege it by setting the
* corresponding bit in the IRQ status register.
/* Acknowlege the interrupt by setting the corresponding bit in the
* IRQ status register.
*/
if (irq < 16)
{
/* IRQs0-15 are controlled by the IRQ0 enable register
* Clear the associated enable bit to disable the interrupt
* Set the associated status bit to clear the interrupt
*/
/* Set the associated status bit to clear the interrupt */
putreg16((getreg16(DM320_INTC_EINT0) & ~(1<< irq)), DM320_INTC_EINT0);
putreg16((1 << irq), DM320_INTC_IRQ0);
}
else if (irq < 32)
{
/* IRQs16-31 are controlled by the IRQ1 enable register
* Clear the associated enable bit to disable the interrupt
* Set the associated status bit to clear the interrupt
*/
/* Set the associated status bit to clear the interrupt */
putreg16((getreg16(DM320_INTC_EINT1) & ~(1<< (irq-16))), DM320_INTC_EINT1);
putreg16((1 << (irq-16)), DM320_INTC_IRQ1);
}
else
{
/* IRQs32- are controlled by the IRQ2 enable register
* Clear the associated enable bit to disable the interrupt
* Set the associated status bit to clear the interrupt
*/
/* Set the associated status bit to clear the interrupt */
putreg16((getreg16(DM320_INTC_EINT2) & ~(1<< (irq-32))), DM320_INTC_EINT2);
putreg16((1 << (irq-32)), DM320_INTC_IRQ2);
}
}

4
arch/arm/src/dm320/dm320_usbdev.c
View File

@ -1824,8 +1824,8 @@ static void dm320_ctrlinitialize(FAR struct dm320_usbdev_s *priv)
/* Initialize interrupts *****************************************************/
up_maskack_irq(DM320_IRQ_USB0); /* Clear USB controller interrupt */
up_maskack_irq(DM320_IRQ_USB1); /* Clear USB DMA interrupt flag */
up_ack_irq(DM320_IRQ_USB0); /* Clear USB controller interrupt */
up_ack_irq(DM320_IRQ_USB1); /* Clear USB DMA interrupt flag */
dm320_getreg8(DM320_USB_INTRTX1); /* Clear TX interrupt */
dm320_getreg8(DM320_USB_INTRRX1); /* Clear RX interrupt */

9
arch/arm/src/imx/imx_decodeirq.c
View File

@ -110,10 +110,6 @@ void up_decodeirq(uint32_t* regs)
if (irq < NR_IRQS)
{
/* Mask and acknowledge the interrupt */
up_maskack_irq(irq);
/* Deliver the IRQ */
irq_dispatch(irq, regs);
@ -145,11 +141,6 @@ void up_decodeirq(uint32_t* regs)
#endif
}
#endif
/* Unmask the last interrupt (global interrupts are still
* disabled).
*/
up_enable_irq(irq);
}
}
while (irq < NR_IRQS);

13
arch/arm/src/imx/imx_irq.c
View File

@ -129,16 +129,3 @@ void up_enable_irq(int irq)
{
putreg32(irq, IMX_AITC_INTENNUM);
}
/****************************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
****************************************************************************/
void up_maskack_irq(int irq)
{
up_disable_irq(irq);
}

12
arch/arm/src/lpc2378/lpc23xx_decodeirq.c
View File

@ -139,9 +139,9 @@ static void lpc23xx_decodeirq(uint32_t *regs)
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt */
/* Acknowledge the interrupt */
up_maskack_irq(irq);
up_ack_irq(irq);
/* Deliver the IRQ */
@ -163,13 +163,15 @@ void up_decodeirq(uint32_t *regs)
{
vic_vector_t vector = (vic_vector_t) vic_getreg(VIC_ADDRESS_OFFSET);
/* Mask and acknowledge the interrupt */
/* Acknowledge the interrupt */
up_maskack_irq(irq);
up_ack_irq(irq);
/* Valid Interrupt */
if (vector != NULL)
(vector) (regs);
{
(vector)(regs);
}
}
#endif

6
arch/arm/src/lpc2378/lpc23xx_irq.c
View File

@ -190,14 +190,14 @@ void up_enable_irq(int irq)
}
/****************************************************************************
* Name: up_maskack_irq
* Name: up_ack_irq
*
* Description:
* Mask the IRQ and acknowledge it
* Acknowledge the interrupt
*
****************************************************************************/
void up_maskack_irq(int irq)
void up_ack_irq(int irq)
{
uint32_t reg32;

10
arch/arm/src/lpc31xx/lpc31_decodeirq.c
View File

@ -101,9 +101,9 @@ void up_decodeirq(uint32_t *regs)
if ((unsigned)irq < NR_IRQS)
{
/* Mask and acknowledge the interrupt */
/* Acknowledge the interrupt */
up_maskack_irq(irq);
up_ack_irq(irq);
/* Current regs non-zero indicates that we are processing an interrupt;
* current_regs is also used to manage interrupt level context switches.
@ -150,12 +150,6 @@ void up_decodeirq(uint32_t *regs)
*/
current_regs = NULL;
/* Unmask the last interrupt (global interrupts are still
* disabled).
*/
up_enable_irq(irq);
}
}
#endif

15
arch/arm/src/lpc31xx/lpc31_irq.c
View File

@ -174,14 +174,14 @@ void up_enable_irq(int irq)
}
/****************************************************************************
* Name: up_maskack_irq
* Name: up_ack_irq
*
* Description:
* Mask the IRQ and acknowledge it
* Acknowledge the interrupt
*
****************************************************************************/
void up_maskack_irq(int irq)
void up_ack_irq(int irq)
{
/* Get the address of the request register corresponding to this
* interrupt source
@ -189,12 +189,13 @@ void up_maskack_irq(int irq)
uint32_t address = LPC31_INTC_REQUEST(irq+1);
/* Clear the pending interrupt (INTC_REQUEST_CLRSWINT=1) AND disable interrupts
* (ENABLE=0 && WE_ENABLE=1). Configuration settings will be preserved because
* WE_TARGET is zero.
/* Clear the pending interrupt (INTC_REQUEST_CLRSWINT=1) while keeping
* interrupts enabled (ENABLE=1 && WE_ENABLE=1). Configuration settings
* will be preserved because WE_TARGET is zero.
*/
putreg32(INTC_REQUEST_CLRSWINT|INTC_REQUEST_WEENABLE, address);
putreg32(INTC_REQUEST_CLRSWINT|INTC_REQUEST_ENABLE|INTC_REQUEST_WEENABLE,
address);
}
/****************************************************************************

13
arch/arm/src/sama5/sam_irq.c
View File

@ -784,19 +784,6 @@ void up_enable_irq(int irq)
}
}
/****************************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
****************************************************************************/
void up_maskack_irq(int irq)
{
up_disable_irq(irq);
}
/****************************************************************************
* Name: up_prioritize_irq (and sam_prioritize_irq helper)
*

8
arch/arm/src/str71x/str71x_decodeirq.c
View File

@ -116,9 +116,9 @@ void up_decodeirq(uint32_t *regs)
savestate = (uint32_t*)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt */
/* Acknowledge the interrupt */
up_maskack_irq(irq);
up_ack_irq(irq);
/* Deliver the IRQ */
@ -130,10 +130,6 @@ void up_decodeirq(uint32_t *regs)
*/
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still disabled) */
up_enable_irq(irq);
}
#if CONFIG_DEBUG
else

14
arch/arm/src/str71x/str71x_irq.c
View File

@ -169,26 +169,20 @@ void up_enable_irq(int irq)
}
/****************************************************************************
* Name: up_maskack_irq
* Name: up_ack_irq
*
* Description:
* Mask the IRQ and acknowledge it. No XTI support.. only used in
* interrupt handling logic.
* Acknowledge the interrupt. No XTI support.. only used in interrupt
* handling logic.
*
****************************************************************************/
void up_maskack_irq(int irq)
void up_ack_irq(int irq)
{
uint32_t reg32;
if ((unsigned)irq < STR71X_NBASEIRQS)
{
/* Mask the IRQ by clearing the associated bit in the IER register */
reg32 = getreg32(STR71X_EIC_IER);
reg32 &= ~(1 << irq);
putreg32(reg32, STR71X_EIC_IER);
/* Clear the interrupt by writing a one to the corresponding bit in the
* IPR register.
*/

1
arch/hc/src/common/up_internal.h
View File

@ -173,7 +173,6 @@ extern void up_switchcontext(uint8_t *saveregs, uint8_t *restoreregs);
/* Interrupt handling */
extern uint8_t *up_doirq(int irq, uint8_t *regs);
extern void up_maskack_irq(int irq);
/* Signal handling */

14
arch/sh/src/common/up_doirq.c
View File

@ -88,12 +88,6 @@ uint32_t *up_doirq(int irq, uint32_t* regs)
DEBUGASSERT(current_regs == NULL);
current_regs = regs;
/* Mask and acknowledge the interrupt (if supported by the chip) */
#ifndef CONFIG_ARCH_NOINTC
up_maskack_irq(irq);
#endif
/* Deliver the IRQ */
irq_dispatch(irq, regs);
@ -136,14 +130,6 @@ uint32_t *up_doirq(int irq, uint32_t* regs)
*/
current_regs = NULL;
/* Unmask the last interrupt (global interrupts are still
* disabled.
*/
#ifndef CONFIG_ARCH_NOINTC
up_enable_irq(irq);
#endif
}
board_led_off(LED_INIRQ);

8
arch/sh/src/common/up_internal.h
View File

@ -208,14 +208,6 @@ extern void up_wdtinit(void);
extern void up_timer_initialize(void);
/* Defined in chip-specific logic if CONFIG_ARCH_NOINTC is not set */
#ifndef CONFIG_ARCH_NOINTC
extern void up_maskack_irq(int irq);
#else
# define up_maskack_irq(irq)
#endif
/* Defined in board/up_leds.c */
#ifdef CONFIG_ARCH_LEDS

4
arch/x86/src/common/up_internal.h
View File

@ -234,10 +234,6 @@ extern void up_wdtinit(void);
extern void up_timer_initialize(void);
/* Defined in up_irq.c */
extern void up_maskack_irq(int irq);
/* Defined in board/up_leds.c */
#ifdef CONFIG_ARCH_LEDS

10
arch/z16/src/common/up_doirq.c
View File

@ -106,9 +106,9 @@ FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs)
savestate = (FAR chipreg_t *)current_regs;
current_regs = regs;
/* Mask and acknowledge the interrupt */
/* Acknowledge the interrupt */
up_maskack_irq(irq);
up_ack_irq(irq);
/* Deliver the IRQ */
@ -121,12 +121,6 @@ FAR chipreg_t *up_doirq(int irq, FAR chipreg_t *regs)
ret = current_regs;
current_regs = savestate;
/* Unmask the last interrupt (global interrupts are still
* disabled.
*/
up_enable_irq(irq);
}
board_led_off(LED_INIRQ);

2
arch/z16/src/common/up_internal.h
View File

@ -180,7 +180,7 @@ extern void up_timer_initialize(void);
/* Defined in up_irq.c */
extern void up_maskack_irq(int irq);
extern void up_ack_irq(int irq);
/* Defined in board/up_leds.c */

14
arch/z16/src/z16f/z16f_irq.c
View File

@ -164,37 +164,33 @@ void up_enable_irq(int irq)
}
/****************************************************************************
* Name: up_maskack_irq
* Name: up_ack_irq
*
* Description:
* Mask the IRQ and acknowledge it
* Acknowledge the interrupt
*
****************************************************************************/
void up_maskack_irq(int irq)
void up_ack_irq(int irq)
{
/* System exceptions cannot be disabled or acknowledged */
if (irq >= Z16F_IRQ_IRQ0)
{
/* Disable the interrupt by clearing the corresponding bit in the
* appropriate IRQ enable register and acknowledge it by setting the
* corresponding bit in the IRQ status register.
/* Acknowledge the interrupt by setting the corresponding bit in the
* IRQ status register.
*/
if (irq < Z16F_IRQ_IRQ1)
{
putreg8((getreg8(Z16F_IRQ0_ENH) & ~Z16F_IRQ0_BIT(irq)), Z16F_IRQ0_ENH);
putreg8(Z16F_IRQ0_BIT(irq), Z16F_IRQ0);
}
else if (irq < Z16F_IRQ_IRQ2)
{
putreg8((getreg8(Z16F_IRQ1_ENH) & ~Z16F_IRQ1_BIT(irq)), Z16F_IRQ1_ENH);
putreg8(Z16F_IRQ1_BIT(irq), Z16F_IRQ2);
}
else if (irq < NR_IRQS)
{
putreg8((getreg8(Z16F_IRQ2_ENH) & ~Z16F_IRQ2_BIT(irq)), Z16F_IRQ2_ENH);
putreg8(Z16F_IRQ2_BIT(irq), Z16F_IRQ2);
}
}

5
arch/z80/src/z8/switch.h
View File

@ -130,7 +130,7 @@
savestate.regs = g_z8irqstate.regs; \
g_z8irqstate.state = Z8_IRQSTATE_ENTRY; \
g_z8irqstate.regs = (regs); \
up_maskack_irq(irq); \
up_ack_irq(irq); \
} while (0)
/* The following macro is used when the system exits interrupt handling logic */
@ -139,7 +139,6 @@
do { \
g_z8irqstate.state = savestate.state; \
g_z8irqstate.regs = savestate.regs; \
up_enable_irq(irq); \
} while (0)
/* The following macro is used to sample the interrupt state (as a opaque handle) */
@ -229,7 +228,7 @@ extern "C"
/* Defined in z8_irq.c */
void up_maskack_irq(int irq);
void up_ack_irq(int irq);
/* Defined in z8_saveusercontext.asm */

14
arch/z80/src/z8/z8_irq.c
View File

@ -211,37 +211,33 @@ void up_enable_irq(int irq)
}
/****************************************************************************
* Name: up_maskack_irq
* Name: up_ack_irq
*
* Description:
* Mask the IRQ and acknowledge it
* Acknowledge the interrupt
*
****************************************************************************/
void up_maskack_irq(int irq)
void up_ack_irq(int irq)
{
/* System exceptions cannot be disabled or acknowledged */
if (irq >= Z8_IRQ0_MIN)
{
/* Disable the interrupt by clearing the corresponding bit in the
* appropriate IRQ enable register and acknowledge it by setting the
* corresponding bit in the IRQ status register.
/* Acknowledge the interrupt by setting the* corresponding bit in the
* IRQ status register.
*/
if (irq <= Z8_IRQ0_MAX)
{
putreg8((getreg8(IRQ0ENH) & ~Z8_IRQ0_BIT(irq)), IRQ0ENH);
putreg8(Z8_IRQ0_BIT(irq), IRQ0);
}
else if (irq <= Z8_IRQ1_MAX)
{
putreg8((getreg8(IRQ1ENH) & ~Z8_IRQ1_BIT(irq)), IRQ1ENH);
putreg8(Z8_IRQ1_BIT(irq), IRQ2);
}
else if (irq < NR_IRQS)
{
putreg8((getreg8(IRQ2ENH) & ~Z8_IRQ2_BIT(irq)), IRQ2ENH);
putreg8(Z8_IRQ2_BIT(irq), IRQ2);
}
}