drivers/mtd/gd25.c and gd5f.c: Change missed in previous patch set. Without this change, the compiler will complain that spi_devid cannot be found.

This commit is contained in:
Xiang Xiao 2019-10-29 07:47:03 -06:00 committed by Gregory Nutt
parent 2852b3a8c8
commit 4fc41b55b3
3 changed files with 64 additions and 53 deletions

View File

@ -75,6 +75,7 @@
/* Command Value Description */ /* Command Value Description */
/* */ /* */
#define GD25_WREN 0x06 /* Write enable */ #define GD25_WREN 0x06 /* Write enable */
#define GD25_WRDI 0x04 /* Write Disable */ #define GD25_WRDI 0x04 /* Write Disable */
#define GD25_RDSR 0x05 /* Read status register */ #define GD25_RDSR 0x05 /* Read status register */
@ -154,6 +155,7 @@ struct gd25_dev_s
FAR struct spi_dev_s *spi; /* Saved SPI interface instance */ FAR struct spi_dev_s *spi; /* Saved SPI interface instance */
uint16_t nsectors; /* Number of erase sectors */ uint16_t nsectors; /* Number of erase sectors */
uint8_t prev_instr; /* Previous instruction given to GD25 device */ uint8_t prev_instr; /* Previous instruction given to GD25 device */
uint32_t spi_devid; /* Chip select inputs */
bool addr_4byte; /* True: Use Four-byte address */ bool addr_4byte; /* True: Use Four-byte address */
}; };
@ -245,7 +247,7 @@ static inline int gd25_readid(FAR struct gd25_dev_s *priv)
/* Select this FLASH part. */ /* Select this FLASH part. */
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the "Read ID (RDID)" command and read the first three ID bytes */ /* Send the "Read ID (RDID)" command and read the first three ID bytes */
@ -256,7 +258,7 @@ static inline int gd25_readid(FAR struct gd25_dev_s *priv)
/* Deselect the FLASH and unlock the bus */ /* Deselect the FLASH and unlock the bus */
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
gd25_unlock(priv->spi); gd25_unlock(priv->spi);
finfo("manufacturer: %02x memory: %02x capacity: %02x\n", finfo("manufacturer: %02x memory: %02x capacity: %02x\n",
@ -341,7 +343,7 @@ static void gd25_unprotect(FAR struct gd25_dev_s *priv)
gd25_wren(priv); gd25_wren(priv);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
/* Send "Write enable status (EWSR)" */ /* Send "Write enable status (EWSR)" */
@ -352,7 +354,7 @@ static void gd25_unprotect(FAR struct gd25_dev_s *priv)
SPI_SEND(priv->spi, 0); SPI_SEND(priv->spi, 0);
SPI_SEND(priv->spi, 0); SPI_SEND(priv->spi, 0);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
/* Unlock the SPI bus */ /* Unlock the SPI bus */
@ -420,9 +422,9 @@ static inline void gd25_4ben(FAR struct gd25_dev_s *priv)
static inline void gd25_wren(FAR struct gd25_dev_s *priv) static inline void gd25_wren(FAR struct gd25_dev_s *priv)
{ {
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
(void)SPI_SEND(priv->spi, GD25_WREN); (void)SPI_SEND(priv->spi, GD25_WREN);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************** /**************************************************************************
@ -431,9 +433,9 @@ static inline void gd25_wren(FAR struct gd25_dev_s *priv)
static inline void gd25_wrdi(FAR struct gd25_dev_s *priv) static inline void gd25_wrdi(FAR struct gd25_dev_s *priv)
{ {
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
(void)SPI_SEND(priv->spi, GD25_WRDI); (void)SPI_SEND(priv->spi, GD25_WRDI);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************** /**************************************************************************
@ -505,7 +507,7 @@ static void gd25_sectorerase(FAR struct gd25_dev_s *priv, off_t sector)
gd25_wren(priv); gd25_wren(priv);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the "Sector Erase (SE)" instruction */ /* Send the "Sector Erase (SE)" instruction */
@ -525,7 +527,7 @@ static void gd25_sectorerase(FAR struct gd25_dev_s *priv, off_t sector)
(void)SPI_SEND(priv->spi, (address >> 8) & 0xff); (void)SPI_SEND(priv->spi, (address >> 8) & 0xff);
(void)SPI_SEND(priv->spi, address & 0xff); (void)SPI_SEND(priv->spi, address & 0xff);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************** /**************************************************************************
@ -542,14 +544,14 @@ static inline int gd25_chiperase(FAR struct gd25_dev_s *priv)
gd25_wren(priv); gd25_wren(priv);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the "Chip Erase (CE)" instruction */ /* Send the "Chip Erase (CE)" instruction */
(void)SPI_SEND(priv->spi, GD25_CE); (void)SPI_SEND(priv->spi, GD25_CE);
priv->prev_instr = GD25_CE; priv->prev_instr = GD25_CE;
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
return OK; return OK;
} }
@ -570,7 +572,7 @@ static void gd25_byteread(FAR struct gd25_dev_s *priv, FAR uint8_t *buffer,
gd25_wrdi(priv); gd25_wrdi(priv);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
/* Send "Read from Memory " instruction */ /* Send "Read from Memory " instruction */
@ -603,7 +605,7 @@ static void gd25_byteread(FAR struct gd25_dev_s *priv, FAR uint8_t *buffer,
SPI_RECVBLOCK(priv->spi, buffer, nbytes); SPI_RECVBLOCK(priv->spi, buffer, nbytes);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************** /**************************************************************************
@ -629,7 +631,7 @@ static void gd25_pagewrite(FAR struct gd25_dev_s *priv,
gd25_wren(priv); gd25_wren(priv);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the "Page Program (GD25_PP)" Command */ /* Send the "Page Program (GD25_PP)" Command */
@ -651,7 +653,7 @@ static void gd25_pagewrite(FAR struct gd25_dev_s *priv,
SPI_SNDBLOCK(priv->spi, buffer, GD25_PAGE_SIZE); SPI_SNDBLOCK(priv->spi, buffer, GD25_PAGE_SIZE);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
/* Update addresses */ /* Update addresses */
@ -684,7 +686,7 @@ static inline void gd25_bytewrite(FAR struct gd25_dev_s *priv,
gd25_wren(priv); gd25_wren(priv);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
/* Send "Page Program (PP)" command */ /* Send "Page Program (PP)" command */
@ -706,7 +708,7 @@ static inline void gd25_bytewrite(FAR struct gd25_dev_s *priv,
SPI_SNDBLOCK(priv->spi, buffer, count); SPI_SNDBLOCK(priv->spi, buffer, count);
SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false); SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
finfo("Written\n"); finfo("Written\n");
} }
#endif /* defined(CONFIG_MTD_BYTE_WRITE) && !defined(CONFIG_GD25_READONLY) */ #endif /* defined(CONFIG_MTD_BYTE_WRITE) && !defined(CONFIG_GD25_READONLY) */
@ -950,7 +952,8 @@ static int gd25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
* *
**************************************************************************/ **************************************************************************/
FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *spi) FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *spi,
uint32_t spi_devid)
{ {
FAR struct gd25_dev_s *priv; FAR struct gd25_dev_s *priv;
int ret; int ret;
@ -975,7 +978,7 @@ FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *spi)
/* Deselect the FLASH */ /* Deselect the FLASH */
SPI_SELECT(spi, SPIDEV_FLASH(0), false); SPI_SELECT(spi, SPIDEV_FLASH(priv->spi_devid), false);
/* Identify the FLASH chip and get its capacity */ /* Identify the FLASH chip and get its capacity */

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@ -68,6 +68,7 @@
#endif #endif
/* GD5F Instructions ****************************************************************/ /* GD5F Instructions ****************************************************************/
/* Command Value Description Addr Data */ /* Command Value Description Addr Data */
/* Dummy */ /* Dummy */
@ -168,6 +169,7 @@ struct gd5f_dev_s
uint16_t nsectors; /* 1024 or 2048 */ uint16_t nsectors; /* 1024 or 2048 */
uint8_t pageshift; /* 11 */ uint8_t pageshift; /* 11 */
uint8_t eccstatus; /* Internal ECC status */ uint8_t eccstatus; /* Internal ECC status */
uint32_t spi_devid; /* Chip select inputs */
}; };
/************************************************************************************ /************************************************************************************
@ -252,7 +254,7 @@ static int gd5f_readid(FAR struct gd5f_dev_s *priv)
/* Lock the SPI bus, configure the bus, and select this FLASH part. */ /* Lock the SPI bus, configure the bus, and select this FLASH part. */
gd5f_lock(priv->dev); gd5f_lock(priv->dev);
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the "Read ID" command and read two ID bytes */ /* Send the "Read ID" command and read two ID bytes */
@ -263,7 +265,7 @@ static int gd5f_readid(FAR struct gd5f_dev_s *priv)
/* De-select the FLASH and unlock the bus */ /* De-select the FLASH and unlock the bus */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
gd5f_unlock(priv->dev); gd5f_unlock(priv->dev);
finfo("manufacturer: %02x deviceid: %02x\n", finfo("manufacturer: %02x deviceid: %02x\n",
@ -314,7 +316,7 @@ static bool gd5f_waitstatus(FAR struct gd5f_dev_s *priv, uint8_t mask, bool succ
{ {
/* Select this FLASH part */ /* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Get feature command */ /* Get feature command */
@ -324,7 +326,7 @@ static bool gd5f_waitstatus(FAR struct gd5f_dev_s *priv, uint8_t mask, bool succ
/* Deselect the FLASH */ /* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
usleep(1000); usleep(1000);
} }
while ((status & GD5F_SR_OIP) != 0); while ((status & GD5F_SR_OIP) != 0);
@ -342,7 +344,7 @@ static inline void gd5f_writeenable(FAR struct gd5f_dev_s *priv)
{ {
/* Select this FLASH part */ /* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Send Write Enable command */ /* Send Write Enable command */
@ -350,7 +352,7 @@ static inline void gd5f_writeenable(FAR struct gd5f_dev_s *priv)
/* Deselect the FLASH */ /* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************************ /************************************************************************************
@ -361,7 +363,7 @@ static inline void gd5f_writedisable(FAR struct gd5f_dev_s *priv)
{ {
/* Select this FLASH part */ /* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Send Write Enable command */ /* Send Write Enable command */
@ -369,7 +371,7 @@ static inline void gd5f_writedisable(FAR struct gd5f_dev_s *priv)
/* Deselect the FLASH */ /* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************************ /************************************************************************************
@ -388,7 +390,7 @@ static bool gd5f_sectorerase(FAR struct gd5f_dev_s *priv, off_t startsector)
/* Select this FLASH part */ /* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the Block Erase instruction */ /* Send the Block Erase instruction */
@ -399,7 +401,7 @@ static bool gd5f_sectorerase(FAR struct gd5f_dev_s *priv, off_t startsector)
/* De-select the FLASH */ /* De-select the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
finfo("Erased\n"); finfo("Erased\n");
return gd5f_waitstatus(priv, GD5F_SR_E_FAIL, false); return gd5f_waitstatus(priv, GD5F_SR_E_FAIL, false);
@ -450,7 +452,7 @@ static void gd5f_readbuffer(FAR struct gd5f_dev_s *priv, uint32_t address,
/* Select the FLASH */ /* Select the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
(void)SPI_SEND(priv->dev, GD5F_READ_FROM_CACHE); (void)SPI_SEND(priv->dev, GD5F_READ_FROM_CACHE);
@ -469,7 +471,7 @@ static void gd5f_readbuffer(FAR struct gd5f_dev_s *priv, uint32_t address,
/* Deselect the FLASH */ /* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************************ /************************************************************************************
@ -482,7 +484,7 @@ static bool gd5f_read_page(FAR struct gd5f_dev_s *priv, uint32_t pageaddress)
/* Select this FLASH part */ /* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the Read Page instruction */ /* Send the Read Page instruction */
@ -493,7 +495,7 @@ static bool gd5f_read_page(FAR struct gd5f_dev_s *priv, uint32_t pageaddress)
/* Deselect the FLASH */ /* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
/* Wait Page Read Complete */ /* Wait Page Read Complete */
@ -591,7 +593,7 @@ static void gd5f_write_to_cache(FAR struct gd5f_dev_s *priv, uint32_t address,
/* Select the FLASH */ /* Select the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the Program Load command */ /* Send the Program Load command */
@ -608,7 +610,7 @@ static void gd5f_write_to_cache(FAR struct gd5f_dev_s *priv, uint32_t address,
/* De-select the FLASH */ /* De-select the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************************ /************************************************************************************
@ -621,7 +623,7 @@ static bool gd5f_execute_write(FAR struct gd5f_dev_s *priv, uint32_t pageaddress
/* Select this FLASH part */ /* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
/* Send the Program Execute instruction */ /* Send the Program Execute instruction */
@ -632,7 +634,7 @@ static bool gd5f_execute_write(FAR struct gd5f_dev_s *priv, uint32_t pageaddress
/* De-select the FLASH */ /* De-select the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
return gd5f_waitstatus(priv, GD5F_SR_P_FAIL, false); return gd5f_waitstatus(priv, GD5F_SR_P_FAIL, false);
} }
@ -768,11 +770,11 @@ static int gd5f_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
static inline void gd5f_eccstatusread(FAR struct gd5f_dev_s *priv) static inline void gd5f_eccstatusread(FAR struct gd5f_dev_s *priv)
{ {
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
(void)SPI_SEND(priv->dev, GD5F_GET_FEATURE); (void)SPI_SEND(priv->dev, GD5F_GET_FEATURE);
(void)SPI_SEND(priv->dev, GD5F_STATUS); (void)SPI_SEND(priv->dev, GD5F_STATUS);
priv->eccstatus = SPI_SEND(priv->dev, GD5F_DUMMY); priv->eccstatus = SPI_SEND(priv->dev, GD5F_DUMMY);
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
} }
/************************************************************************************ /************************************************************************************
@ -786,11 +788,11 @@ static inline void gd5f_enable_ecc(FAR struct gd5f_dev_s *priv)
gd5f_lock(priv->dev); gd5f_lock(priv->dev);
gd5f_writeenable(priv); gd5f_writeenable(priv);
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
(void)SPI_SEND(priv->dev, GD5F_SET_FEATURE); (void)SPI_SEND(priv->dev, GD5F_SET_FEATURE);
(void)SPI_SEND(priv->dev, GD5F_SECURE_OTP); (void)SPI_SEND(priv->dev, GD5F_SECURE_OTP);
(void)SPI_SEND(priv->dev, secure_otp); (void)SPI_SEND(priv->dev, secure_otp);
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
gd5f_writedisable(priv); gd5f_writedisable(priv);
gd5f_unlock(priv->dev); gd5f_unlock(priv->dev);
@ -807,11 +809,11 @@ static inline void gd5f_unlockblocks(FAR struct gd5f_dev_s *priv)
gd5f_lock(priv->dev); gd5f_lock(priv->dev);
gd5f_writeenable(priv); gd5f_writeenable(priv);
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
(void)SPI_SEND(priv->dev, GD5F_SET_FEATURE); (void)SPI_SEND(priv->dev, GD5F_SET_FEATURE);
(void)SPI_SEND(priv->dev, GD5F_BLOCK_PROTECTION); (void)SPI_SEND(priv->dev, GD5F_BLOCK_PROTECTION);
(void)SPI_SEND(priv->dev, blockprotection); (void)SPI_SEND(priv->dev, blockprotection);
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
gd5f_writedisable(priv); gd5f_writedisable(priv);
gd5f_unlock(priv->dev); gd5f_unlock(priv->dev);
@ -831,7 +833,8 @@ static inline void gd5f_unlockblocks(FAR struct gd5f_dev_s *priv)
* *
************************************************************************************/ ************************************************************************************/
FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev) FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev,
uint32_t spi_devid)
{ {
FAR struct gd5f_dev_s *priv; FAR struct gd5f_dev_s *priv;
int ret; int ret;
@ -851,16 +854,17 @@ FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev)
priv->mtd.ioctl = gd5f_ioctl; priv->mtd.ioctl = gd5f_ioctl;
priv->mtd.name = "gd5f"; priv->mtd.name = "gd5f";
priv->dev = dev; priv->dev = dev;
priv->spi_devid = spi_devid;
/* De-select the FLASH */ /* De-select the FLASH */
SPI_SELECT(dev, SPIDEV_FLASH(0), false); SPI_SELECT(dev, SPIDEV_FLASH(priv->spi_devid), false);
/* Reset the flash */ /* Reset the flash */
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
(void)SPI_SEND(priv->dev, GD5F_RESET); (void)SPI_SEND(priv->dev, GD5F_RESET);
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
/* Wait reset complete */ /* Wait reset complete */

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@ -52,6 +52,7 @@
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* Ioctl commands */ /* Ioctl commands */
#define MTDIOC_GEOMETRY _MTDIOC(0x0001) /* IN: Pointer to write-able struct #define MTDIOC_GEOMETRY _MTDIOC(0x0001) /* IN: Pointer to write-able struct
@ -322,6 +323,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd,
FAR const char *partname); FAR const char *partname);
/* MTD Driver Initialization ************************************************/ /* MTD Driver Initialization ************************************************/
/* Create an initialized MTD device instance for a particular memory device. /* Create an initialized MTD device instance for a particular memory device.
* MTD devices are not registered in the file system as are other device * MTD devices are not registered in the file system as are other device
* driver but, but are created as instances that can be bound to other * driver but, but are created as instances that can be bound to other
@ -532,7 +534,8 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *dev);
* *
****************************************************************************/ ****************************************************************************/
FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *dev); FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *dev,
uint32_t spi_devid);
/**************************************************************************** /****************************************************************************
* Name: gd5f_initialize * Name: gd5f_initialize
@ -542,7 +545,8 @@ FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *dev);
* *
****************************************************************************/ ****************************************************************************/
FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev); FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev,
uint32_t spi_devid);
/**************************************************************************** /****************************************************************************
* Name: s25fl1_initialize * Name: s25fl1_initialize
@ -631,7 +635,7 @@ void blockmtd_teardown(FAR struct mtd_dev_s *dev);
****************************************************************************/ ****************************************************************************/
FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset, FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
int16_t sectsize, int32_t erasesize); int16_t sectsize, int32_t erasesize);
/**************************************************************************** /****************************************************************************
* Name: filemtd_teardown * Name: filemtd_teardown
@ -644,7 +648,7 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
* *
****************************************************************************/ ****************************************************************************/
void filemtd_teardown(FAR struct mtd_dev_s* dev); void filemtd_teardown(FAR struct mtd_dev_s *dev);
/**************************************************************************** /****************************************************************************
* Name: filemtd_isfilemtd * Name: filemtd_isfilemtd
@ -657,7 +661,7 @@ void filemtd_teardown(FAR struct mtd_dev_s* dev);
* *
****************************************************************************/ ****************************************************************************/
bool filemtd_isfilemtd(FAR struct mtd_dev_s* mtd); bool filemtd_isfilemtd(FAR struct mtd_dev_s *mtd);
#undef EXTERN #undef EXTERN
#ifdef __cplusplus #ifdef __cplusplus