drivers/mtd/gd25.c and gd5f.c: Change missed in previous patch set. Without this change, the compiler will complain that spi_devid cannot be found.
This commit is contained in:
Xiang Xiao
Gregory Nutt
parent
2852b3a8c8
commit
4fc41b55b3
@ -75,6 +75,7 @@
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/* Command Value Description */
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/* */
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#define GD25_WREN 0x06 /* Write enable */
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#define GD25_WRDI 0x04 /* Write Disable */
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#define GD25_RDSR 0x05 /* Read status register */
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@ -154,6 +155,7 @@ struct gd25_dev_s
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FAR struct spi_dev_s *spi; /* Saved SPI interface instance */
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uint16_t nsectors; /* Number of erase sectors */
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uint8_t prev_instr; /* Previous instruction given to GD25 device */
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uint32_t spi_devid; /* Chip select inputs */
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bool addr_4byte; /* True: Use Four-byte address */
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};
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@ -245,7 +247,7 @@ static inline int gd25_readid(FAR struct gd25_dev_s *priv)
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/* Select this FLASH part. */
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the "Read ID (RDID)" command and read the first three ID bytes */
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@ -256,7 +258,7 @@ static inline int gd25_readid(FAR struct gd25_dev_s *priv)
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/* Deselect the FLASH and unlock the bus */
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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gd25_unlock(priv->spi);
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finfo("manufacturer: %02x memory: %02x capacity: %02x\n",
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@ -341,7 +343,7 @@ static void gd25_unprotect(FAR struct gd25_dev_s *priv)
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gd25_wren(priv);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send "Write enable status (EWSR)" */
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@ -352,7 +354,7 @@ static void gd25_unprotect(FAR struct gd25_dev_s *priv)
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SPI_SEND(priv->spi, 0);
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SPI_SEND(priv->spi, 0);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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/* Unlock the SPI bus */
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@ -420,9 +422,9 @@ static inline void gd25_4ben(FAR struct gd25_dev_s *priv)
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static inline void gd25_wren(FAR struct gd25_dev_s *priv)
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{
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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(void)SPI_SEND(priv->spi, GD25_WREN);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/**************************************************************************
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@ -431,9 +433,9 @@ static inline void gd25_wren(FAR struct gd25_dev_s *priv)
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static inline void gd25_wrdi(FAR struct gd25_dev_s *priv)
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{
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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(void)SPI_SEND(priv->spi, GD25_WRDI);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/**************************************************************************
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@ -505,7 +507,7 @@ static void gd25_sectorerase(FAR struct gd25_dev_s *priv, off_t sector)
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gd25_wren(priv);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the "Sector Erase (SE)" instruction */
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@ -525,7 +527,7 @@ static void gd25_sectorerase(FAR struct gd25_dev_s *priv, off_t sector)
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(void)SPI_SEND(priv->spi, (address >> 8) & 0xff);
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(void)SPI_SEND(priv->spi, address & 0xff);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/**************************************************************************
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@ -542,14 +544,14 @@ static inline int gd25_chiperase(FAR struct gd25_dev_s *priv)
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gd25_wren(priv);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the "Chip Erase (CE)" instruction */
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(void)SPI_SEND(priv->spi, GD25_CE);
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priv->prev_instr = GD25_CE;
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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return OK;
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}
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@ -570,7 +572,7 @@ static void gd25_byteread(FAR struct gd25_dev_s *priv, FAR uint8_t *buffer,
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gd25_wrdi(priv);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send "Read from Memory " instruction */
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@ -603,7 +605,7 @@ static void gd25_byteread(FAR struct gd25_dev_s *priv, FAR uint8_t *buffer,
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SPI_RECVBLOCK(priv->spi, buffer, nbytes);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/**************************************************************************
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@ -629,7 +631,7 @@ static void gd25_pagewrite(FAR struct gd25_dev_s *priv,
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gd25_wren(priv);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the "Page Program (GD25_PP)" Command */
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@ -651,7 +653,7 @@ static void gd25_pagewrite(FAR struct gd25_dev_s *priv,
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SPI_SNDBLOCK(priv->spi, buffer, GD25_PAGE_SIZE);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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/* Update addresses */
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@ -684,7 +686,7 @@ static inline void gd25_bytewrite(FAR struct gd25_dev_s *priv,
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gd25_wren(priv);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send "Page Program (PP)" command */
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@ -706,7 +708,7 @@ static inline void gd25_bytewrite(FAR struct gd25_dev_s *priv,
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SPI_SNDBLOCK(priv->spi, buffer, count);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->spi, SPIDEV_FLASH(priv->spi_devid), false);
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finfo("Written\n");
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}
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#endif /* defined(CONFIG_MTD_BYTE_WRITE) && !defined(CONFIG_GD25_READONLY) */
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@ -950,7 +952,8 @@ static int gd25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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*
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**************************************************************************/
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FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *spi)
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FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *spi,
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uint32_t spi_devid)
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{
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FAR struct gd25_dev_s *priv;
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int ret;
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@ -975,7 +978,7 @@ FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *spi)
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/* Deselect the FLASH */
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SPI_SELECT(spi, SPIDEV_FLASH(0), false);
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SPI_SELECT(spi, SPIDEV_FLASH(priv->spi_devid), false);
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/* Identify the FLASH chip and get its capacity */
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@ -68,6 +68,7 @@
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#endif
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/* GD5F Instructions ****************************************************************/
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/* Command Value Description Addr Data */
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/* Dummy */
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@ -168,6 +169,7 @@ struct gd5f_dev_s
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uint16_t nsectors; /* 1024 or 2048 */
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uint8_t pageshift; /* 11 */
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uint8_t eccstatus; /* Internal ECC status */
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uint32_t spi_devid; /* Chip select inputs */
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};
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/************************************************************************************
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@ -252,7 +254,7 @@ static int gd5f_readid(FAR struct gd5f_dev_s *priv)
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/* Lock the SPI bus, configure the bus, and select this FLASH part. */
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gd5f_lock(priv->dev);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the "Read ID" command and read two ID bytes */
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@ -263,7 +265,7 @@ static int gd5f_readid(FAR struct gd5f_dev_s *priv)
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/* De-select the FLASH and unlock the bus */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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gd5f_unlock(priv->dev);
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finfo("manufacturer: %02x deviceid: %02x\n",
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@ -314,7 +316,7 @@ static bool gd5f_waitstatus(FAR struct gd5f_dev_s *priv, uint8_t mask, bool succ
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{
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Get feature command */
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@ -324,7 +326,7 @@ static bool gd5f_waitstatus(FAR struct gd5f_dev_s *priv, uint8_t mask, bool succ
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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usleep(1000);
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}
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while ((status & GD5F_SR_OIP) != 0);
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@ -342,7 +344,7 @@ static inline void gd5f_writeenable(FAR struct gd5f_dev_s *priv)
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{
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send Write Enable command */
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@ -350,7 +352,7 @@ static inline void gd5f_writeenable(FAR struct gd5f_dev_s *priv)
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/************************************************************************************
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@ -361,7 +363,7 @@ static inline void gd5f_writedisable(FAR struct gd5f_dev_s *priv)
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{
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send Write Enable command */
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@ -369,7 +371,7 @@ static inline void gd5f_writedisable(FAR struct gd5f_dev_s *priv)
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/************************************************************************************
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@ -388,7 +390,7 @@ static bool gd5f_sectorerase(FAR struct gd5f_dev_s *priv, off_t startsector)
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the Block Erase instruction */
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@ -399,7 +401,7 @@ static bool gd5f_sectorerase(FAR struct gd5f_dev_s *priv, off_t startsector)
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/* De-select the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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finfo("Erased\n");
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return gd5f_waitstatus(priv, GD5F_SR_E_FAIL, false);
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@ -450,7 +452,7 @@ static void gd5f_readbuffer(FAR struct gd5f_dev_s *priv, uint32_t address,
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/* Select the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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(void)SPI_SEND(priv->dev, GD5F_READ_FROM_CACHE);
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@ -469,7 +471,7 @@ static void gd5f_readbuffer(FAR struct gd5f_dev_s *priv, uint32_t address,
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/************************************************************************************
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@ -482,7 +484,7 @@ static bool gd5f_read_page(FAR struct gd5f_dev_s *priv, uint32_t pageaddress)
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the Read Page instruction */
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@ -493,7 +495,7 @@ static bool gd5f_read_page(FAR struct gd5f_dev_s *priv, uint32_t pageaddress)
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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/* Wait Page Read Complete */
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@ -591,7 +593,7 @@ static void gd5f_write_to_cache(FAR struct gd5f_dev_s *priv, uint32_t address,
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/* Select the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the Program Load command */
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@ -608,7 +610,7 @@ static void gd5f_write_to_cache(FAR struct gd5f_dev_s *priv, uint32_t address,
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/* De-select the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/************************************************************************************
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@ -621,7 +623,7 @@ static bool gd5f_execute_write(FAR struct gd5f_dev_s *priv, uint32_t pageaddress
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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/* Send the Program Execute instruction */
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@ -632,7 +634,7 @@ static bool gd5f_execute_write(FAR struct gd5f_dev_s *priv, uint32_t pageaddress
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/* De-select the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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return gd5f_waitstatus(priv, GD5F_SR_P_FAIL, false);
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}
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@ -768,11 +770,11 @@ static int gd5f_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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static inline void gd5f_eccstatusread(FAR struct gd5f_dev_s *priv)
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{
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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(void)SPI_SEND(priv->dev, GD5F_GET_FEATURE);
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(void)SPI_SEND(priv->dev, GD5F_STATUS);
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priv->eccstatus = SPI_SEND(priv->dev, GD5F_DUMMY);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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}
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/************************************************************************************
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@ -786,11 +788,11 @@ static inline void gd5f_enable_ecc(FAR struct gd5f_dev_s *priv)
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gd5f_lock(priv->dev);
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gd5f_writeenable(priv);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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(void)SPI_SEND(priv->dev, GD5F_SET_FEATURE);
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(void)SPI_SEND(priv->dev, GD5F_SECURE_OTP);
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(void)SPI_SEND(priv->dev, secure_otp);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
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gd5f_writedisable(priv);
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gd5f_unlock(priv->dev);
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@ -807,11 +809,11 @@ static inline void gd5f_unlockblocks(FAR struct gd5f_dev_s *priv)
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gd5f_lock(priv->dev);
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gd5f_writeenable(priv);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
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(void)SPI_SEND(priv->dev, GD5F_SET_FEATURE);
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(void)SPI_SEND(priv->dev, GD5F_BLOCK_PROTECTION);
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(void)SPI_SEND(priv->dev, blockprotection);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
|
||||
|
||||
gd5f_writedisable(priv);
|
||||
gd5f_unlock(priv->dev);
|
||||
@ -831,7 +833,8 @@ static inline void gd5f_unlockblocks(FAR struct gd5f_dev_s *priv)
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev)
|
||||
FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev,
|
||||
uint32_t spi_devid)
|
||||
{
|
||||
FAR struct gd5f_dev_s *priv;
|
||||
int ret;
|
||||
@ -851,16 +854,17 @@ FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev)
|
||||
priv->mtd.ioctl = gd5f_ioctl;
|
||||
priv->mtd.name = "gd5f";
|
||||
priv->dev = dev;
|
||||
priv->spi_devid = spi_devid;
|
||||
|
||||
/* De-select the FLASH */
|
||||
|
||||
SPI_SELECT(dev, SPIDEV_FLASH(0), false);
|
||||
SPI_SELECT(dev, SPIDEV_FLASH(priv->spi_devid), false);
|
||||
|
||||
/* Reset the flash */
|
||||
|
||||
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
|
||||
SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), true);
|
||||
(void)SPI_SEND(priv->dev, GD5F_RESET);
|
||||
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
|
||||
SPI_SELECT(priv->dev, SPIDEV_FLASH(priv->spi_devid), false);
|
||||
|
||||
/* Wait reset complete */
|
||||
|
||||
|
||||
@ -52,6 +52,7 @@
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Ioctl commands */
|
||||
|
||||
#define MTDIOC_GEOMETRY _MTDIOC(0x0001) /* IN: Pointer to write-able struct
|
||||
@ -322,6 +323,7 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd,
|
||||
FAR const char *partname);
|
||||
|
||||
/* MTD Driver Initialization ************************************************/
|
||||
|
||||
/* Create an initialized MTD device instance for a particular memory device.
|
||||
* MTD devices are not registered in the file system as are other device
|
||||
* driver but, but are created as instances that can be bound to other
|
||||
@ -532,7 +534,8 @@ FAR struct mtd_dev_s *w25_initialize(FAR struct spi_dev_s *dev);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *dev);
|
||||
FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *dev,
|
||||
uint32_t spi_devid);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: gd5f_initialize
|
||||
@ -542,7 +545,8 @@ FAR struct mtd_dev_s *gd25_initialize(FAR struct spi_dev_s *dev);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev);
|
||||
FAR struct mtd_dev_s *gd5f_initialize(FAR struct spi_dev_s *dev,
|
||||
uint32_t spi_devid);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s25fl1_initialize
|
||||
@ -631,7 +635,7 @@ void blockmtd_teardown(FAR struct mtd_dev_s *dev);
|
||||
****************************************************************************/
|
||||
|
||||
FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
|
||||
int16_t sectsize, int32_t erasesize);
|
||||
int16_t sectsize, int32_t erasesize);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: filemtd_teardown
|
||||
@ -644,7 +648,7 @@ FAR struct mtd_dev_s *filemtd_initialize(FAR const char *path, size_t offset,
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void filemtd_teardown(FAR struct mtd_dev_s* dev);
|
||||
void filemtd_teardown(FAR struct mtd_dev_s *dev);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: filemtd_isfilemtd
|
||||
@ -657,7 +661,7 @@ void filemtd_teardown(FAR struct mtd_dev_s* dev);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
bool filemtd_isfilemtd(FAR struct mtd_dev_s* mtd);
|
||||
bool filemtd_isfilemtd(FAR struct mtd_dev_s *mtd);
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
|
||||
Loading…
Reference in New Issue
Block a user