arch/arm/src/tiva: Add CC13x0 AON SYSCTL header file.
This commit is contained in:
Gregory Nutt
parent
14b4b6abf1
commit
4fe9ebd5e3
@ -48,6 +48,7 @@
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#include "hardware/tiva_adi2_refsys.h"
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#include "hardware/tiva_adi3_refsys.h"
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#include "hardware/tiva_aon_ioc.h"
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#include "hardware/tiva_aon_sysctl.h"
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#include "hardware/tiva_ccfg.h"
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#include "hardware/tiva_fcfg1.h"
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#include "hardware/tiva_flash.h"
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@ -389,17 +390,17 @@ void cc13xx_trim_device(void)
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* must be manually cleared
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*/
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if (((getreg32(TIVA_AON_SYSCTL_RESETCTL) &
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(AON_SYSCTL_RESETCTL_BOOT_DET_1_MASK | AON_SYSCTL_RESETCTL_BOOT_DET_0_MASK))
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>> AON_SYSCTL_RESETCTL_BOOT_DET_0_SHIFT) == 1)
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if ((getreg32(TIVA_AON_SYSCTL_RESETCTL) &
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(AON_SYSCTL_RESETCTL_BOOT_DET_1 | AON_SYSCTL_RESETCTL_BOOT_DET_0))
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== AON_SYSCTL_RESETCTL_BOOT_DET_0)
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{
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aon_sysresetctrl = (getreg32(TIVA_AON_SYSCTL_RESETCTL) &
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~(AON_SYSCTL_RESETCTL_BOOT_DET_1_CLR_MASK |
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AON_SYSCTL_RESETCTL_BOOT_DET_0_CLR_MASK |
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AON_SYSCTL_RESETCTL_BOOT_DET_1_SET_MASK |
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AON_SYSCTL_RESETCTL_BOOT_DET_0_SET_MASK));
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aon_sysresetctrl = getreg32(TIVA_AON_SYSCTL_RESETCTL);
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aon_sysresetctrl &= ~(AON_SYSCTL_RESETCTL_BOOT_DET_1_CLR |
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AON_SYSCTL_RESETCTL_BOOT_DET_0_CLR |
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AON_SYSCTL_RESETCTL_BOOT_DET_1_SET |
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AON_SYSCTL_RESETCTL_BOOT_DET_0_SET);
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putreg32(aon_sysresetctrl | AON_SYSCTL_RESETCTL_BOOT_DET_1_SET_MASK,
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putreg32(aon_sysresetctrl | AON_SYSCTL_RESETCTL_BOOT_DET_1_SET,
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TIVA_AON_SYSCTL_RESETCTL);
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putreg32(aon_sysresetctrl, TIVA_AON_SYSCTL_RESETCTL);
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}
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132
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h
Normal file
132
arch/arm/src/tiva/hardware/cc13x0/cc13x0_aon_sysctl.h
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@ -0,0 +1,132 @@
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/********************************************************************************************************************
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* arch/arm/src/tiva/hardware/cc13x0/cc13x0_adi2_refsys.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Technical content derives from a TI header file that has a compatible BSD license:
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*
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* Copyright (c) 2015-2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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********************************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_SYSCTL_H
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#define __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_SYSCTL_H
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/********************************************************************************************************************
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* Included Files
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********************************************************************************************************************/
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#include <nuttx/config.h>
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#include "hardware/tiva_memorymap.h"
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/********************************************************************************************************************
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* Pre-processor Definitions
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********************************************************************************************************************/
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/* AON SYSCTL Register Offsets **************************************************************************************/
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#define TIVA_AON_SYSCTL_PWRCTL_OFFSET 0x0000 /* Power Management */
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#define TIVA_AON_SYSCTL_RESETCTL_OFFSET 0x0004 /* Reset Management */
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#define TIVA_AON_SYSCTL_SLEEPCTL_OFFSET 0x0008 /* Sleep Mode */
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/* AON SYSCTL Register Addresses ************************************************************************************/
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#define TIVA_AON_SYSCTL_PWRCTL (TIVA_AON_SYSCTL_BASE + TIVA_AON_SYSCTL_PWRCTL_OFFSET)
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#define TIVA_AON_SYSCTL_RESETCTL (TIVA_AON_SYSCTL_BASE + TIVA_AON_SYSCTL_RESETCTL_OFFSET)
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#define TIVA_AON_SYSCTL_SLEEPCTL (TIVA_AON_SYSCTL_BASE + TIVA_AON_SYSCTL_SLEEPCTL_OFFSET)
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/* AON SYSCTL Register Bitfield Definitions *************************************************************************/
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/* AON_SYSCTL_PWRCTL */
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#define AON_SYSCTL_PWRCTL_DCDC_EN (1 << 0) /* Bit 0: Select to use DCDC regulator during recharge of VDDR */
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# define AON_SYSCTL_PWRCTL_DCDC_EN_GLD0 (0)
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# define AON_SYSCTL_PWRCTL_DCDC_EN_DCDC AON_SYSCTL_PWRCTL_DCDC_EN
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#define AON_SYSCTL_PWRCTL_EXT_REG_MODE (1 << 1) /* Bit 1: Status of source for VDDR supply */
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# define AON_SYSCTL_PWRCTL_EXT_REG_INTERNAL (0)
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# define AON_SYSCTL_PWRCTL_EXT_REG_EXTERNAL AON_SYSCTL_PWRCTL_EXT_REG_MODE
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#define AON_SYSCTL_PWRCTL_DCDC_ACTIVE (1 << 2) /* Bit 2: Select to use DCDC regulator for VDDR in active mode */
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# define AON_SYSCTL_PWRCTL_DCDC_ACTIVE_GLD0 (0)
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# define AON_SYSCTL_PWRCTL_DCDC_ACTIVE_DCDC AON_SYSCTL_PWRCTL_DCDC_ACTIVE
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/* AON_SYSCTL_RESETCTL */
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#define AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT (1) /* Bits 1-3: Shows the source of the last system reset */
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#define AON_SYSCTL_RESETCTL_RESET_SRC_MASK (7 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_PWR_ON (0 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_PIN_RESET (1 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_VDDS_LOSS (2 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_VDD_LOSS (3 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_VDDR_LOSS (4 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_CLK_LOSS (5 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_SYSRESET (6 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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# define AON_SYSCTL_RESETCTL_RESET_SRC_WARMRESET (7 << AON_SYSCTL_RESETCTL_RESET_SRC_SHIFT)
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#define AON_SYSCTL_RESETCTL_CLK_LOSS_EN (1 << 4) /* Bit 4: Controls reset generation in case SCLK_LF is lost */
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# define AON_SYSCTL_RESETCTL_CLK_LOSS_IGNORE (0)
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# define AON_SYSCTL_RESETCTL_CLK_LOSS_RESET AON_SYSCTL_RESETCTL_CLK_LOSS_EN
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#define AON_SYSCTL_RESETCTL_VDD_LOSS_EN (1 << 5) /* Bit 5: Controls reset generation in case VDD is lost */
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# define AON_SYSCTL_RESETCTL_VDD_LOSS_IGNORE (0)
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# define AON_SYSCTL_RESETCTL_VDD_LOSS_RESET AON_SYSCTL_RESETCTL_VDD_LOSS_EN
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#define AON_SYSCTL_RESETCTL_VDDR_LOSS_EN (1 << 6) /* Bit 6: Controls reset generation in case VDDR is lost */
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# define AON_SYSCTL_RESETCTL_VDDR_LOSS_IGNORE (0)
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# define AON_SYSCTL_RESETCTL_VDDR_LOSS_RESET AON_SYSCTL_RESETCTL_VDDR_LOSS_EN
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#define AON_SYSCTL_RESETCTL_VDDS_LOSS_EN (1 << 7) /* Bit 7: Controls reset generation in case VDDS is lost */
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# define AON_SYSCTL_RESETCTL_VDDS_LOSS_IGNORE (0)
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# define AON_SYSCTL_RESETCTL_VDDS_LOSS_RESET AON_SYSCTL_RESETCTL_VDDS_LOSS_EN
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#define AON_SYSCTL_RESETCTL_VDD_LOSS_EN_OVR (1 << 9) /* Bit 9: Override of VDD_LOSS_EN */
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# define AON_SYSCTL_RESETCTL_VDD_OVR_IGNORE (0)
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# define AON_SYSCTL_RESETCTL_VDD_OVR_RESET AON_SYSCTL_RESETCTL_VDD_LOSS_EN_OVR
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#define AON_SYSCTL_RESETCTL_VDDR_LOSS_EN_OVR (1 << 10) /* Bit 10: Override of VDDR_LOSS_EN */
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# define AON_SYSCTL_RESETCTL_VDDR_OVR_IGNORE (0)
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# define AON_SYSCTL_RESETCTL_VDDR_OVR_RESET AON_SYSCTL_RESETCTL_VDDR_LOSS_EN_OVR
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#define AON_SYSCTL_RESETCTL_VDDS_LOSS_EN_OVR (1 << 11) /* Bit 11: Override of VDDS_LOSS_EN */
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# define AON_SYSCTL_RESETCTL_VDDS_OVR_IGNORE (0)
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# define AON_SYSCTL_RESETCTL_VDDS_OVR_RESET AON_SYSCTL_RESETCTL_VDDS_LOSS_EN_OVR
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#define AON_SYSCTL_RESETCTL_BOOT_DET_0 (1 << 12) /* Bit 12 */
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#define AON_SYSCTL_RESETCTL_BOOT_DET_1 (1 << 13) /* Bit 13 */
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#define AON_SYSCTL_RESETCTL_GPIO_WU_FROM_SD (1 << 14) /* Bit 14: Wakeup from shutdown, IO event */
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#define AON_SYSCTL_RESETCTL_WU_FROM_SD (1 << 15) /* Bit 15: Wakeup from shutdown, IO event or debugger */
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# define AON_SYSCTL_RESETCTL_WU_FROM_COLDRESET (0)
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# define AON_SYSCTL_RESETCTL_WU_FROM_SHUTDOWN AON_SYSCTL_RESETCTL_WU_FROM_SD
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#define AON_SYSCTL_RESETCTL_BOOT_DET_0_SET (1 << 16) /* Bit 16 */
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#define AON_SYSCTL_RESETCTL_BOOT_DET_1_SET (1 << 17) /* Bit 17 */
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#define AON_SYSCTL_RESETCTL_BOOT_DET_0_CLR (1 << 24) /* Bit 24 */
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#define AON_SYSCTL_RESETCTL_BOOT_DET_1_CLR (1 << 25) /* Bit 25 */
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#define AON_SYSCTL_RESETCTL_SYSRESET (1 << 31) /* Bit 31: Cold reset */
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/* AON_SYSCTL_SLEEPCTL */
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#define AON_SYSCTL_SLEEPCTL_IO_PAD_SLEEP_DIS (1 << 0) /* Bit 0: Controls the I/O pad sleep mode */
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# define AON_SYSCTL_SLEEPCTL_IO_PAD_SLEEP_ENABLE (0)
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# define AON_SYSCTL_SLEEPCTL_IO_PAD_SLEEP_DISABLE AON_SYSCTL_SLEEPCTL_IO_PAD_SLEEP_DIS
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#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_CC13X0_CC13X0_AON_SYSCTL_H */
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72
arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
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72
arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
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@ -0,0 +1,72 @@
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/************************************************************************************
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* arch/arm/src/tiva/hardware/tiva_aon_sysctl.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_SYSCTL_H
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#define __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_SYSCTL_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/* Include the pin mapping file for the specific Tiva/Stellaris/SimpleLink chip */
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#if defined(CONFIG_ARCH_CHIP_LM) || defined(CONFIG_ARCH_CHIP_TM4C) || \
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defined(CONFIG_ARCH_CHIP_CC13X2)
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/* These architectures do not support the AON SYSCTL block */
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#elif defined(CONFIG_ARCH_CHIP_CC13X0)
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# include "hardware/cc13x0/cc13x0_aon_sysctl.h"
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#else
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# error "Unsupported Tiva/Stellaris/SimpleLink AON SYSCTL"
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#endif
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_TIVA_HARDWARE_TIVA_AON_SYSCTL_H */
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