arch/arm/src/stm32l4: fix STM32L4+ option bytes memory address
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
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@ -60,10 +60,17 @@
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#define STM32L4_SYSMEM_BASE 0x1fff0000 /* 0x1fff0000-0x1fff6fff: System memory */
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#define STM32L4_SYSMEM_BASE 0x1fff0000 /* 0x1fff0000-0x1fff6fff: System memory */
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#define STM32L4_OTP_BASE 0x1fff7000 /* 0x1fff7000-0x1fff73ff: OTP memory */
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#define STM32L4_OTP_BASE 0x1fff7000 /* 0x1fff7000-0x1fff73ff: OTP memory */
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/* 0x1fff7400-0x1fff77ff: Reserved */
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/* 0x1fff7400-0x1fff77ff: Reserved */
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#define STM32L4_OPTION_BASE 0x1fff7800 /* 0x1fff7800-0x1fff780f: Option bytes */
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#ifdef CONFIG_STM32L4_STM32L4XR
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# define STM32L4_OPTION_BASE 0x1ff00000 /* 0x1ff00000-0x1ff0000f: Option bytes */
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/* 0x1ff00010-0x1ff00fff: Reserved */
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# define STM32L4_OPTION2_BASE 0x1ff01000 /* 0x1ff01000-0x1ff0100f: Option bytes 2 */
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/* 0x1ff01010-0x1ff01fff: Reserved */
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#else
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# define STM32L4_OPTION_BASE 0x1fff7800 /* 0x1fff7800-0x1fff780f: Option bytes */
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/* 0x1fff7810-0x1ffff7ff: Reserved */
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/* 0x1fff7810-0x1ffff7ff: Reserved */
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#define STM32L4_OPTION2_BASE 0x1ffff800 /* 0x1ffff800-0x1ffff80f: Option bytes 2 */
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# define STM32L4_OPTION2_BASE 0x1ffff800 /* 0x1ffff800-0x1ffff80f: Option bytes 2 */
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/* 0x1ffff810-0x1fffffff: Reserved */
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/* 0x1ffff810-0x1fffffff: Reserved */
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#endif
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/* System Memory Addresses **************************************************/
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/* System Memory Addresses **************************************************/
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