Documentation: Import "Analyzing Cortex-M Hardfaults" from CWIKI
* Documentation/guides/cortexmhardfaults.rst: New. Migrated from [1] with conversion to reStructuredText, minor typo fixes, and a link to a Narkive archive of the original quoted question. * Documentation/guides/index.rst: Add above to TOC. [1] https://cwiki.apache.org/confluence/display/NUTTX/Analyzing+Cortex-M+Hardfaults
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Nathan Hartman
Alan Carvalho de Assis
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Documentation/guides/cortexmhardfaults.rst
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Documentation/guides/cortexmhardfaults.rst
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=============================
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Analyzing Cortex-M Hardfaults
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=============================
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.. epigraph::
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> I have a build of PX4 (NuttX 6.29 with some patches) with new
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> lpc43xx chip files on 4337 chip running from FLASH (master
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> vanilla NuttX has no such problem). This gives me a hardfault
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> below if I stress NSH console (UART2) with some big output.
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>
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> I read some threads but can't get a clue how to analyze the
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> dump and where to look first:
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>
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> 1bXXX and 1aXXX addresses are FLASH. 100XXX addresses are RAM
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.. code-block:: console
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Assertion failed at file:armv7-m/up_hardfault.c line: 184 task: hpwork
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sp: 10001eb4
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IRQ stack:
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base: 10001f00
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size: 000003fc
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10001ea0: 1b02d961 1b03f07e 10001eb4 10005ed8 1a0312ab 1b03f600 000000b8 1b02d961
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10001ec0: 00000010 10001f40 00000003 00000000 1a03721d 1a037209 1b02d93b 00000000
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10001ee0: 1a0371f5 00000000 00000000 00000000 00000000 00000000 1a0314a5 10005d7c
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sp: 10005e50
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User stack:
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base: 10005ed8
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size: 00000f9c
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10005e40: 00000000 00000000 00000000 1b02d587 10004900 00000000 005b8d7f 00000000
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10005e60: 1a030f2e 00000000 00000000 00001388 00000000 00000005 10001994 00000000
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10005e80: 00000000 00000000 00000000 1b02c359 00000000 00000000 00000000 004c4b40
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10005ea0: 000002ff 00000000 00000000 1a030f2f 00000000 00000000 00000000 00000000
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10005ec0: 00000000 1a030f41 00000000 1b02c2a5 00000000 00000000 ffffffff 00bdeb39
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R0: ffffffff 00000000 00000016 00000000 00000000 00000000 00000000 00000000
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R8: 100036d8 00000000 00000000 004c4b40 10001370 10005e50 1b02b20b 1b02d596
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xPSR: 41000000 BASEPRI: 00000000 CONTROL: 00000000
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EXC_RETURN: ffffffe9
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This question was asked in the old Yahoo! Group for NuttX, before the
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project joined the Apache Software Foundation. The old forum no longer
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exists, but the thread has been archived at
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`Narkive <https://nuttx.yahoogroups.narkive.com/QNbG3r5l/hardfault-help-analysing-where-to-start>`_
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(third party external link).
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Analyzing the Register Dump
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===========================
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First, in the register dump:
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.. code-block:: console
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R0: ffffffff 00000000 00000016 00000000 00000000 00000000 00000000 00000000
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R8: 100036d8 00000000 00000000 004c4b40 10001370 10005e50 1b02b20b 1b02d596
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xPSR: 41000000 BASEPRI: 00000000 CONTROL: 00000000
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``R15`` is the PC at the time of the crash (``1b02d596``). In order to
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see where this is, I do this:
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.. code-block:: console
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arm-none-eabi-objdump -d nuttx | vi -
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Of course, you can use any editor you prefer. In any case, this will
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provide a full assembly language listing of your FLASH content along
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with complete symbolic information.
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**TIP:** Not comfortable with ARM assembly language? Try the
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``objdump --source`` (or just ``-S``) option. That will intermix the C
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and the assembly language code so that you can see which C statements
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the assembly language is implementing.
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Once you have the FLASH image in the editor, it is then a simple thing
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to do the search in order to find the instruction at ``1b02d596``. The
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symbolic information will show you exactly which function the address
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is in and also the context of the instruction that can be used to
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associate it to the exact line of code in the original C source file.
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You also have all of the register contents so it is pretty easy to see
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what happened (assuming you have some basic knowledge of Thumb2
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assembly language and the ARM EABI). But it is usually not so easy to
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see why it happened.
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The rest of the instructions apply to finding out why the fault
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happened.
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``R14`` often contains the return address to the caller of the
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offending functions. Bit one is set in this return address, but ignore
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that (I.e., use ``1b02b20a`` instead of ``1b02b20b``). Use the objdump
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command above to see where that is.
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Sometimes, however, ``R14`` is not the caller of the offending
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function. If the offending functions calls some other function then
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``R14`` will be overwritten. But no problem, it will also then have
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pushed the return address on the stack where we can find it by
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analyzing the stack dump.
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Analyzing the Stack Dump
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========================
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The Task Stack
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--------------
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To go further back in the time, you have to analyze the stack. It is a
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push down stack so older events are at higher stack addresses; the
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most recent things that happened will be at lower stack addresses.
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Analyzing the stack is done in basically the same way:
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1. Start at the highest stack addresses (oldest) and work forward in
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time (lower addresses)
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2. Find interesting addresses,
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3. Use ``arm-none-eabi-objdump`` to determine where those addresses
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are in the code.
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An interesting address has these properties:
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1. It lies in FLASH in your architecture. In your case these are the
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addresses that begin with ``0x1a`` and ``0x1b``. Other
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architectures may have different FLASH addresses or even addresses
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in RAM.
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2. The interesting addresses are all odd for Cortex-M, that is, bit 0
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will be set. This is because as the code progresses, the return
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address (``R14``) will be pushed on the stack. All of the return
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addresses will lie in FLASH and will be odd.
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Even FLASH addresses in the stack dump usually are references to
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``.rodata`` in FLASH but are sometimes of interest as well. Below are
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examples of interesting addresses (in brackets):
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.. code-block:: console
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sp: 10005e50
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User stack:
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base: 10005ed8
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size: 00000f9c
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10005e40: 00000000 00000000 00000000 [1b02d587] 10004900 00000000 005b8d7f 00000000
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10005e60: 1a030f2e 00000000 00000000 00001388 00000000 00000005 10001994 00000000
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10005e80: 00000000 00000000 00000000 [1b02c359] 00000000 00000000 00000000 004c4b40
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10005ea0: 000002ff 00000000 00000000 [1a030f2f] 00000000 00000000 00000000 00000000
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10005ec0: 00000000 [1a030f41] 00000000 [1b02c2a5] 00000000 00000000 ffffffff 00bdeb39
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That will give the full backtrace up to the point of the failure.
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The Interrupt Stack
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-------------------
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Note that in some cases there are two stacks listed. The interrupt
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stack will be present if (1) the interrupt stack is enabled, and (2)
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you are in an interrupt handler at the time that the failure occurred:
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.. code-block:: console
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Assertion failed at file:armv7-m/up_hardfault.c line: 184 task: hpwork
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sp: 10001eb4
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IRQ stack:
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base: 10001f00
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size: 000003fc
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10001ea0: [1b02d961] 1b03f07e 10001eb4 10005ed8 1a0312ab 1b03f600 000000b8 [1b02d961]
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10001ec0: 00000010 10001f40 00000003 00000000 [1a03721d] [1a037209] [1b02d93b] 00000000
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10001ee0: [1a0371f5] 00000000 00000000 00000000 00000000 00000000 [1a0314a5] 10005d7c
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(Interesting addresses again in brackets).
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The interrupt stack is sometimes interesting, for example when the
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interrupt was caused by logic operating at the interrupt level. In
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this case, it is probably not so interesting since fault was probably
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caused by normal task code and the interrupt stack probably just shows
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the normal operation of the interrupt handling logic.
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Full Stack Analysis
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-------------------
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What I have proposed here is just skimming through the stack, finding
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and interpreting interesting addresses. Sometimes you need more
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information and you need to analyze the stack in more detail. That is
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also possible because every word on the stack is there because of an
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explicit push instruction in the code (usually a push instruction on
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Cortex-M or an stmdb instruction in other ARM architectures). This is
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painstaking work but can also be done to provide a more detailed
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answer to "what happened?"
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Recovering State at the Time of the Hardfault
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=============================================
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Here is another tip from Mike Smith:
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.. epigraph::
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"... for systems like NuttX where catching hardfaults is difficult,
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you can recover the faulting PC, LR and SP (by examining the
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exception stack), then write these values back into the appropriate
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processor registers (adjust the PC as necessary for the fault).
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"This will put you back in the application code at the point at
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which the fault occurred. Some local variables will show as having
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invalid values (because at the time of the fault they were live in
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registers and have been overwritten by the exception handler), but
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the stack frame, function arguments etc. should all show correctly."
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@ -18,3 +18,4 @@ Guides
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customapps.rst
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zerolatencyinterrupts.rst
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nestedinterrupts.rst
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cortexmhardfaults.rst
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