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i.MX6: Add some preliminary definitions to handle other family members

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This commit is contained in:
Gregory Nutt 2016-03-04 18:43:16 -06:00
parent f41189d828
commit 5100e7a623
2 changed files with 73 additions and 4 deletions
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62
arch/arm/include/imx6/chip.h
View File

@ -51,11 +51,65 @@
*/
#if defined(CONFIG_ARCH_CHIP_IMX6_6QUAD)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_NXCPUS 4 /* 4 CPUs */
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (1024*1024) /* 1MB L2 Cache */
# define IMX_NXCPUS 4 /* Four CPUs */
# define IMX_NGPU3D 1 /* One 3D graphics engine */
# define IMX_N32SHADERS 4 /* Four 3D shaders */
# define IMX_NGPU2D 2 /* Two 2D graphics engines */
# define IMX_HAVE_DDR64 1 /* 64-bit DDR3 */
# undef IMX_HAVE_DDR32 /* 32-bit DDR3 */
# define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */
# define IMX_HAVE_SATAII 1 /* Integrated SATA-II */
# undef IMX_HAVE_EPD /* No interated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6DUAL)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_NXCPUS 2 /* 2 CPUs */
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (1024*1024) /* 1MB L2 Cache */
# define IMX_NXCPUS 2 /* Two CPUs */
# define IMX_NGPU3D 1 /* One 3D graphics engine */
# define IMX_N32SHADERS 4 /* Four 3D shaders */
# define IMX_NGPU2D 2 /* Two 2D graphics engines */
# define IMX_HAVE_DDR64 1 /* 64-bit DDR3 */
# undef IMX_HAVE_DDR32 /* 32-bit DDR3 */
# define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */
# define IMX_HAVE_SATAII 1 /* Integrated SATA-II */
# undef IMX_HAVE_EPD /* No interated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6DUALLITE)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (512*1024) /* 512KB L2 Cache */
# define IMX_NXCPUS 2 /* Two CPUs */
# define IMX_NGPU3D 1 /* One 3D graphics engine */
# define IMX_N32SHADERS 1 /* One 3D shaders */
# define IMX_NGPU2D 1 /* One 2D graphics engine */
# define IMX_HAVE_DDR64 1 /* 64-bit DDR3 */
# undef IMX_HAVE_DDR32 /* No 32-bit DDR3 */
# define IMX_HAVE_DDR32x2 1 /* Two channel 32-bit DDR3 */
# undef IMX_HAVE_SATAII /* No integrated SATA-II */
# define IMX_HAVE_EPD 1 /* Interated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6SOLO)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (512*1024) /* 512KB L2 Cache */
# define IMX_NXCPUS 1 /* One CPU */
# define IMX_NGPU3D 1 /* One 3D graphics engine */
# define IMX_N32SHADERS 1 /* One 3D shaders */
# define IMX_NGPU2D 1 /* One 2D graphics engine */
# undef IMX_HAVE_DDR64 /* No 64-bit DDR3 */
# define IMX_HAVE_DDR32 1 /* 32-bit DDR3 */
# undef IMX_HAVE_DDR32x2 /* No two channel 32-bit DDR3 */
# undef IMX_HAVE_SATAII /* No integrated SATA-II */
# define IMX_HAVE_EPD 1 /* Interated EPD controller */
#elif defined(CONFIG_ARCH_CHIP_IMX6_6SOLOLITE)
# define IMX_OCRAM_SIZE (256*1024) /* Size of the On-Chip RAM (OCRAM) */
# define IMX_L2CACHE_SIZE (256*1024) /* 256KB L2 Cache */
# define IMX_NXCPUS 1 /* One CPU */
# define IMX_NGPU3D 1 /* One 3D graphics engine */
# define IMX_N32SHADERS 1 /* One 3D shaders */
# define IMX_NGPU2D 1 /* One 2D graphics engine */
# undef IMX_HAVE_DDR64 /* No 64-bit DDR3 */
# define IMX_HAVE_DDR32 1 /* 32-bit DDR3 */
# undef IMX_HAVE_DDR32x2 /* No two channel 32-bit DDR3 */
# undef IMX_HAVE_SATAII /* No integrated SATA-II */
# define IMX_HAVE_EPD 1 /* Interated EPD controller */
#else
# error Unspecified i.MX6 chip
#endif

15
arch/arm/src/imx6/Kconfig
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@ -11,11 +11,26 @@ choice
prompt "iMX.6 Core Configuration"
default IMX6_6QUAD
config ARCH_CHIP_IMX6_6SOLOLITE
bool "i.MX 6SoloLite"
config ARCH_CHIP_IMX6_6SOLO
bool "i.MX 6Solo"
config ARCH_CHIP_IMX6_6DUALLITE
bool "i.MX 6DualLite"
select ARCH_HAVE_MULTICPU
select ARMV7A_HAVE_GIC
config ARCH_CHIP_IMX6_6DUAL
bool "i.MX 6Dual"
select ARCH_HAVE_MULTICPU
select ARMV7A_HAVE_GIC
config ARCH_CHIP_IMX6_6QUAD
bool "i.MX 6Quad"
select ARCH_HAVE_MULTICPU
select ARMV7A_HAVE_GIC
endchoice # iMX.6 Chip Selection