From 513904d1dfb549f90f7bfc90230061988ff0d083 Mon Sep 17 00:00:00 2001 From: Xiang Xiao Date: Wed, 26 Oct 2022 04:14:34 +0800 Subject: [PATCH] Fix gd32f4xx_dma.c:223:26: error: unused function 'gd32_dma_channel_get' [-Werror,-Wunused-function] Signed-off-by: Xiang Xiao --- arch/arm/src/gd32f4/gd32f4xx_dma.c | 36 ------------------------------ 1 file changed, 36 deletions(-) diff --git a/arch/arm/src/gd32f4/gd32f4xx_dma.c b/arch/arm/src/gd32f4/gd32f4xx_dma.c index 777e7dfb85..8d4ed14bbf 100644 --- a/arch/arm/src/gd32f4/gd32f4xx_dma.c +++ b/arch/arm/src/gd32f4/gd32f4xx_dma.c @@ -211,42 +211,6 @@ static void gd32_dma_clock_enable(uint32_t dmabase) modifyreg32(regaddr, 0, rcu_en); } -/**************************************************************************** - * Name: gd32_dma_channel_get - * - * Description: - * Get the g_dmachan table entry associated with a DMA controller and - * a channel number - ****************************************************************************/ - -static inline struct gd32_dma_channel_s - *gd32_dma_channel_get(uint32_t channelx, - uint32_t dma_periph) -{ - int index; - - DEBUGASSERT(channelx < DMA0_NCHANNELS); - - DEBUGASSERT(dma_periph == GD32_DMA0_BASE && dma_periph == GD32_DMA1_BASE); - - /* Convert the dma_periph + chan_num based on the fact that there are - * 8 channel per dma_periph. - */ - - if (dma_periph == GD32_DMA0_BASE) - { - index = channelx; - } - else - { - index = channelx + DMA0_NCHANNELS; - } - - /* Then return the chan_num structure associated with the chan_num index */ - - return &g_dmachan[index]; -} - /**************************************************************************** * Name: gd32_channel_enable *