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Beginning of a driver for the SAM4L LED1 module

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This commit is contained in:
Gregory Nutt 2013-06-21 17:42:09 -06:00
parent add0a67995
commit 5152ce9f79
8 changed files with 1346 additions and 15 deletions
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3
ChangeLog
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@ -5025,3 +5025,6 @@
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y so that they behave as they did
before, i.e., so that C++ initializers will be called when NSH starts
up (2013-6-21).
* configs/sam4l-xplained/src/sam_slcd.c: Beginning of a driver for the
LED1 segment LCD module. This driver is incomplete on initial check-
in (2013-6-21).

85
arch/arm/src/sam34/Kconfig
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@ -423,15 +423,97 @@ config SAM34_HSMCI
endmenu
if ARCH_CHIP_SAM4L
menu "AT91SAM3/4 Clock Configuration"
config SAM32_RESET_PERIPHCLKS
bool "Enable all peripheral clocks on reset"
default n
depends on ARCH_CHIP_SAM4L
---help---
By default, only a few necessary peripheral clocks are enabled at
reset. If this setting is enabled, then all clocking will be enabled
to all of the selected peripherals on reset.
config SAM34_OSC0
bool "External oscillator 0"
default n
---help---
Oscillator 0 might be automatically selected for several reasons:
Oscillator 0 might be the system clock or the source clock for
either PLL0 or DFPLL. It might also be needed if OSC0 is the source
clock for GCLK9. By selecting SAM34_OSC0, you can also force the
clock to be enabled at boot time for other uses.
config SAM34_OSC32K
bool "32.768KHz external oscillator"
default n
---help---
The 32K oscillator might be automatically selected for several
reasons: The 32K oscillator may be the source clock for DFPLL0 or
the source clock for GLK9 that might be used to driver PLL0. By
selecting SAM34_OSC32K, you can also force the clock to be enabled
at boot time. OSC32 may needed by other devices as well (AST, WDT,
PICUART, RTC).
config SAM34_RC80M
bool "80MHz RC oscillator"
default n
---help---
The 80MHz RC oscillator might be automatically selected for several
reasons: This might be the system clock or the source clock for the
DFPLL or it could be the source for GCLK9 that drives PLL0. By
selecting SAM34_RC80M, you can also force the clock to be enabled at
boot time for other uses.
config SAM34_RCFAST
bool "Fast RC oscillator"
default n
---help---
The fast RC oscillator might be automatically selected for several
reasons: The 12/8/4 fast RC oscillator may be used as the system
clock or as the source for GLCK9 that drives PLL0. If not then, it
may be enabled by setting the SAM34_RCFASTxM configuration variable.
if SAM34_RCFAST
choice
prompt "Fast RC Oscillator Speed"
default SAM34_RCFAST8M
config SAM34_RCFAST12M
bool "12MHz"
config SAM34_RCFAST8M
bool "8MHz"
config SAM34_RCFAST4M
bool "4MHz
endchoice
endif
config SAM34_RC1M
bool "1MHz RC oscillator"
default n
---help---
The 1MHz RC oscillator might be automatically selected for several
reasons: The 1MHz RC oscillator may be used as the system block or
may be the source clock for GLCK9 that drives PLL0. By selecting
SAM34_RC1M, you can also force the clock to be enabled at boot time
for other purposes.
config SAM34_RC32K
bool "32KHz RC oscillator"
default n
---help---
The 32KHz RC oscillator might be automatically selected for several
reasons: The 32KHz RC oscillator may be used as the input to DFLL0
or as the input to GCLK9 that drives PLL0. By selecting SAM34_RC32K,
you can also force the clock to be enabled at boot time for other
purposes.
endmenu
endif
comment "AT91SAM3/4 USART Configuration"
config USART0_ISUART
@ -459,6 +541,7 @@ config USART3_ISUART
select ARCH_HAVE_USART2
comment "AT91SAM3/4 GPIO Interrupt Configuration"
config GPIO_IRQ
bool "GPIO pin interrupts"
---help---

7
arch/arm/src/sam34/chip/sam4l_lcdca.h
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@ -141,14 +141,13 @@
# define LCDCA_CFG_DUTY_1TO3 (3 << LCDCA_CFG_DUTY_SHIFT) /* 1/3, 1/3, COM[0:2] */
#define LCDCA_CFG_FCST_SHIFT (16) /* Bits 16-21: Fine Contrast */
#define LCDCA_CFG_FCST_MASK (63 << LCDCA_CFG_FCST_SHIFT)
# define LCDCA_CFG_FCST(n) (((n) & 63) << LCDCA_CFG_FCST_SHIFT) /* n = -32..31 */
# define LCDCA_CFG_FCST(n) (((uint32_t)(n) & 63) << LCDCA_CFG_FCST_SHIFT) /* n = -32..31 */
#define LCDCA_CFG_NSU_SHIFT (24) /* Bits 24-29: Number of Segment Terminals in Use */
#define LCDCA_CFG_NSU_MASK (63 << LCDCA_CFG_NSU_SHIFT)
# define LCDCA_CFG_NSU(n) ((n) << LCDCA_CFG_NSU_SHIFT) /* n=0-40 */
/* Timing Register */
#define LCDCA_TIM_PRESC (1 << 0) /* Bit 0: LCD Prescaler Select */
#define LCDCA_TIM_CLKDIV_SHIFT (1) /* Bits 1-3: LCD Clock Division */
#define LCDCA_TIM_CLKDIV_MASK (7 << LCDCA_TIM_CLKDIV_SHIFT)
@ -184,11 +183,13 @@
* memory for segments 0-31).
*/
#define LCDCA_DRL_MASK 0xffffffff
/* Data Register High 0-3 (8 bits data, each bit defines a segment value in display
* memory for segments 32-39)
*/
#define LCDCA_DRH0_MASK 0xff
#define LCDCA_DRH_MASK 0xff
/* Indirect Access Data Register */

31
configs/sam4l-xplained/Kconfig
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@ -7,6 +7,14 @@ if ARCH_BOARD_SAM4L_XPLAINED
menu "SAM4L Xplained Pro Modules"
config SAM4L_XPLAINED_SLCD1MODULE
bool "SLCD1 Module"
default n
---help---
The SLCD 1 module is attached. This module provides a segment LCD
that connects directly to the "EXT5 SEGMENT LCD" connector. When
the SLCD is connected, EXT2 is not available for other modules.
config SAM4L_XPLAINED_IOMODULE
bool "I/O1 Module"
default n
@ -15,6 +23,7 @@ config SAM4L_XPLAINED_IOMODULE
slot.
if SAM4L_XPLAINED_IOMODULE
choice
prompt "I/O1 Module Location"
default SAM4L_XPLAINED_IOMODULE_EXT1
@ -24,6 +33,7 @@ config SAM4L_XPLAINED_IOMODULE_EXT1
config SAM4L_XPLAINED_IOMODULE_EXT2
bool "EXT2"
depends on !SAM4L_XPLAINED_SLCD1MODULE
endchoice
endif
@ -35,12 +45,21 @@ config SAM4L_XPLAINED_OLED1MODULE
The OLED 1 module is attached. This module provides an OLED plus 3
additional switches and 3 additional LEDs.
config SAM4L_XPLAINED_SLCD1MODULE
bool "SLCD1 Module"
default n
---help---
The SLCD 1 module is attached. This module provides a segment LCD
that connects directly to the "EXT5 SEGMENT LCD" connector
if SAM4L_XPLAINED_OLED1MODULE
choice
prompt "OLED1 Module Location"
default SAM4L_XPLAINED_OLED1MODULE_EXT1
config SAM4L_XPLAINED_OLED1MODULE_EXT1
bool "EXT1"
config SAM4L_XPLAINED_OLED1MODULE_EXT2
bool "EXT2"
depends on !SAM4L_XPLAINED_SLCD1MODULE
endchoice
endif
endmenu
endif

12
configs/sam4l-xplained/src/Makefile
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@ -42,14 +42,14 @@ AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = sam_boot.c
ifeq ($(CONFIG_SAM34_SPI),y)
CSRCS += sam_spi.c
endif
ifeq ($(CONFIG_HAVE_CXX),y)
CSRCS += sam_cxxinitialize.c
endif
ifeq ($(CONFIG_SAM34_SPI),y)
CSRCS += sam_spi.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += sam_autoleds.c
else
@ -64,6 +64,10 @@ ifeq ($(CONFIG_NSH_ARCHINIT),y)
CSRCS += sam_nsh.c
endif
ifeq ($(CONFIG_SAM34_LCDCA),y)
CSRCS += sam_slcd.c
endif
ifeq ($(CONFIG_SAM4L_XPLAINED_IOMODULE),y)
CSRCS += sam_mmcsd.c
endif

82
configs/sam4l-xplained/src/sam4l-xplained.h
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@ -103,6 +103,75 @@
GPIO_PORTC | GPIO_PIN24)
#define IRQ_SW0 SAM_IRQ_PC24
/* LCD1
*
* EXT5 SAM4L BOARD LCD1 SHARED
* PIN PIN FUNCTION FUNCTION WITH
* 1 PA09 COM3 COM3 EXT3
* 2 PA10 COM2 COM2 EXT3
* 3 PA11 COM1 COM1 EXT4
* 4 PA12 COM0 COM0 EXT4
* 5 PC15 SEG0 SEG0 EXT3
* 6 PC16 SEG1 SEG1 EXT3
* 7 PC17 SEG2 SEG2 EXT4
* 8 PC18 SEG3 SEG3 EXT4
* 9 PC19 SEG4 SEG4
* 10 PA13 SEG5 SEG5 EXT4
* 11 PA14 SEG6 SEG6
* 12 PA15 SEG7 SEG7 EXT4
* 13 PA16 SEG8 SEG8 EXT4
* 14 PA17 SEG9 SEG9 EXT3
* 15 PC20 SEG10 SEG10
* 16 PC21 SEG11 SEG11
* 17 PC22 SEG12 SEG12
* 18 PC23 SEG13 SEG13
* 19 PB08 SEG14 SEG14
* 20 PB09 SEG15 SEG15
* 21 PB10 SEG16 SEG16 EXT2
* 22 PB11 SEG17 SEG17 EXT2
* 23 PA18 SEG18 SEG18 EXT3-4
* 24 PA19 SEG19 SEG19 EXT3-4
* 25 PA20 SEG20 SEG20 EXT3-4
* 26 PB07 SEG21 SEG21
* 27 PB06 SEG22 SEG22
* 28 PA08 SEG23 SEG32 EXT3
* 29 PC24 SEG24 N/C
* 30 PC25 SEG25 N/C EXT1
* 31 PC26 SEG26 N/C EXT2-3
* 32 PC27 SEG27 N/C EXT2-3
* 33 PC28 SEG28 N/C
* 34 PC29 SEG29 N/C
* 35 PC30 SEG30 N/C EXT1-2
* 36 PC31 SEG31 N/C
* 37 PB12 SEG32 N/C EXT1
* 38 PB13 SEG33 N/C EXT1
* 39 PA21 SEG34 N/C EXT1-2
* 40 PA22 SEG35 N/C EXT1-2
* 41 PB14 SEG36 N/C EXT2-4
* 42 PB15 SEG37 N/C EXT2-4
* 43 PA23 SEG38 N/C EXT1
* 44 PA24 SEG39 N/C EXT1
* 45 --- N/C N/C
* 46 --- N/C N/C
* 47 --- VCC_P3V3 BL V+
* 48 --- GND BL V-
* 49 PC05 BL BL CTRL EXT2
* 50 --- ID ID
* 51 --- GND GND
*
* The backlight control is active high.
*/
#ifdef CONFIG_SAM4L_XPLAINED_SLCD1MODULE
# ifndef CONFIG_SAM34_LCDCA
# error CONFIG_SAM34_LCDCA is required to use the LCD1 module
# endif
# define GPIO_LCD1_BL (GPIO_OUTPUT | GPIO_PULL_NONE | GPIO_OUTPUT_CLEAR | \
GPIO_PORTC | GPIO_PIN5)
#endif
/* I/O1
*
* Support for the microSD card slot on the I/O1 module. The I/O1 requires
@ -125,6 +194,10 @@
# if defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT1)
# if defined(SAM4L_XPLAINED_OLED1MODULE) && defined(SAM4L_XPLAINED_OLED1MODULE_EXT1)
# error I/O1 and OLED1 cannot both reside in EXT1
# endif
# define GPIO_SD_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \
GPIO_GLITCH_FILTER | GPIO_PORTB | GPIO_PIN13)
# define IRQ_SD_CD SAM_IRQ_PB13
@ -134,6 +207,15 @@
# define SD_CSNO 0
# elif defined(CONFIG_SAM4L_XPLAINED_IOMODULE_EXT2)
# ifndef CONFIG_SAM4L_XPLAINED_SLCD1MODULE
# error I/O1 cannot be in EXT2 if the LCD1 module is connected
# endif
# if defined(SAM4L_XPLAINED_OLED1MODULE) && defined(SAM4L_XPLAINED_OLED1MODULE_EXT2)
# error I/O1 and OLED1 cannot both reside in EXT2
# endif
# define GPIO_CD (GPIO_INTERRUPT | GPIO_INT_CHANGE | GPIO_PULL_UP | \
GPIO_GLITCH_FILTER | GPIO_PORTC | GPIO_PIN9)
# define IRQ_CD SAM_IRQ_PC9

1139
configs/sam4l-xplained/src/sam_slcd.c Normal file
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File diff suppressed because it is too large Load Diff

2
configs/stm32ldiscovery/src/stm32_lcd.c
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@ -465,7 +465,7 @@ static void slcd_dumpstate(FAR const char *msg)
static void slcd_dumpslcd(FAR const char *msg)
{
lcdvdbg("%s:\n", msg);
lcdvdbg(" CR: %08x FCR: %08x SR: %08x CLR: %08x:\n",
lcdvdbg(" CR: %08x FCR: %08x SR: %08x CLR: %08x\n",
getreg32(STM32_LCD_CR), getreg32(STM32_LCD_FCR),
getreg32(STM32_LCD_SR), getreg32(STM32_LCD_CLR));
lcdvdbg(" RAM0L: %08x RAM1L: %08x RAM2L: %08x RAM3L: %08x\n",